JP3285084B2 - Capacitance measurement method using scanning capacitance microscope - Google Patents
Capacitance measurement method using scanning capacitance microscopeInfo
- Publication number
- JP3285084B2 JP3285084B2 JP34158998A JP34158998A JP3285084B2 JP 3285084 B2 JP3285084 B2 JP 3285084B2 JP 34158998 A JP34158998 A JP 34158998A JP 34158998 A JP34158998 A JP 34158998A JP 3285084 B2 JP3285084 B2 JP 3285084B2
- Authority
- JP
- Japan
- Prior art keywords
- capacitance
- sample
- insulating film
- semiconductor sample
- semiconductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Landscapes
- Measurement Of Resistance Or Impedance (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
Description
【０００１】[0001]
【発明の属する技術分野】本発明は、半導体試料表面等
の微小な領域での評価に有効な、走査トンネル顕微鏡、
原子間力顕微鏡を代表とする走査プローブ顕微鏡を用い
た静電容量測定方法に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a scanning tunneling microscope, which is effective for evaluating a minute area such as a semiconductor sample surface.
The present invention relates to a capacitance measuring method using a scanning probe microscope represented by an atomic force microscope.
【０００２】[0002]
【従来の技術】原子間力顕微鏡は、試料表面の原子と、
カンチレバーの先端の原子との間に働く原子間力を検知
することにより、試料表面の凹凸情報を知ることができ
るようにした装置であり、半導体試料表面の微小な領域
での情報を得るのに有効な手法である。原子間力顕微鏡
で検出するパラメータである原子間力はカンチレバーの
撓みを光学的に検出することによって求められる。撓み
と原子間力が比例することから、撓みによって原子間力
を測定し、これを２次元画像化することにより、表面凹
凸等の情報を得ることができる。走査型静電容量顕微鏡
は、原子間力顕微鏡の応用手法の一つである。図４は走
査型静電容量顕微鏡の模式的構成図である。走査型静電
容量顕微鏡は導電性の探針４３を試料４１に接近させ、
試料４１と探針４３の間にバイアス電圧を印加し、試料
４１と探針４３の間の静電容量を容量測定装置４５によ
って測定し、試料表面の静電容量の分布を求める。そし
て、圧電素子を用いた移動ステージ４４によって試料を
２次元的に移動させることによって試料表面の電荷の分
布や状態の２次元分布図を得ることができる。2. Description of the Related Art Atomic force microscopy is based on the observation of atoms on a sample surface,
This is a device that can detect the irregularity information on the sample surface by detecting the interatomic force that acts between the atoms at the tip of the cantilever, and is used to obtain information in a minute area on the surface of the semiconductor sample. This is an effective method. The atomic force, which is a parameter detected by the atomic force microscope, is obtained by optically detecting the bending of the cantilever. Since the bending and the atomic force are proportional, the atomic force is measured by the bending, and the two-dimensional image is obtained, whereby information such as surface irregularities can be obtained. The scanning capacitance microscope is one of the applied techniques of the atomic force microscope. FIG. 4 is a schematic configuration diagram of a scanning capacitance microscope. The scanning capacitance microscope brings the conductive probe 43 close to the sample 41,
A bias voltage is applied between the sample 41 and the probe 43, the capacitance between the sample 41 and the probe 43 is measured by the capacitance measuring device 45, and the distribution of the capacitance on the sample surface is obtained. Then, by moving the sample two-dimensionally by the moving stage 44 using the piezoelectric element, it is possible to obtain a two-dimensional distribution map of the charge distribution and state on the sample surface.
【０００３】特公平７−３２１７７号公報には、イオン
注入を施したシリコンの注入原子の濃度分布、すなわ
ち、ドーピングプロファイルを、走査型容量顕微鏡によ
って２次元的に計測した例について記載されている。具
体的には、ドーピングを施された半導体試料にバイアス
電圧や交流電圧を印加し、試料表面に形成された自然酸
化膜４２を絶縁膜として、探針と試料との間の静電容量
を計測しながら、探針を試料上で２次元的に移動させ、
ドーピングプロファイルを得ている。Japanese Patent Publication No. 7-32177 describes an example in which the concentration distribution of implanted atoms in silicon subjected to ion implantation, that is, a doping profile is measured two-dimensionally by a scanning capacitance microscope. Specifically, a bias voltage or an AC voltage is applied to the doped semiconductor sample, and the capacitance between the probe and the sample is measured using the natural oxide film 42 formed on the sample surface as an insulating film. While moving the probe two-dimensionally on the sample,
Has a doping profile.
【０００４】[0004]
【発明が解決しようとする課題】半導体表面を走査型容
量顕微鏡により測定する場合、前述のように、通常、容
量測定に必要な絶縁膜として、半導体試料表面上に形成
される自然酸化膜が用いられている。この自然酸化膜は
非常に不安定であり、界面に複雑な表面順位を形成した
り、また表面欠陥等を発生させ、表面の静電容量測定を
正確かつ安定に行うことができないという問題点があっ
た。When a semiconductor surface is measured with a scanning capacitance microscope, a natural oxide film formed on the surface of a semiconductor sample is usually used as an insulating film necessary for capacitance measurement as described above. Have been. This natural oxide film is very unstable, and forms a complicated surface order at the interface or generates a surface defect, so that the capacitance measurement of the surface cannot be performed accurately and stably. there were.
【０００５】本発明の目的は、容量測定のために必要な
絶縁膜として、試料表面に形成される不安定な自然酸化
膜を用いることなく、安定な絶縁膜層を形成した試料を
作成し、静電容量測定を正確かつ安定に行うことのでき
る走査容量顕微鏡による静電容量測定方法を提供するこ
とにある。An object of the present invention is to prepare a sample having a stable insulating film layer formed thereon without using an unstable natural oxide film formed on the surface of the sample as an insulating film required for capacitance measurement. It is an object of the present invention to provide a capacitance measuring method using a scanning capacitance microscope capable of performing capacitance measurement accurately and stably.
【０００６】[0006]
【課題を解決するための手段】本発明の走査容量顕微鏡
による静電容量測定方法は、半導体試料表面を走査容量
顕微鏡により測定する際、超高真空雰囲気下で半導体試
料に清浄表面を形成し、形成後該半導体試料を大気に触
れさせることなく超高真空雰囲気下において保持して清
浄表面に絶縁膜を形成し、その絶縁膜を用いて静電容量
を測定することを特徴とする。The capacitance measuring method using a scanning capacitance microscope according to the present invention comprises the steps of: forming a clean surface on a semiconductor sample in an ultra-high vacuum atmosphere when measuring the surface of the semiconductor sample with the scanning capacitance microscope; After the formation, the semiconductor sample is held in an ultra-high vacuum atmosphere without being exposed to the air, an insulating film is formed on the cleaning surface, and the capacitance is measured using the insulating film. And
【０００７】半導体試料の清浄表面が、その半導体試料
を超高真空雰囲気下で劈開することにより形成されるこ
とが好ましい。It is preferable that the clean surface of the semiconductor sample is formed by cleaving the semiconductor sample in an ultra-high vacuum atmosphere.
【０００８】また、半導体試料表面に形成される絶縁膜
が、その半導体試料の清浄表面を酸素雰囲気下で酸化す
ることによって形成された酸化膜であることが好まし
く、その半導体試料の清浄表面を酸素雰囲気下で光を照
射しながら酸化することによって形成された酸化膜であ
ってもよく、その半導体試料の清浄表面を酸素雰囲気下
で熱により酸化することによって形成された酸化膜であ
てもよく、酸化工程の前にその半導体試料の清浄表面に
ガリウム分子線を照射し、引き続きその半導体試料表面
を酸化することによりその半導体試料表面に形成された
酸化ガリウム膜であってもよい。Preferably, the insulating film formed on the surface of the semiconductor sample is an oxide film formed by oxidizing a clean surface of the semiconductor sample in an oxygen atmosphere. It may be an oxide film formed by oxidizing while irradiating light in an atmosphere, or may be an oxide film formed by oxidizing the clean surface of the semiconductor sample by heat in an oxygen atmosphere. A gallium oxide film formed on the surface of the semiconductor sample by irradiating the clean surface of the semiconductor sample with a gallium molecular beam before the oxidation step and subsequently oxidizing the surface of the semiconductor sample may be used.
【０００９】さらに、半導体試料表面に形成される絶縁
膜が、厚さ５ｎｍ以下の極めて薄い誘電体膜であっても
よい。Further, the insulating film formed on the surface of the semiconductor sample may be an extremely thin dielectric film having a thickness of 5 nm or less.
【００１０】本発明は、半導体試料表面を走査容量顕微
鏡により測定する際、試料表面に清浄表面を形成し、半
導体試料を大気中に取り出すことなく超高真空雰囲気下
において保持し、さらに連続して半導体表面を酸素雰囲
気下において酸化することにより形成した酸化膜を絶縁
膜として用いて静電容量を測定するので、自然酸化膜と
異なり安定した絶縁膜層が得られる。According to the present invention, when a semiconductor sample surface is measured by a scanning capacitance microscope, a clean surface is formed on the sample surface, the semiconductor sample is held in an ultra-high vacuum atmosphere without being taken out to the atmosphere, and further continuously. Since the capacitance is measured using an oxide film formed by oxidizing the semiconductor surface in an oxygen atmosphere as an insulating film, a stable insulating film layer can be obtained unlike a natural oxide film.
【００１１】[0011]
【発明の実施の形態】次に、本発明の実施の形態につい
て図面を参照して、詳細に説明する。図１は本発明の第
１の実施の形態の静電容量測定用絶縁膜形成方法を示す
模式的構成図であり、（ａ）は清浄表面の形成方法、
（ｂ）は絶縁膜の形成方法を示す。図１を参照すると、
本発明の第１の実施の形態は、測定試料１の測定表面に
清浄表面を形成する工程と、測定試料１上に酸化物から
成る絶縁膜５を形成する工程とから成る。ここでは、測
定試料１が半導体ウェーハである場合について説明す
る。Next, embodiments of the present invention will be described in detail with reference to the drawings. FIG. 1 is a schematic configuration diagram showing a method for forming a capacitance measuring insulating film according to a first embodiment of the present invention, wherein (a) shows a method for forming a clean surface,
(B) shows a method for forming an insulating film. Referring to FIG.
The first embodiment of the present invention includes a step of forming a clean surface on the measurement surface of the measurement sample 1 and a step of forming an insulating film 5 made of an oxide on the measurement sample 1. Here, a case where the measurement sample 1 is a semiconductor wafer will be described.
【００１２】清浄表面を形成する第１の工程は、次の様
にして行われる。従来、半導体ウェーハの断面を走査容
量顕微鏡を用いて測定するためには、例えばレーザウェ
ーハを大気中で劈開し、その劈開面を走査容量顕微鏡に
て測定していた。この方法だと、半導体劈開面には必ず
その表面に不安定な自然酸化膜が形成される。この自然
酸化膜の組成を制御するためには、劈開を超高真空の雰
囲気で行うことが必要不可欠である。図２は本発明の第
１の実施の形態の静電容量測定用絶縁膜形成方法を実現
するための装置の模式的構成図である。この装置は、レ
ーザウェーハを劈開する処理室２１、劈開端面に保護膜
を形成するための成長室２２、処理室２１および成長室
２２をつなぐ交換室２３から構成されている。それぞれ
の室は１０-10 Ｔｏｒｒ台の超高真空雰囲気に保持され
ており、また、ゲートバルブ２４で仕切られている。そ
して、試料はそれぞれの室を、第１、第２のマグネット
フィードスルー２５、２６により自由に移動が可能であ
る。The first step of forming a clean surface is performed as follows. Conventionally, in order to measure the cross section of a semiconductor wafer using a scanning capacitance microscope, for example, a laser wafer is cleaved in the air, and the cleavage plane is measured using a scanning capacitance microscope. According to this method, an unstable natural oxide film is always formed on the semiconductor cleavage plane. In order to control the composition of this natural oxide film, it is indispensable to perform cleavage in an ultra-high vacuum atmosphere. FIG. 2 is a schematic configuration diagram of an apparatus for realizing the method for forming an insulating film for capacitance measurement according to the first embodiment of the present invention. This apparatus includes a processing chamber 21 for cleaving a laser wafer, a growth chamber 22 for forming a protective film on a cleavage end face, and an exchange chamber 23 connecting the processing chamber 21 and the growth chamber 22. Each chamber is maintained in an ultra-high vacuum atmosphere on the order of 10 −10 Torr, and is separated by a gate valve 24. The sample can be freely moved in the respective chambers by the first and second magnet feedthroughs 25 and 26.
【００１３】まず、図１（ａ）に示される測定試料１を
試料固定ジグに固定し、図２に示す構造の装置に導入す
る。そして、処理室２１へ導入させた後、超高真空雰囲
気に保たれた処理室２１中において、例えば半導体レー
ザウェーハから成る測定試料を劈開する。処理室２１内
では、図１（ａ）に示されるように劈開された試料片２
が分離され、試料固定ジグに残った測定試料１を測定試
料として利用する。この測定試料１の劈開面は、劈開を
超高真空雰囲気下で行ったため、自然酸化膜、付着物等
の無い清浄表面が露出している。First, a measurement sample 1 shown in FIG. 1A is fixed to a sample fixing jig and introduced into an apparatus having a structure shown in FIG. Then, after the sample is introduced into the processing chamber 21, the measurement sample formed of, for example, a semiconductor laser wafer is cleaved in the processing chamber 21 maintained in an ultra-high vacuum atmosphere. In the processing chamber 21, the sample piece 2 cleaved as shown in FIG.
Are separated and the measurement sample 1 remaining in the sample fixing jig is used as a measurement sample. Since the cleavage surface of this measurement sample 1 was cleaved in an ultra-high vacuum atmosphere, a clean surface free of a natural oxide film, deposits, and the like was exposed.
【００１４】次に、超高真空雰囲気下において劈開され
た測定試料１の清浄表面上に酸化膜を形成する工程につ
いて述べる。測定試料１は処理室２１における前工程に
おいて、劈開された試料片２が分離され、清浄表面が露
出している。この処理室２１に高純度酸素を導入し、清
浄表面を酸化することにより酸化膜から成る絶縁膜５を
形成する。Next, a step of forming an oxide film on the clean surface of the measurement sample 1 cleaved in an ultra-high vacuum atmosphere will be described. As for the measurement sample 1, the cleaved sample piece 2 is separated in the previous step in the processing chamber 21, and the clean surface is exposed. By introducing high-purity oxygen into the processing chamber 21 and oxidizing the clean surface, the insulating film 5 made of an oxide film is formed.
【００１５】劈開端面を酸化する際、酸化を促進するた
めに、光を照射する。具体的には、高純度酸素を処理室
２１中に導入した後、図１（ｂ）に示した様に、測定試
料１の劈開面と対向した位置にハロゲンランプ３を設置
した後、ハロゲンランプ光４を照射し、劈開端面に組成
を制御した酸化膜を形成する。When oxidizing the cleaved end face, light is applied to promote the oxidation. Specifically, after introducing high-purity oxygen into the processing chamber 21, as shown in FIG. 1B, a halogen lamp 3 is installed at a position facing the cleavage plane of the measurement sample 1, and then the halogen lamp 3 is placed. Light 4 is irradiated to form an oxide film having a controlled composition on the cleaved end face.
【００１６】また、同様の目的で、測定試料１の温度を
上げ、熱により酸化を促進させてもよい。測定試料１上
の清浄表面を酸化させる際、測定試料１の温度を測定試
料１の特性が劣化しない範囲で上昇させ、酸化膜形成を
促進させてもよい。Further, for the same purpose, the temperature of the measurement sample 1 may be increased, and the oxidation may be promoted by heat. When the clean surface on the measurement sample 1 is oxidized, the temperature of the measurement sample 1 may be increased within a range where the characteristics of the measurement sample 1 are not deteriorated, and the formation of an oxide film may be promoted.
【００１７】本発明における第１の実施の形態の工程に
より形成された酸化膜は、近年報告された電子ビームリ
ソグラフィー法［ナノテクノロジー（Ｎａｎｏｔｅｃｈ
ｎｏｌｏｇｙ）、第３巻５４頁、（１９９２年）、河西
らによる］において半導体基板上に極微細なパターンを
形成する際の安定なレジスト材料として用いられている
ものと同じ工程で形成されており、安定な酸化膜材料で
ある。The oxide film formed by the process according to the first embodiment of the present invention can be formed by an electron beam lithography method [Nanotechnology (Nanotech)] reported recently.
No. 3, p. 54, (1992), by Kasai et al.] in the same process as that used as a stable resist material when forming an extremely fine pattern on a semiconductor substrate. It is a stable oxide film material.
【００１８】高純度酸素雰囲気下で形成された酸化膜か
ら成る絶縁膜５を形成した後、測定試料１を装置から大
気中に取り出し、走査容量顕微鏡を用いて容量の２次元
分布を測定する。After forming the insulating film 5 composed of an oxide film formed in a high-purity oxygen atmosphere, the measurement sample 1 is taken out of the apparatus into the atmosphere, and the two-dimensional distribution of the capacitance is measured using a scanning capacitance microscope.
【００１９】次に、本発明の第２の実施の形態について
説明する。図３は本発明の第２の実施の形態の静電容量
測定用絶縁膜形成方法を示す模式的構成図であり、
（ａ）は清浄表面の形成方法、（ｂ）はガリウム層の形
成方法、（ｃ）は絶縁膜の形成方法を示す。図３を参照
すると、本発明の第２の実施の形態は、第１の実施の形
態と同様、測定試料１の測定表面に清浄表面を形成する
工程と、測定試料１上に酸化ガリウム物から成る絶縁膜
５を形成する工程とから成る。この酸化ガリウムから成
る絶縁膜５は、ジャパン・ジャーナル・オブ・アプライ
ド・フィジックス（Ｊｐｎ．Ｊ．Ａｐｐｌ．Ｐｈｙ
ｓ．）、第３２巻、５６６１頁、１９９３年の刀根らに
よる報告によると、本発明の第１の実施の形態おいて端
面保護膜として用いた光酸化膜の成分の中でも特に安定
なものであり端面保護膜として、有効な材料である。Next, a second embodiment of the present invention will be described. FIG. 3 is a schematic configuration diagram showing a method for forming an insulating film for measuring capacitance according to the second embodiment of the present invention.
(A) shows a method for forming a clean surface, (b) shows a method for forming a gallium layer, and (c) shows a method for forming an insulating film. Referring to FIG. 3, the second embodiment of the present invention, like the first embodiment, forms a clean surface on the measurement surface of the measurement sample 1 and forms a gallium oxide material on the measurement sample 1. Forming the insulating film 5. The insulating film 5 made of gallium oxide can be used as a material in the Japan Journal of Applied Physics (Jpn. J. Appl. Phys.
s. According to Tone et al., Vol. 32, p. 5661, 1993, among the components of the photo-oxidized film used as the end face protective film in the first embodiment of the present invention, it is particularly stable, and It is an effective material as a protective film.
【００２０】本発明の第２の実施の形態の工程について
述べる。測定試料１上の清浄表面は、第１の実施の形態
と同様に図２の装置を用いて形成し、図３（ａ）に示す
手順に従い、超高真空雰囲気下で劈開を行い、自然酸化
膜、付着物等の無い清浄な劈開端面が露出した測定試料
１を得る。The steps of the second embodiment of the present invention will be described. The clean surface on the measurement sample 1 is formed using the apparatus shown in FIG. 2 in the same manner as in the first embodiment, and is cleaved in an ultra-high vacuum atmosphere according to the procedure shown in FIG. A measurement sample 1 having a clean cleaved end face without a film, a deposit, or the like is obtained.
【００２１】次に、本発明の第２の実施の形態で、超高
真空雰囲気下において劈開された清浄表面に酸化ガリウ
ム膜を形成する工程について述べる。図３（ｂ）は酸化
ガリウム膜形成工程を示した図である。清浄表面が形成
された測定試料１を第１のマグネットフィードスルー２
５を用いて、処理室２１から交換室２３へ移動し、さら
に、第２のマグネットフィードスルー２６を用いて、交
換室２３から、成長室２２へ移動する。成長室２２はガ
リウム蒸発源３１を備えている。図３（ｂ）に示す様
に、成長室２２において、測定試料１の劈開端面上に、
ガリウム蒸発源３１を用いて、ガリウム分子線３２を照
射し、劈開端面上に数原子層のガリウム層３３を堆積さ
せる。その後、再び、第１、第２のマグネットフィード
スルー２５、２６を用いて、測定試料１を成長室２２か
ら交換室２３を経て処理室２１へ移送する。Next, a step of forming a gallium oxide film on a clean surface cleaved in an ultra-high vacuum atmosphere according to a second embodiment of the present invention will be described. FIG. 3B is a diagram showing a gallium oxide film forming step. The measurement sample 1 on which the clean surface is formed is passed through the first magnet feedthrough 2
5, the wafer is moved from the processing chamber 21 to the exchange chamber 23, and further, is moved from the exchange chamber 23 to the growth chamber 22 using the second magnet feedthrough 26. The growth chamber 22 has a gallium evaporation source 31. As shown in FIG. 3 (b), in the growth chamber 22, on the cleavage end face of the measurement sample 1,
A gallium evaporation source 31 is used to irradiate a gallium molecular beam 32 to deposit a gallium layer 33 of several atomic layers on the cleaved end face. Thereafter, the measurement sample 1 is transferred from the growth chamber 22 to the processing chamber 21 via the exchange chamber 23 again using the first and second magnet feedthroughs 25 and 26.
【００２２】次に、第１の実施の形態と同様に、処理室
２１に、高純度酸素を導入する。そして、第１の実施の
形態と同様の方法で、測定試料１の清浄表面上のガリウ
ム層３２を酸化し、劈開端面に酸化ガリウムからなる絶
縁膜５を形成する。この酸化ガリウム膜から成る絶縁膜
５を形成する際、第１の実施の形態と同様、酸化を促進
させるためハロゲンランプ３によりハロゲンランプ光４
を照射してもよいし、測定試料１の温度をその特性が劣
化しない範囲で上昇させてもよい。Next, high-purity oxygen is introduced into the processing chamber 21 as in the first embodiment. Then, in the same manner as in the first embodiment, the gallium layer 32 on the clean surface of the measurement sample 1 is oxidized, and an insulating film 5 made of gallium oxide is formed on the cleavage end face. When the insulating film 5 made of the gallium oxide film is formed, the halogen lamp light 4 is used by the halogen lamp 3 to promote oxidation, as in the first embodiment.
May be irradiated, or the temperature of the measurement sample 1 may be increased within a range where its characteristics are not deteriorated.
【００２３】酸化ガリウムから成る絶縁膜５を形成後、
第１の実施の形態と同様に、測定試料１を装置から大気
中に取り出し、走査容量顕微鏡を用いて容量の２次元分
布を測定する。After forming the insulating film 5 made of gallium oxide,
As in the first embodiment, the measurement sample 1 is taken out of the apparatus into the atmosphere, and the two-dimensional distribution of the capacitance is measured using a scanning capacitance microscope.
【００２４】[0024]
【実施例】以下本発明の実施例について説明する。第１
の実施例では、測定試料１として、半導体レーザウェー
ハの劈開断面のドーピング２次元分布を走査容量顕微鏡
を用いて測定する場合について述べる。まず、半導体レ
ーザが作製されたウェーハである測定試料１を超高真空
雰囲気下で劈開し、形成された清浄表面に酸化膜から成
る絶縁膜５を形成する工程について述べる。Embodiments of the present invention will be described below. First
In the embodiment, a case will be described in which a two-dimensional doping distribution of a cleavage section of a semiconductor laser wafer is measured as a measurement sample 1 using a scanning capacitance microscope. First, a process of cleaving a measurement sample 1 which is a wafer on which a semiconductor laser is manufactured in an ultra-high vacuum atmosphere and forming an insulating film 5 made of an oxide film on a formed clean surface will be described.
【００２５】半導体レーザウェーハから成る測定試料１
は５ｍｍ角に切断し、あらかじめ、端から２．５ｍｍの
位置に傷を付け、試料固定ジグ固定した状態で、超高真
空雰囲気下の処理室２１に導入する。処理室の真空度は
１×１０-10 Ｔｏｒｒである。続いて、測定試料１の端
に劈開用の板を装着した直線導入器を用いて劈開用の板
を押しつけ、測定試料１を劈開し、試料片２を分離す
る。この結果、劈開を超高真空雰囲気下で行ったため測
定試料１の測定面には、清浄表面が露出している。Measurement sample 1 consisting of a semiconductor laser wafer
Is cut into 5 mm squares, wound in advance at a position 2.5 mm from the end, and introduced into the processing chamber 21 under an ultra-high vacuum atmosphere in a state in which the sample is fixed in a jig. The degree of vacuum in the processing chamber is 1 × 10 −10 Torr. Subsequently, the cleavage plate is pressed against the end of the measurement sample 1 using a straight line introducer having a cleavage plate attached thereto, the measurement sample 1 is cleaved, and the sample piece 2 is separated. As a result, since the cleavage was performed in an ultra-high vacuum atmosphere, a clean surface was exposed on the measurement surface of the measurement sample 1.
【００２６】次に、処理室２１中に、純度９９．９９９
９％の酸素ガスを処理室２１内の圧力が、１気圧になる
まで導入し、測定試料１の温度を１００℃に上昇させた
後、測定試料１の対向位置に配置したハロゲンランプ３
より出力１３８ｍＷ／ｃｍ２のハロゲンランプ光４を１
時間照射し、酸化膜から成る絶縁膜５を形成する。その
後、測定試料１を処理室２１から取り出し、走査容量顕
微鏡を用いて測定試料１の測定表面のドーピング特性の
２次元分布を得る。Next, 99.999 purity is placed in the processing chamber 21.
9% oxygen gas was introduced until the pressure in the processing chamber 21 became 1 atm, the temperature of the measurement sample 1 was increased to 100 ° C., and then the halogen lamp 3 placed at a position facing the measurement sample 1 was used.
From the halogen lamp light 4 having an output of 138 mW / cm2.
Irradiation is performed for a time to form an insulating film 5 made of an oxide film. Thereafter, the measurement sample 1 is taken out of the processing chamber 21 and a two-dimensional distribution of the doping characteristics on the measurement surface of the measurement sample 1 is obtained using a scanning capacitance microscope.
【００２７】次に第２の実施の形態の実施例について説
明する。第１の実施例とは、絶縁膜５として、酸化ガリ
ウム膜を用いている点が異なる。第２の実施例におい
て、測定試料１の測定面上に清浄表面を製作する工程は
第１の実施例の場合と同じであるので省略し、その後の
絶縁膜５を形成する工程についてのみ述べる。Next, an example of the second embodiment will be described. The difference from the first embodiment is that a gallium oxide film is used as the insulating film 5. In the second embodiment, the process of manufacturing a clean surface on the measurement surface of the measurement sample 1 is the same as that of the first embodiment, and therefore will be omitted, and only the subsequent process of forming the insulating film 5 will be described.
【００２８】超高真空雰囲気下の処理室２１において劈
開された測定試料１は真空度１×１０-10 Ｔｏｒｒの交
換室２３を経て、成長室２２（真空度：１×１０-10 Ｔ
ｏｒｒ）へ移送される。次に、成長室２２において、ガ
リウム蒸発源３１により、分子線強度２．３×１０-7Ｔ
ｏｒｒのガリウム分子線３２を照射し、数原子層程度の
ガリウム層３３を形成する。続いて測定試料１を再び交
換室２３を経て、処理室２１へ移送し、ガリウム層３３
を酸化する。酸化の工程および条件は第１の実施例の場
合と同様である。ガリウム層３３を酸化して、酸化ガリ
ウムから成る絶縁膜５を形成した後の測定試料１は、第
１の実施例と同様、処理室２１から取り出した後、走査
容量顕微鏡を用いて測定試料１の測定面のドーピング特
性の２次元分布を得る。The measurement sample 1 cleaved in the processing chamber 21 under an ultra-high vacuum atmosphere passes through the exchange chamber 23 having a vacuum degree of 1 × 10 −10 Torr, and then grows into a growth chamber 22 (vacuum degree: 1 × 10 −10 T).
orr). Next, in the growth chamber 22, the gallium evaporation source 31 uses a molecular beam intensity of 2.3 × 10 −7 T.
A gallium molecular beam 32 of orr is irradiated to form a gallium layer 33 of about several atomic layers. Subsequently, the measurement sample 1 is transferred again to the processing chamber 21 through the exchange chamber 23, and the gallium layer 33 is transferred.
To oxidize. The oxidation process and conditions are the same as in the first embodiment. After the gallium layer 33 is oxidized to form the gallium oxide insulating film 5, the measurement sample 1 is taken out of the processing chamber 21 as in the first embodiment, and is then measured using a scanning capacitance microscope. To obtain a two-dimensional distribution of the doping characteristics on the measurement surface.
【００２９】なお、以上の２つの実施例では、測定試料
１として半導体レーザウェーハについて応用した例につ
いて述べたが、本発明の方法は半導体レーザウェーハに
限ることなく他の素子構造を有するウェーハ、もしく
は、素子そのものに適用することも可能である。In the above two embodiments, an example in which a semiconductor laser wafer is applied as the measurement sample 1 has been described. However, the method of the present invention is not limited to a semiconductor laser wafer, or a wafer having another element structure, or , Can be applied to the element itself.
【００３０】また、本実施例では、絶縁膜５として、酸
化膜を用いた実施例について説明したが、清浄表面形成
後、測定試料１を大気中に取り出すことなく、連続して
厚さ５ｎｍ以下の誘電体を他の成膜装置により測定試料
表面に形成し、同様に走査容量顕微鏡による測定を行っ
てもよい。In this embodiment, the embodiment using an oxide film as the insulating film 5 has been described. However, after forming a clean surface, the measurement sample 1 is continuously taken out to a thickness of 5 nm or less without being taken out to the atmosphere. The dielectric may be formed on the surface of the measurement sample by another film forming apparatus, and the measurement may be similarly performed by a scanning capacitance microscope.
【００３１】[0031]
【発明の効果】以上説明したように、本発明の絶縁膜形
成方法を用いた走査容量顕微鏡による静電容量測定法に
よって、半導体表面のドーピング分布図を正確にかつ安
定して測定することが可能となるという効果がある。As described above, it is possible to accurately and stably measure a doping distribution diagram on a semiconductor surface by a capacitance measuring method using a scanning capacitance microscope using the insulating film forming method of the present invention. This has the effect of becoming
【００３２】これは、測定試料を超高真空雰囲気下で劈
開し、形成された測定試料の清浄な測定面上に半導体自
身の表面、もしくは、同様にして形成された測定試料の
測定面上にガリウムを照射した表面を高純度酸素雰囲気
下で酸化して形成した酸化膜を絶縁膜として用いること
により達成でき、この真空一貫工程により形成された酸
化膜は通常大気中において形成される自然酸化膜とは異
なり、残留炭素等の不純物を含んでいないため、半導体
と絶縁膜との間に存在する表面準位の密度を著しく低減
することができ、また、表面準位に起因する容量の影響
も排除することが可能であり、正確な測定を行うことが
できるからである。In this method, the measurement sample is cleaved under an ultra-high vacuum atmosphere, and the surface of the semiconductor itself is placed on the clean measurement surface of the formed measurement sample or on the measurement surface of the measurement sample similarly formed. This can be achieved by using an oxide film formed by oxidizing the surface irradiated with gallium in a high-purity oxygen atmosphere as an insulating film, and the oxide film formed by this vacuum integrated process is a natural oxide film normally formed in the atmosphere. Unlike the case where the semiconductor layer does not contain impurities such as residual carbon, the density of surface states existing between the semiconductor and the insulating film can be significantly reduced, and the influence of capacitance due to surface states can be reduced. This is because it can be excluded and accurate measurement can be performed.
【図１】図１は本発明の第１の実施の形態の静電容量測
定用絶縁膜形成方法を示す模式的構成図である。（ａ）
は清浄表面の形成方法を示す。（ｂ）は絶縁膜の形成方
法を示す。FIG. 1 is a schematic configuration diagram illustrating a method for forming a capacitance measurement insulating film according to a first embodiment of the present invention. (A)
Indicates a method for forming a clean surface. (B) shows a method for forming an insulating film.
【図２】本発明の第１の実施の形態の静電容量測定用絶
縁膜形成方法を実現するための装置の模式的構成図であ
る。FIG. 2 is a schematic configuration diagram of an apparatus for realizing the method for forming a capacitance measuring insulating film according to the first embodiment of the present invention.
【図３】本発明の第２の実施の形態の静電容量測定用絶
縁膜形成方法を示す模式的構成図である。（ａ）は清浄
表面の形成方法を示す。（ｂ）はガリウム層の形成方法
を示す。（ｃ）は絶縁膜の形成方法を示す。FIG. 3 is a schematic configuration diagram illustrating a method for forming an insulating film for measuring capacitance according to a second embodiment of the present invention. (A) shows a method for forming a clean surface. (B) shows a method for forming a gallium layer. (C) shows a method for forming an insulating film.
【図４】走査型静電容量顕微鏡の模式的構成図である。FIG. 4 is a schematic configuration diagram of a scanning capacitance microscope.
１． 測定試料 ２． 試料片 ３． ハロゲンランプ ４． ハロゲンランプ光 ５． 絶縁膜 ２１． 処理室 ２２． 成長室 ２３． 交換室 ２４． ゲートバルブ ２５． 第１のマグネットフィードスルー ２６． 第２のマグネットフィードスルー ３１． ガリウム蒸着源 ３２． ガリウム分子線 ３３． ガリウム膜 ４１． 試料 ４２． 自然酸化膜 ４３． 探針 ４４． 移動ステージ ４５． 容量測定装置 1. 1. Measurement sample Sample piece 3. Halogen lamp 4. 4. Halogen lamp light Insulating film 21. Processing chamber 22. Growth chamber 23. Exchange room 24. Gate valve 25. First magnet feedthrough 26. Second magnet feedthrough 31. Gallium deposition source 32. Gallium molecular beam 33. Gallium film 41. Sample 42. Natural oxide film 43. Probe 44. Moving stage 45. Capacity measuring device
フロントページの続き (56)参考文献 特開 平10−64965（ＪＰ，Ａ) 特開 平９−21829（ＪＰ，Ａ) 特開 平10−308550（ＪＰ，Ａ) 特開 平８−285869（ＪＰ，Ａ) 特開 平８−304427（ＪＰ，Ａ) 特開 平11−30621（ＪＰ，Ａ) 特開2000−146810（ＪＰ，Ａ) 特開 平５−118806（ＪＰ，Ａ) 特許2612395（ＪＰ，Ｂ２) (58)調査した分野(Int.Cl.7，ＤＢ名) G01N 13/10 - 13/24 G01R 27/26 H01L 21/66 ＩＮＳＰＥＣ（ＤＩＡＬＯＧ)Continuation of the front page (56) References JP-A-10-64965 (JP, A) JP-A-9-21829 (JP, A) JP-A-10-308550 (JP, A) JP-A 8-285869 (JP) JP-A-8-304427 (JP, A) JP-A-11-30621 (JP, A) JP-A-2000-146810 (JP, A) JP-A-5-118806 (JP, A) Patent 2612395 (JP, A) , B2) (58) Fields investigated (Int.Cl. 7 , DB name) G01N 13/10-13/24 G01R 27/26 H01L 21/66 INSPEC (DIALOG)
Claims (7)
測定する際、超高真空雰囲気下で前記半導体試料に清浄
表面を形成し、形成後該半導体試料を大気に触れさせる
ことなく超高真空雰囲気下において保持して前記清浄表
面に絶縁膜を形成し、該絶縁膜を用いて静電容量を測定
することを特徴とする走査容量顕微鏡による静電容量測
定方法。When a surface of a semiconductor sample is measured by a scanning capacitance microscope, a clean surface is formed on the semiconductor sample under an ultra-high vacuum atmosphere , and after the formation, the semiconductor sample is exposed to an ultra-high vacuum atmosphere without being exposed to the atmosphere. capacitance measuring method using a scanning capacitance microscope insulating film is formed on the clean surface and held, and measuring the capacitance with the insulating film in the.
試料を超高真空雰囲気下で劈開することにより形成され
る請求項１に記載の静電容量測定方法。2. The capacitance measuring method according to claim 1, wherein the clean surface of the semiconductor sample is formed by cleaving the semiconductor sample in an ultra-high vacuum atmosphere.
が、該半導体試料の清浄表面を酸素雰囲気下で酸化する
ことによって形成された酸化膜である請求項１に記載の
静電容量測定方法。3. The capacitance measuring method according to claim 1, wherein the insulating film formed on the surface of the semiconductor sample is an oxide film formed by oxidizing a clean surface of the semiconductor sample in an oxygen atmosphere. .
が、該半導体試料の清浄表面を酸素雰囲気下で光を照射
しながら酸化することによって形成された酸化膜である
請求項３に記載の静電容量測定方法。4. The semiconductor device according to claim 3, wherein the insulating film formed on the surface of the semiconductor sample is an oxide film formed by oxidizing a clean surface of the semiconductor sample while irradiating light in an oxygen atmosphere. Capacitance measurement method.
が、該半導体試料の清浄表面を酸素雰囲気下で熱により
酸化することによって形成された酸化膜である請求項３
に記載の静電容量測定方法。5. The semiconductor device according to claim 3, wherein the insulating film formed on the surface of the semiconductor sample is an oxide film formed by thermally oxidizing a clean surface of the semiconductor sample in an oxygen atmosphere.
The capacitance measurement method described in 1.
が、酸化工程の前に該半導体試料の清浄表面にガリウム
分子線を照射し、引き続き該半導体試料表面を酸化する
ことにより該半導体試料表面に形成された酸化ガリウム
膜である請求項１、請求項３から請求項４のいずれか１
項に記載の静電容量測定方法。6. An insulating film formed on the surface of the semiconductor sample, wherein a clean surface of the semiconductor sample is irradiated with a gallium molecular beam before an oxidation step, and the surface of the semiconductor sample is subsequently oxidized. 5. The gallium oxide film formed on the substrate according to any one of claims 1, 3 and 4.
The capacitance measurement method according to the paragraph.
が、厚さ５ｎｍ以下の極めて薄い誘電体膜である請求項
１に記載の静電容量測定方法。7. The capacitance measuring method according to claim 1, wherein the insulating film formed on the surface of the semiconductor sample is an extremely thin dielectric film having a thickness of 5 nm or less.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP34158998A JP3285084B2 (en) | 1998-12-01 | 1998-12-01 | Capacitance measurement method using scanning capacitance microscope |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP34158998A JP3285084B2 (en) | 1998-12-01 | 1998-12-01 | Capacitance measurement method using scanning capacitance microscope |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2000162112A JP2000162112A (en) | 2000-06-16 |
| JP3285084B2 true JP3285084B2 (en) | 2002-05-27 |
Family
ID=18347259
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP34158998A Expired - Fee Related JP3285084B2 (en) | 1998-12-01 | 1998-12-01 | Capacitance measurement method using scanning capacitance microscope |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3285084B2 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3374791B2 (en) | 1999-07-14 | 2003-02-10 | 日本電気株式会社 | Scanning probe microscope and its measuring method |
-
1998
- 1998-12-01 JP JP34158998A patent/JP3285084B2/en not_active Expired - Fee Related
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3374791B2 (en) | 1999-07-14 | 2003-02-10 | 日本電気株式会社 | Scanning probe microscope and its measuring method |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2000162112A (en) | 2000-06-16 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US7538333B1 (en) | Contactless charge measurement of product wafers and control of corona generation and deposition | |
| US5214282A (en) | Method and apparatus for processing a minute portion of a specimen | |
| JP4483583B2 (en) | SOI wafer inspection method, analysis apparatus, and SOI wafer manufacturing method | |
| JP2004226079A (en) | Surface or section processing observation method and its device | |
| JP3054900B2 (en) | Micro processing equipment | |
| JP3285084B2 (en) | Capacitance measurement method using scanning capacitance microscope | |
| US6498502B2 (en) | Apparatus and method for evaluating semiconductor structures and devices | |
| Kirby et al. | Electron beam induced effects on gas adsorption utilizing auger electron spectroscopy: Co and O2 on Si: II. Structural effects | |
| JP5477697B2 (en) | Silicon wafer surface or surface layer evaluation method | |
| Levenets et al. | Chemical stability of HBF4-treated (100) Si surfaces | |
| US5182452A (en) | Method for determining the presence of thin insulating films | |
| JP3387047B2 (en) | Solid selective growth method | |
| JPH0434824A (en) | Method and device for treating microscopic part, and method and device for analysing microscopic part | |
| Rau et al. | Characterization of stacked gate oxides by electron holography | |
| Huerth et al. | Spectroscopy of voltage dependence of oxygen movement in YBa 2 Cu 3 O 7− δ | |
| Astankova et al. | Local anodic oxidation of thin GeO films and formation of nanostructures based on them | |
| JP3369325B2 (en) | Evaluation and analysis method of atoms or molecules on solid surface of semiconductor material | |
| JPH1032234A (en) | Evaluation of soi substrate | |
| JPH06144823A (en) | Production of silicon thin film | |
| JPH03188629A (en) | Fine pattern forming method of semiconductor | |
| JP2002158270A (en) | Method for measuring carrier concentration in semiconductor | |
| JP2826972B2 (en) | Method for forming ultrafine pattern of compound semiconductor | |
| Rousset et al. | Fabrication of submicrometre buried gold-palladium wires on using electron beam lithography | |
| Fuhrmann et al. | Minimizing damage during focused-ion-beam induced desorption of hydrogen | |
| Wang et al. | Patterning SiO 2 thin films using synchrotron radiation stimulated etching with a Co contact mask |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20080308 Year of fee payment: 6 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20090308 Year of fee payment: 7 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20090308 Year of fee payment: 7 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20100308 Year of fee payment: 8 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20100308 Year of fee payment: 8 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20110308 Year of fee payment: 9 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20110308 Year of fee payment: 9 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20120308 Year of fee payment: 10 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20120308 Year of fee payment: 10 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20130308 Year of fee payment: 11 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20130308 Year of fee payment: 11 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20140308 Year of fee payment: 12 |
|
| LAPS | Cancellation because of no payment of annual fees |