JP3276409B2 - Semiconductor wafer polishing method and polishing apparatus - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a polishing method for a semiconductor wafer, and more particularly to a polishing method useful for flattening a wiring layer in a device manufacturing process and thinning a Si layer of a bonded SOI wafer. As the degree of integration of semiconductor devices increases,
As the number of wiring layers increases, the unevenness of the wiring layers increases, and the risk of disconnection increases. As a preventive measure, planarization of the wiring layer becomes more and more important.

[0002] An SOI wafer which is very useful for increasing various functions of a device is at least one of two oxidized wafers bonded together, and the Si layer on one side is polished to a thin film to be used as a device forming layer. .

[0003]

2. Description of the Related Art Generally, commercially available semiconductor devices do not use polishing for planarizing wiring layers. With current devices, wiring is possible without using polishing. However, it is fully anticipated that polishing will be required for the planarization of the wiring layer in the near future. For example, WJPatri
ck and colleagues are actively studying planarization by polishing, and have succeeded in prototypes of actual devices (Journal Electrochem. S
oc., Vol. 138, No. 6, p1778-1784, Jun., 1991). In this method, as shown in FIG. 1, a horizontal conductive portion (horizontal interconnection) 11 is formed on a substrate 10, and then a vertical conductive portion (stud or vertical interconnec
tion) 12 is formed. Next, the SiO ₂ insulating layer 13 is formed by CVD. The insulating layer 13 has an uneven profile according to the arrangement of the horizontal and vertical conductive portions 11 and 12 formed earlier. The insulating layer 13 is polished and removed to the position indicated by the broken line 14 in the figure, and the flattening (polishing) ends when the upper portion of the vertical conductive portion 12 is exposed. For this polishing, a single wafer type polishing apparatus as shown in FIG. 2 is used. Rotary axis 2
The polishing cloth 23 is mounted on the upper surface of the platen 22 which is rotated by 1. The wafer 26 is held on the lower surface of the wafer holding plate 25 rotated by the rotation shaft 24 by suction, the lower surface of the wafer 26 to be polished is brought into contact with the polishing cloth 23, and the abrasive is supplied onto the polishing cloth 23 from above. The polishing is performed by rotating the surface plate 22 and the wafer holding plate 25.

The biggest disadvantage of the above method is that it is practically impossible to finish polishing when the vertical conductive portion 12 is exposed on the entire surface to be polished of the wafer. That is, although a part of the region within the polishing target surface of the wafer can be flattened, a high polishing yield cannot be obtained. Therefore, the above method has not been put to practical use.

On the other hand, the thinning of the Si layer of the bonded SOI wafer is performed according to the procedure shown in FIG. For example, as shown in FIG. 2A, a silicon wafer 31 having an oxide film 33 formed on the surface thereof by thermal oxidation and an Si wafer 32 without an oxide film are prepared, and as shown in FIG. These two
The two wafers 31 and 32 are brought into close contact with each other and superimposed, and are bonded by performing a heat treatment at 900 ° C. for 30 minutes in a nitrogen atmosphere, for example. Next, after grinding the wafer 31 side having the oxide film 33 to a thickness of about 3 μm as shown in FIG. 3C, the wafer 31 is further polished to a thickness of about 2 μm as shown in FIG. This polishing is usually performed using a single-wafer polishing apparatus as shown in FIG. 2, and the polishing amount is controlled by the polishing time. However, since it is inevitable that the polishing amount varies depending on the position within the wafer surface, there is a problem that a high yield cannot be obtained and there is a limit in thinning the Si layer.

[0006]

The present invention can be sufficiently used as a method for planarizing a wiring layer by controlling the amount of polishing at each position on a wafer.
It is an object of the present invention to provide a polishing method capable of uniformly polishing the entire surface of a wafer, which can further reduce the thickness of the layer, and an apparatus for performing the method.

[0007]

In order to achieve the above object, a polishing method according to the present invention comprises the steps of: holding a semiconductor wafer by suction on a holding plate; and applying a polishing cloth mounted on a polishing jig to the wafer to be polished. When the wafer is polished by rotating at least one of the holding plate and the polishing jig while contacting the surface with the polishing agent and supplying the polishing agent through the polishing cloth to the contact portion, suction of the wafer is performed. Applying a voltage between the part and the polishing jig, detecting a voltage and / or a current between the two during polishing, and controlling a polishing rate at each polishing position based on the obtained detection value. Features.

A polishing apparatus for carrying out the polishing method of the present invention comprises a holding plate for holding a semiconductor wafer by suction and a polishing jig arranged so that a polishing cloth mounted on the tip is brought into contact with a surface to be polished of the wafer. Means for supplying an abrasive to the contact portion through the polishing cloth, means for applying a voltage between the suction portion of the wafer and the polishing jig, a voltage between the two during polishing and And / or a means for detecting a current and a means for controlling a polishing rate in accordance with the obtained detection value, wherein at least one of the holding plate and the polishing jig can rotate.

[0009]

According to the present invention, a voltage is applied between the holding plate suction portion of the wafer and the polishing jig, and a voltage and / or current between the two is detected during polishing, and the voltage and / or current is detected based on the detected value. By controlling the polishing rate at each polishing position, the entire surface of the wafer can be highly uniformly polished.

Hereinafter, the present invention will be described in more detail by way of examples with reference to the accompanying drawings.

[0011]

[Embodiment 1] An example of flattening a wiring layer during a device manufacturing process according to the present invention will be described with reference to FIG. In this example, when the interlayer insulating film on the wafer surface is polished, by polishing while measuring the thickness of the interlayer insulating film at each polishing position, a desired interlayer insulating film uniform over the entire wafer surface is obtained.

On the wafer 401, a conductive portion 402 such as a horizontal conductive portion (interconnect) and a vertical conductive portion (stud) is formed on one entire surface, and then an interlayer insulating film 403 is formed. The entire side and lower surfaces of the wafer 401 are covered with an insulating film 404 such as a thermal oxide film. The wafer holding plate 411 of the polishing apparatus is made of a conductive material such as metal, and is rotated by a rotating shaft 412 made of a similar conductive material. The wafer 401 is suction-held on the wafer holding plate 411. This suction is performed by a normal method such as vacuum suction, a suction pad, a wax, and an adhesive.
In the case of performing vacuum suction, a vacuum evacuation passage that opens from the inside of the rotating shaft 412 to the suction surface of the wafer holding plate 411 through the inside of the wafer holding plate 411 is used. Usually, many suction openings are provided so that the wafer can be firmly held on the entire surface.

The rotary polishing jig 421 of the polishing apparatus is a columnar member made of a conductive material such as metal. A polishing cloth 431 is mounted on a lower end surface 422 of the polishing device, and a polishing agent introduced from the upper portion is used for internal polishing. Through the through holes (not shown) of the polishing pad 43
1 is supplied. As the abrasive, those obtained by dispersing fine abrasive grains such as colloidal silica in a solution are generally used. The polishing cloth 431 includes a large number of through paths 432 through which the abrasive grains can freely pass. The abrasive can reduce its specific resistance to a required level by adding an electrolyte. The polishing jig 421 moves in the radial direction of the wafer 401 on the wafer holding plate 411, and can polish an arbitrary radial position of the wafer 401.

The wafer 401 has an insulating film 40 on a part of the lower surface.
4 is removed, and a conductive material 40 such as a conductive paste is
5 are arranged and held in a state of being electrically connected to the wafer holding plate 411. Wafer holding plate 411
DC voltage 441 is applied between the polishing tool 412 and the polishing jig 412, and a current value corresponding to the thickness of the interlayer insulating film 403 is continuously detected by the ammeter 442 at each position on the wafer 401 during polishing. I do.

The polishing is performed, for example, as follows. Wafer 4
01 is held on the wafer holding plate 411 by suction, and a polishing cloth 431 having an area of 1 to 4 cm ² is pressed against the wafer 401 while rotating the wafer holding plate 411. The abrasive is supplied to the polishing cloth 431 via the polishing jig 421. A DC voltage is applied between the polishing jig 421 and the polishing plate 411.
Most of the applied voltage can be applied to the interlayer insulating film 403 by adding an appropriate electrolyte to the polishing agent.

When the polishing of the interlayer insulating film 403 proceeds and the conductive portion 402 is exposed, the polishing agent and the conductive portion 402 are electrically connected to each other and a current flows, and this is detected by the ammeter 442. At this time, the polishing is temporarily stopped, and the polishing jig 421 is stopped.
Is moved outward in the radial direction of the wafer 401, and then the polishing is restarted. On the same radius of the wafer 401, the relative speed between the rotating wafer 401 and the polishing pad 431 becomes substantially constant, and the distribution of the polishing speed is very small. Thus, the polishing jig 421 is gradually moved outward from the vicinity of the center of the wafer 401 to polish the entire wafer 401. Polishing cloth 4
The polishing agent supplied onto the wafer 401 via the base 31 flows from the polishing position to the outside of the wafer 401 due to the centrifugal force generated by the rotation of the wafer 401. Therefore, by moving the polishing position from the inside to the outside of the wafer, the polishing agent can be prevented from being supplied to the polished portion of the wafer 401. When the polishing agent is supplied to the polishing completion portion, a current flows through the conductive portion 402 exposed there, and it becomes difficult to control the polishing currently in progress.

The polishing jig 4 without rotating the wafer 401
When polishing is performed by rotating only the wafer 21, a fluid 462 such as pure water is supplied from a fluid supply port 461 disposed above the central portion of the wafer 401 as shown in FIG.
By forming the outward flow 463 on one surface, it is possible to prevent the supply of the abrasive to the polishing completed portion. As the fluid 462 for this purpose, a liquid and a gas that do not contaminate the wafer and the polishing apparatus are used.

In order to perform polishing, at least one of the polishing plate and the polishing jig may be rotated. However, rotating both of them is most advantageous for uniformly polishing the entire surface of the wafer. In particular, rotating the polishing jig makes the polishing rate uniform within the area of the polishing cloth and facilitates control of the polishing amount at the same radial position on the wafer. When the polishing plate is rotated and the polishing jig is stopped to perform polishing,
As shown in FIG. 6, it is desirable that the width W of the polishing cloth mounting surface 422 of the polishing jig be smaller on the outer side (W2) than on the inner side (W1) in the wafer radial direction. This makes it possible to reduce the difference in the polishing rate due to the difference in the peripheral speed of the polishing plate within the area of the polishing cloth, that is, to make the polishing rate uniform within the area of the polishing cloth.

By increasing or decreasing the polishing rate according to the magnitude of the current value detected at each polishing position, the entire surface of the wafer can be uniformly polished. That is, in the region where the detected current value is small (large), (1) increase (decrease) the polishing pressure,
The polishing speed can be increased (decreased) by (2) increasing (decreasing) the rotational speed of the polishing jig and / or (3) increasing (decreasing) the rotational speed of the wafer holding plate.

The interlayer insulating film was planarized by the method shown in FIG. 5 according to the present invention, and compared with the planarization by the conventional single-wafer polishing apparatus shown in FIG.

<Preparation of Test Wafer> S having a diameter of 150 mm
On the i-wafer 601, W having a diameter of 2 μm and a height of 0.5 μm
(Tungsten) stud (vertical conduction part) 602
A stud pattern shown in FIG. 7 was formed at intervals of 0 mm. On top of that, 1 μm of CVD-SiO ₂ was deposited.

<Polishing Condition> Polishing was started from the center of the polishing wafer according to the present invention, and a DC voltage was applied between the wafer holding plate and the polishing jig, and the current value between the two exceeded a predetermined value. The polishing is temporarily stopped at this point, and the polishing jig is moved outward in the wafer radial direction to restart the polishing. During polishing,
Pure water is supplied to the center of the wafer to form a water flow from the center to the outside on the polished surface of the wafer. Polishing by Conventional Method The polishing amount is simply adjusted by the polishing time by the polishing apparatus of FIG.

<Evaluation of Polishing Result> Each of the 10 wafers was polished under the above polishing conditions, and the peripheral portion was polished within 15 mm (FIG. 7).
CVD on the stud in the area indicated by 603)
After -SiO ₂ is entirely removed, it counted the number of studs that are not removed. FIG. 8 shows the result. While almost 100% of the studs remain when polished according to the present invention, 70% of the studs are removed by polishing in the conventional method.

As described above, according to the present invention, the interlayer insulating film can be extremely uniformly polished over the entire surface of the wafer. Note that, in this embodiment, an example in which polishing control is performed based on a current value has been described. However, similar control can be performed using a potential difference.

[Embodiment 2] An example of thinning the Si layer of a bonded SOI wafer according to the present invention will be described with reference to FIG. In this example, when the Si layer on the wafer surface is polished, by polishing while measuring the thickness of the Si layer at each polishing position, the desired thin film S uniform over the entire wafer surface is obtained.
Obtain an i-layer.

The bonded SOI wafer 501 is prepared by performing the steps up to the grinding shown in FIG. 4C by the procedure already described with reference to FIG. In FIG. 9, the same objects as those in FIG. 3 are denoted by the same reference numerals. That is, SOI
The wafer 501 has a Si layer 3 ground to about 3 μm.
1, a supporting-side wafer 32, and an insulating film 33 interposed therebetween.

Polishing is performed using the same polishing apparatus and polishing agent as in the first embodiment. However, an AC voltage 541 is applied between the wafer holding plate 411 and the polishing jig 421, and a current is detected by an AC ammeter 542. SOI wafer 501
Are held in a state of being electrically connected to the wafer holding plate 411. Polishing is performed, for example, as follows.

The SOI wafer 501 is placed on the wafer holding plate 411.
The polishing pad 431 having an area of 1 to 4 cm ² is attached to the wafer 50 while rotating the wafer holding plate 411.
Press on 1. The abrasive is supplied to the polishing cloth 431 via the polishing jig 421. An AC voltage 541 is applied between the polishing jig 421 and the polishing plate 411. Most of the applied voltage can be applied to the Si layer 31 and the supporting wafer 32 by adding an appropriate electrolyte to the polishing agent. When the resistance value of Si of the support side wafer 32 is reduced, a substantial voltage is applied to the Si layer 31 to be polished.

As the polishing of the Si layer 31 progresses and becomes thinner,
The resistance value of the Si layer 31 decreases and the current value increases.
A reference current value corresponding to a desired Si layer thickness is obtained in advance by an experiment. When the current value reaches this reference value during polishing, the polishing is temporarily stopped, and the polishing jig 421 is moved outward in the radial direction of the wafer 401, and then the polishing is restarted. Wafer 5
On the same radius 01, the relative speed between the rotating wafer 501 and the polishing pad 431 becomes substantially constant, and the distribution of the polishing speed is very small. Thus, the polishing jig 421 is gradually moved outward from the vicinity of the center of the wafer 501 to polish the entire wafer 501. The polishing agent supplied onto the wafer 501 via the polishing cloth 431 flows from the polishing position to the outside of the wafer 501 due to the centrifugal force generated by the rotation of the wafer 501. Therefore, by moving the polishing position from the inside of the wafer to the outside, the polishing agent can be removed from the wafer 501.
Can be prevented from being supplied to the portion where polishing has been completed. When the polishing agent is supplied to the polishing completion portion, a current flows through the conductive portion 402 exposed there, and it becomes difficult to control the polishing currently in progress.

Note that the polishing jig 4 is rotated without rotating the wafer 501.
When polishing is performed by rotating only 21, a fluid such as pure water is supplied to the central portion of the wafer 501 as shown in FIG. 5 to form a flow outward on the surface of the wafer 501. The supply of the abrasive to the portion where polishing has been completed can be prevented. As a fluid for this purpose, a liquid or gas that does not contaminate the wafer and the polishing apparatus is used.

In order to perform polishing, at least one of the polishing plate and the polishing jig may be rotated. However, rotating both of them is most advantageous for uniformly polishing the entire surface of the wafer. In particular, rotating the polishing jig makes the polishing rate uniform within the area of the polishing cloth and facilitates control of the polishing amount at the same radial position on the wafer. When the polishing plate is rotated and the polishing jig is stopped to perform polishing,
As shown in FIG. 6, it is desirable that the width W of the polishing cloth mounting surface 422 of the polishing jig be smaller on the outer side (W2) than on the inner side (W1) in the wafer radial direction. This makes it possible to reduce the difference in the polishing rate due to the difference in the peripheral speed of the polishing plate within the area of the polishing cloth, that is, to make the polishing rate uniform within the area of the polishing cloth.

The thickness of the Si layer of the bonded SOI wafer was reduced by the method shown in FIG. 9 according to the present invention, and compared with the reduction by the conventional single-wafer polishing apparatus shown in FIG.

<Preparation of Test Wafer> S having a diameter of 150 mm
The i-wafer was subjected to the grinding shown in FIG. 3C to prepare an SOI wafer having a Si layer thickness of 3 μm.

<Polishing Conditions> Polishing according to the present invention Polishing was started from the center of the wafer, an AC voltage was applied between the wafer holding plate and the polishing jig, and the current value between the two exceeded a predetermined value. The polishing is temporarily stopped at this point, and the polishing jig is moved outward in the wafer radial direction to restart the polishing. During polishing,
Pure water is supplied to the center of the wafer to form a water flow from the center to the outside on the polished surface of the wafer. Polishing by Conventional Method The polishing amount is simply adjusted by the polishing time by the polishing apparatus of FIG.

<Evaluation of Polishing Result> With the target of a Si layer thickness of 1 μm, 10 wafers were polished under each of the above polishing conditions, and the thickness of the Si layer at one central portion of the polished wafer and four peripheral portions was polished. Was measured. The result is shown in FIG. In the case of polishing according to the present invention, the average thickness of the Si layer is 0.95 μm and the variation in the thickness is 0.05 μm on the other hand, whereas in the conventional polishing, the average thickness of the Si layer is 1.10 μm and the thickness is 1.10 μm. The average variation was 0.5 μm. As described above, according to the present invention, it is possible to make the film more uniform and thinner than the conventional method.

In this embodiment, an example is shown in which polishing is controlled by a current value. However, similar control can be performed by using a potential difference.

[0037]

As described above, according to the present invention,
By controlling the amount of polishing at each position on the wafer, the entire surface of the wafer is uniformly polished, which is sufficiently practical as a method for flattening the wiring layer, and the Si layer of the SOI wafer can be further thinned.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view showing a polishing method for planarizing an interlayer insulating film in a device manufacturing process by a conventional method.

FIG. 2 is an arrangement view showing an apparatus and a method for polishing a wafer by a conventional method.

FIG. 3 is a cross-sectional view illustrating an example of a process of manufacturing a bonded wafer.

FIG. 4 is a layout diagram showing an example of a polishing apparatus and a polishing method for flattening an interlayer insulating film in a device manufacturing process according to the present invention.

FIG. 5 is a layout diagram showing another example of a polishing apparatus and a polishing method for flattening an interlayer insulating film in a device manufacturing process according to the present invention.

FIG. 6 is a view showing an example of a polishing cloth mounting surface shape in the polishing apparatus of the present invention.

FIG. 7 is a plan view showing an arrangement pattern of studs on a test wafer used for a polishing test.

FIG. 8 is a graph showing a polishing result of the wafer of FIG. 7;

FIG. 9 shows a bonded SOI wafer according to the present invention;
FIG. 3 is a layout view showing an example of a polishing apparatus and a polishing method for thinning an i-layer.

FIG. 10 is a graph showing a polishing result of a bonded SOI wafer.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 10 ... Semiconductor substrate 11 ... Horizontal conductive part (horizontal interconnection) 12 ... Vertical conductive part (stud or vertical interconnec)
13) SiO ₂ insulating layer by CVD 14 ... Polishing end position 21 ... Rotating shaft 22 ... Rotating platen 23 ... Polishing cloth 24 ... Rotating shaft 25 ... Rotating wafer holding plate 26 ... Wafer 31 ... Si wafer 32 ... Si wafer 33: an oxide film formed by thermal oxidation 401: a Si wafer 402: a conductive portion such as a lateral conductive portion (interconnect) and a vertical conductive portion (stud) 403: an interlayer insulating film 404: an insulating film 405 such as a thermal oxide film A conductive material such as a conductive paste disposed on a part of the lower surface of the wafer 401 411: a wafer holding plate (made of a conductive material such as a metal) of a polishing apparatus 412: a rotation axis (such as a metal) of the wafer holding plate 411 421: Rotary polishing jig of polishing apparatus (made of conductive material such as metal) 422: Lower end surface of polishing jig 421 (polishing cloth mounting surface) W: width of the polishing cloth mounting surface 422 of the polishing jig 421 431: polishing cloth 432: many through paths through which polishing abrasive grains can freely pass 441: applied between the wafer holding plate 411 and the polishing jig 412 DC voltage 442... Ammeter 461... Fluid supply port 462 arranged above the central portion of wafer 401 462... Fluid such as pure water 463. 542: AC voltmeter 601: Wafer 602: W stud

Continuation of the front page (56) References JP-A-61-8943 (JP, A) JP-A-2-100321 (JP, A) JP-A-1-210257 (JP, A) (58) Fields investigated (Int) .Cl. ⁷ , DB name) H01L 21/304 B24B 37/00 B24B 37/04

Claims (4)

(57) [Claims] 1. A semiconductor wafer is sucked and held on a holding plate,
A polishing cloth attached to a polishing jig is brought into contact with a surface to be polished of the wafer, and at least one of the holding plate and the polishing jig is rotated while supplying an abrasive through the polishing cloth to the contact portion. When the wafer is polished, a voltage is applied between the suction portion of the wafer and the polishing jig, and a voltage and / or current between the two is detected during polishing. Semiconductor that controls the polishing rate at each polishing position based on
A method for polishing a wafer, wherein the polishing position is sequentially changed from the radially inner side to the outer side of the wafer.
Moved and polished, and the detected current value is lower than the reference value.
Polishing when the above or detected voltage value is below the reference value
Control to move the position radially outward of the wafer.
Polishing a semiconductor wafer, characterized in that that. Polished surface according to claim 2, wherein said wafer has a layer of conductive material of the lower and outermost layer made of an insulating material, the polishing according to claim 1, characterized in that a DC voltage is applied as the voltage Method. Polished surface of claim 3, wherein said wafer has a layer of the outermost layer and the insulator thereunder made of semiconductor, the polishing method according to claim 1, characterized in that an AC voltage is applied as the voltage . 4. A holding plate for holding a semiconductor wafer by suction,
A polishing jig arranged so that the polishing cloth attached to the tip thereof is brought into contact with the surface to be polished of the wafer, a means for supplying the polishing agent to the contact portion by transmitting the polishing cloth, and a suction part of the wafer; Means for applying a voltage to the polishing jig, means for detecting a voltage and / or current between the two during polishing, and means for controlling the polishing rate in accordance with the detected value obtained. A polishing apparatus for a semiconductor wafer in which at least one of the holding plate and the polishing jig is rotatable, comprising means for moving the contact portion smaller than a radius of the wafer in a radial direction of the wafer. For polishing semiconductor wafers.