JP3274576B2 - Timing extraction circuit and timing extraction method - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a timing extracting circuit for extracting a timing with high accuracy when sampling a received signal in digital subscriber line transmission.

[0002]

2. Description of the Related Art FIG.
There was something like that shown. FIG. 3 is a block diagram showing a configuration of a conventional timing extraction circuit. In FIG.
31 is a line equalizing circuit that equalizes the waveform of the received signal and outputs an equalized signal. 32 is a circuit that receives the equalized signal, performs sampling with the timing signal output from the timing generating circuit, performs AD conversion to a digital signal, and performs sampling data. Is an A / D conversion circuit that outputs as

Reference numeral 36 denotes an isolated pulse detection circuit which receives and determines sampling data, detects an isolated pulse from the sampling data, and outputs an isolated pulse detection signal. When a bit "1" is input, it is determined as an isolated pulse and an isolated pulse detection signal is output. A peak value detection circuit 35 detects a peak level (peak value) of a received signal from sampling data input from the AD conversion circuit, monitors an isolated pulse detection signal, and detects an isolated pulse when detecting an isolated pulse. Is detected, and a pulse peak value signal indicating this is output.

[0004] Also, 34 receives the pulse peak value signal from the peak value detection circuit 35 and evaluates the phase of the signal, that is, detects the phase shift (leading or lag) of the timing signal with respect to the received signal, and detects the timing signal. A timing control circuit that outputs a timing control signal to correct the phase shift of the timing control circuit; and 33 is a timing generation circuit that changes the frequency of the timing signal output therefrom according to the information of the timing control signal received from the timing control circuit. is there.

Next, the operation of the conventional timing extraction circuit will be described with reference to FIG. The received signal received by the line equalization circuit 31 is waveform-equalized, AD-converted into a digital signal by an AD conversion circuit 32, and output as sampling data. Upon receiving the sampling data, the isolated pulse detection circuit 36 detects an isolated pulse from the sampling data and outputs an isolated pulse detection signal. When receiving the isolated pulse detection signal, the peak value detection circuit 35 detects the peak value of the received sampling data at the same time, and outputs a pulse peak value signal indicating the peak value.

The timing control circuit 34 having received the pulse peak value signal detects a phase shift of the timing signal with respect to the sampling data from the received signal, that is, the peak value of the sampling data, and detects a timing for correcting the phase shift. Outputs control signal. As a method, for example, when the pulse peak value signal is separated from a desired pulse peak value, control is performed in a direction opposite to the previous timing control for the timing signal (leading or lagging). I do. The timing generation circuit 33 controls the timing signal with respect to the received signal by changing the frequency of the timing signal and outputting it in accordance with the information of the received timing control signal.

As described above, even in the conventional timing extracting circuit, the timing suitable for the received signal is extracted by controlling the timing signal in such a direction that the peak value of the isolated pulse becomes a desired signal level. be able to.

[0008]

However, in the above-mentioned conventional timing extracting circuit, stable and accurate timing control for the timing signal cannot be performed unless the sampling period is shortened. Also, the fluctuation of the peak value due to the timing shift is small, so that it is susceptible to noise. There was a problem that it was easy to receive.

Accordingly, the present invention has been made in view of the above-mentioned problems, and has been made in the digital subscriber line transmission system.
It is an object of the present invention to provide a timing extraction circuit capable of easily and accurately extracting a sampling timing for sampling a received signal.

[0010]

In order to achieve the above object, a timing extracting circuit according to the present invention has a line equalizing circuit for equalizing a waveform of a received signal and outputting an equalized signal, and a timing equalizing circuit for converting the equalized signal to a timing signal. An AD conversion circuit that samples and AD-converts and outputs sampling data; an isolated pulse detection circuit that detects an isolated pulse from the sampling data and outputs an isolated pulse detection signal indicating the detection of the isolated pulse; An edge detection circuit for detecting an edge of the isolated pulse signal from the pulse detection signal and outputting an edge level signal indicating the edge level of the edge; receiving the edge level signal and comparing the edge level with a threshold value and comparing the result A timing control circuit that outputs a timing control signal including And it is characterized in that comprising a timing generation circuit for outputting a timing signal change the number.

Further, the timing extracting circuit according to the present invention comprises:
In order to achieve the above object, a line equalizing circuit that equalizes the waveform of a received signal and outputs an equalized signal, an AD converter that samples the equalized signal with a timing signal, performs A / D conversion, and outputs sampling data, An isolated pulse detection circuit that detects an isolated pulse from the sampling data and outputs an isolated pulse detection signal indicating the detection of the isolated pulse; and an edge of the isolated pulse signal that is detected from the sampling data and the isolated pulse detection signal. An edge detection circuit that outputs an edge level signal indicating a level; an isolated pulse evaluation circuit that obtains a slope of an isolated pulse when receiving an isolated pulse detection signal and outputs a pulse waveform evaluation signal indicating an evaluation result of the slope; Receiving the signal and the pulse waveform evaluation signal, and changing the threshold and A variable timing control circuit that compares the di-level signal and outputs a timing control signal including the comparison result, and a timing generation circuit that outputs a timing signal whose frequency is changed in accordance with the comparison result indicated by the timing control signal. It is characterized by the following.

Further, the timing extracting method according to the present invention comprises:
In order to achieve the above object, a received signal is equalized in waveform, an equalized signal is output, the equalized signal is sampled by a timing signal, A / D converted, sampled data is output, and an isolated pulse is detected from the sampled data. Outputting an isolated pulse detection signal indicating the detection of the isolated pulse; detecting an edge of the isolated pulse signal from the sampling data and the isolated pulse detection signal; outputting an edge level signal indicating an edge level of the edge; Receiving an edge level, comparing the edge level with a threshold, outputting a timing control signal including the comparison result, and outputting a timing signal whose frequency is changed in accordance with the comparison result of the timing control signal. When a pulse is detected, the edge level of that edge is detected from the sampling data and compared with a threshold. According comparison result, characterized in that it has to change the frequency of the timing signal.

Further, the timing extracting method according to the present invention comprises:
In order to achieve the above object, a received signal is equalized in waveform, an equalized signal is output, the equalized signal is sampled by a timing signal, A / D converted, sampled data is output, and an isolated pulse is detected from the sampled data. An isolated pulse detection signal indicating the detection of the isolated pulse is output, an edge of the isolated pulse signal is detected from the sampling data and the isolated pulse detection signal, and an edge level signal indicating an edge level of the edge is output. When the signal is received, the slope of the isolated pulse is obtained, a pulse waveform evaluation signal indicating the evaluation result of the slope is output, and the edge level signal and the pulse waveform evaluation signal are received, and the threshold is changed according to the evaluation result of the slope of the isolated pulse. The value is compared with the edge level signal, a timing control signal including the comparison result is output, and the timing control signal is indicated. Each step of outputting a timing signal whose frequency has been changed in accordance with the comparison result.When an isolated pulse is detected, the edge level of the edge and the slope of the isolated pulse are obtained from the sampling data, and the slope is determined according to the slope of the isolated pulse. The threshold value is changed, the edge level is compared with the changed threshold value, and the frequency of the timing signal is changed according to the comparison result.

[0014]

The timing extraction circuit and the timing extraction method according to the present invention are configured as described above, and in a digital subscriber line transmission system, a received signal is waveform-equalized by a line equalization circuit, and the equalized signal is AD-converted. The circuit samples by the timing signal output from the timing generation circuit, outputs digital sampling data, and detects an isolated pulse from the sampling data output from the AD conversion circuit in the isolated pulse detection circuit. An isolated pulse detection signal is output, and the edge detection circuit detects a rising edge of the isolated pulse based on the isolated pulse signal and the sampling data,
The detected edge level is output to the timing control circuit as an edge level signal.

The timing control circuit outputs a timing control signal corresponding to the edge level of the edge level signal to the timing generation circuit, and the timing generation circuit changes the frequency of the timing signal output therefrom in accordance with the content of the timing control signal. By controlling it,
Sampling timing that matches the received signal can be extracted with high accuracy.

Further, an isolated pulse evaluation circuit and a variable timing control circuit are provided, and an edge level evaluation condition of the variable timing control circuit is switched according to an evaluation result of a slope of a received waveform detected by the isolated pulse evaluation circuit. Thus, more accurate timing control can be performed.

[0017]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below in detail with reference to the accompanying drawings, FIGS. FIG. 1 is a block diagram illustrating a configuration of a timing extraction circuit according to a first embodiment of the present invention, and FIG. 2 is a block diagram illustrating a configuration of a timing extraction circuit according to a second embodiment of the present invention.

First, the configuration of the timing extraction circuit in the first embodiment will be described with reference to FIG. FIG.
, 11 is a line equalizing circuit that returns the waveform of the received signal to its original shape, that is, a so-called waveform equalizing circuit that outputs an equalized signal.
Reference numeral 2 denotes an AD conversion circuit that receives an equalization signal from the line equalization circuit 11, samples the timing signal output from the timing generation circuit, AD-converts the digital signal into a digital signal, and outputs the digital signal as sampling data.

Reference numeral 16 denotes an isolated pulse detection circuit which receives and determines the sampling data, detects an isolated pulse from the sampling data, and outputs an isolated pulse detection signal. When 1 bit “1” is received after bit continuation “0”, it is determined as an isolated pulse and an isolated pulse detection signal is output. Reference numeral 15 denotes an edge level signal indicating the edge level of the isolated pulse signal observed from the sampled data when the sampling data is received from the AD conversion circuit 12 and the isolated pulse detection signal is received from the isolated pulse detection circuit 16. Is an edge detection circuit that outputs.

Further, 14 evaluates the edge level based on the edge level signal from the edge detection circuit 15 (as described later, compares whether the voltage of the edge level is higher or lower than the threshold value VTH) and responds to it. The timing control circuit 13 outputs a timing control signal having a value to be changed. Information 13 of the timing control signal from the timing control circuit 14 indicates whether the edge level voltage is higher or lower than the threshold value VTH.
Is a timing generation circuit which changes the frequency of a timing signal output therefrom in response to the timing signal.

Next, the operation of the timing extraction circuit according to the first embodiment will be described with reference to FIG. First, the received signal received by the line equalizing circuit 11 is waveform-equalized, AD-converted into a digital signal by the AD conversion circuit 12, and output as sampling data.
The isolated pulse detection circuit 16 receives the sampling data, detects an isolated pulse from the sampling data, and outputs an isolated pulse detection signal. As a method for detecting an isolated pulse, for example, when a 1-bit "1" is received after a 4-bit continuous "0", it is determined to be an isolated pulse detection, and an isolated pulse detection signal is output. There is.

When the edge detection circuit 15 receives the isolated pulse detection signal from the isolated pulse detection circuit 16, the edge detection circuit 15 regards the waveform portion at the sampling point several samples before the received signal as an edge of the waveform, The sampling data is output as an edge level signal. The timing control circuit 14 receives the edge level signal, evaluates the edge level as described with reference to FIG. 4 below (comparisons the edge level with a threshold value), and advances the phase of the timing signal to the timing generation circuit 13. A timing control signal indicating whether to delay or delay is output.

FIG. 4 is an explanatory diagram showing the principle of the timing control. FIG. 4A is a diagram showing the relationship between the received signal and the sampling time in the first embodiment of the present invention. (B) is a diagram showing a relationship between a received signal and a sampling time in the second embodiment of the present invention. 4A and 4B show the output waveform of the line equalization circuit 11 and the sampling timing of the AD conversion circuit 12 when the timing signal is twice the data rate (T) (T / 2).

Hereinafter, description will be made with reference to FIG.
The isolated pulse detection circuit 16 determines the presence or absence of a pulse and whether the pulse is an isolated pulse at the data rate based on the level of the sampling data. Then, when the sampling data at the position of the time axis 0 shown in FIG. 4A is determined as an isolated pulse and detected, and an isolated pulse detection signal is output, the edge detection circuit 15 outputs one sample before (−− The sampling data of T / 2) is regarded as an edge, and the sampling data is output as an edge level signal.

The timing control circuit 14 receives the edge level signal (sampling data at time -T / 2), compares it with the threshold level VTH, and if the edge level signal is larger than the threshold level VTH. Controls the phase of the timing signal to advance with respect to the received signal assuming that the timing signal is delayed, and conversely, if the timing signal is small, the phase of the timing signal is delayed assuming that the timing signal is advanced. A timing control signal is output to the timing generation circuit 13 to perform control.

Thus, according to the first embodiment,
Since an isolated pulse capable of correctly observing the rising waveform of the pulse is detected, and the rising edge of the pulse is compared with the signal level to perform timing control, the sampling cycle can be shortened (2 times the baud rate). This has the effect that highly accurate timing extraction can be realized with a simple circuit.

Next, the configuration of the timing extraction circuit in the second embodiment will be described with reference to FIG. FIG.
In FIG. 7, components having the same reference numerals as those in FIG. The second embodiment is different from the first embodiment in that the variable timing control circuit 24 is provided in place of the timing control circuit 14 shown in FIG. An isolated pulse evaluation circuit that evaluates sampling data based on a signal and outputs a pulse waveform evaluation signal is provided.

Next, the operation of the timing extracting circuit according to the second embodiment will be described with reference to FIG. In the operation of the second embodiment, a detailed description of the same operation as that of the first embodiment is omitted. First, upon receiving an isolated pulse detection signal from the isolated pulse detection circuit 16, the isolated pulse evaluation circuit 27 evaluates the rising level of the isolated pulse from sampling data output from the AD conversion circuit in response to the reception (the method). In the present embodiment, for example, the rising slope of an isolated pulse is determined, but this will be described in detail later with reference to FIG. Then, a pulse waveform evaluation signal having the evaluation result is output to the variable timing control circuit 24.

In the variable timing control circuit 24,
As described in detail below, the timing control is performed by switching the evaluation condition for evaluating the edge level signal from the edge detection circuit 15 according to the content of the pulse waveform evaluation signal.

The variable timing control circuit 24 described above
The operation of the isolated pulse evaluation circuit 27 will be described in more detail with reference to FIG. For example, when there is a bridge tap in the transmission line, as shown in FIG. 4B, the peak of the waveform is shifted, and the rising characteristic of the isolated pulse may be changed. Therefore,
The isolated pulse evaluation circuit 27 calculates the rising slope of the isolated pulse. For example, by observing the height of the edge level, if it is high, it is determined that the inclination is gentle, and if it is low, it is determined that the inclination is steep.

If the slope is gentle, it means that the change is observed as being delayed by the time t, for example, as shown in FIG. 4B, and the variable timing control circuit 24 compares it with the edge level signal. Threshold from VTH to VTH
A pulse waveform evaluation signal is output to the variable timing control circuit 24 as an instruction signal to instruct the variable timing control circuit 24 to increase the signal to 2. Conversely, when the slope is steep, the variable timing control circuit 24 outputs a pulse waveform evaluation signal as an instruction signal for instructing the threshold value to be compared with the edge level signal to decrease from VTH.
Output to

The variable timing control circuit 24 switches the evaluation condition for evaluating the edge level according to the instruction of the pulse waveform evaluation signal input from the isolated pulse evaluation circuit 27. It sets the threshold, for example, VTH, as described above.
To VTH2, and compares the changed threshold value VTH2 with the edge level of the edge level signal, and outputs a timing control signal including the result of the comparison to the timing generation circuit 13. As a result of the comparison, when it is determined that the edge level signal is larger than the threshold level VTH2, the timing generation circuit 13 determines that the timing signal is delayed and moves the phase of the timing signal forward with respect to the received signal. On the other hand, if it is smaller, it is assumed that the timing signal is advanced, and the phase of the timing signal is controlled to be delayed.

In the second embodiment, as described above, the variable timing control circuit 2 is controlled in accordance with the shape of the isolated pulse waveform.
By switching the edge level evaluation condition of No. 4, timing extraction can be performed with higher accuracy, and transmission lines with more various characteristics can be handled.

[0034]

The timing extracting circuit according to the present invention is constructed as described above, and in particular, is provided with an edge detecting circuit for detecting an edge of a received signal, so that the timing extracting circuit can detect a rising edge of an isolated pulse signal. By performing phase evaluation (determination of lead / lag),
More accurate sampling timing phase control is now possible.

Also, by providing an isolated pulse evaluation circuit to switch the phase evaluation condition in accordance with the rising waveform of the isolated pulse, a circuit or transmission line having various characteristics including a bridge tap can be used. Thus, phase control can be performed with high accuracy.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a configuration of a timing extraction circuit according to a first embodiment of the present invention.

FIG. 2 is a block diagram illustrating a configuration of a timing extraction circuit according to a second embodiment of the present invention;

FIG. 3 is a block diagram showing a configuration of a conventional timing extraction circuit.

4A and 4B are explanatory diagrams showing the principle of timing control according to the present invention, in which FIG. 4A shows a relationship between a received signal and a sampling time in the first embodiment of the present invention, and FIG. FIG. 7 is a diagram showing a relationship between a received signal and a sampling time in the second embodiment.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 11 Line equalization circuit 12 AD conversion circuit 13 Timing generation circuit 14 Timing control circuit 15 Edge detection circuit 16 Isolated pulse detection circuit 24 Variable timing control circuit 27 Isolated pulse evaluation circuit 31 Line equalization circuit 32 AD conversion circuit 33 Timing generation circuit 34 Timing control circuit 35 Peak value detection circuit 36 Isolated pulse detection circuit

──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int.Cl. ⁷ , DB name) H04L 7/02 H04L 7/033

Claims (4)

(57) [Claims] A line equalizing circuit that equalizes the waveform of a received signal and outputs an equalized signal; an AD converter circuit that samples the equalized signal with a timing signal, performs AD conversion on the signal, and outputs sampling data; An isolated pulse detection circuit for detecting an isolated pulse from the data and outputting an isolated pulse detection signal indicating the detection of the isolated pulse; and detecting an edge of the isolated pulse signal from the sampling data and the isolated pulse detection signal and detecting an edge of the edge. An edge detection circuit that outputs an edge level signal indicating a level; a timing control circuit that receives the edge level signal, compares the edge level with a threshold value, and outputs a timing control signal including a result of the comparison; A timing generating circuit for outputting a timing signal whose frequency is changed in accordance with the comparison result Timing extraction circuit, characterized in that it consists. 2. A line equalizing circuit for waveform-equalizing a received signal and outputting an equalized signal; an AD converting circuit for sampling the equalized signal with a timing signal, performing A / D conversion and outputting sampling data; An isolated pulse detection circuit for detecting an isolated pulse from the data and outputting an isolated pulse detection signal indicating the detection of the isolated pulse; and detecting an edge of the isolated pulse signal from the sampling data and the isolated pulse detection signal and detecting an edge of the edge. An edge detection circuit that outputs an edge level signal indicating a level; an isolated pulse evaluation circuit that determines a slope of an isolated pulse when receiving an isolated pulse detection signal and outputs a pulse waveform evaluation signal indicating an evaluation result of the slope; A threshold changed upon receiving a level signal and a pulse waveform evaluation signal and evaluating the result of the inclination of the isolated pulse And a variable timing control circuit that compares the edge level signal with the edge level signal and outputs a timing control signal including the comparison result, and a timing generation circuit that outputs a timing signal whose frequency is changed in accordance with the comparison result indicated by the timing control signal And a timing extraction circuit. 3. Equalizing a received signal to output an equalized signal, sampling the equalized signal with a timing signal, and
D-converted and outputs sampling data, detects an isolated pulse from the sampling data, outputs an isolated pulse detection signal indicating the detection of the isolated pulse, and outputs an edge of the isolated pulse signal from the sampling data and the isolated pulse detection signal. And outputs an edge level signal indicating the edge level of the edge, receives the edge level signal, compares the edge level with a threshold value, and outputs a timing control signal including the comparison result. And outputting a timing signal whose frequency has been changed in accordance with the comparison result.When an isolated pulse is detected, an edge level of the edge is detected from the sampling data and compared with a threshold value. A timing extraction method characterized by changing a frequency of a timing signal according to a result. 4. Equalizing a received signal to output an equalized signal, sampling the equalized signal with a timing signal, and
D-converted and outputs sampling data, detects an isolated pulse from the sampling data, outputs an isolated pulse detection signal indicating the detection of the isolated pulse, and outputs an edge of the isolated pulse signal from the sampling data and the isolated pulse detection signal. And outputs an edge level signal indicating the edge level of the edge, and upon receiving an isolated pulse detection signal, calculates the slope of the isolated pulse and outputs a pulse waveform evaluation signal indicating the evaluation result of the slope. Receiving the signal and the pulse waveform evaluation signal, comparing the threshold value changed according to the evaluation result of the inclination of the isolated pulse with the edge level signal, outputting a timing control signal including the comparison result, and indicating the timing control signal. Each step of outputting a timing signal whose frequency has been changed in accordance with the comparison result. The edge level of the edge and the slope of the isolated pulse are obtained from the sampled data when is detected, the threshold is changed according to the slope of the isolated pulse, and the edge level is compared with the changed threshold. Wherein the frequency of the timing signal is changed according to the comparison result.