JP3270229B2 - Snubber circuit and power converter - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a snubber circuit of a power converter using a semiconductor switching element and a power converter using the circuit, and in particular, suppresses generation of excessive voltage at the time of reverse recovery of a snubber diode. And a power conversion circuit.

[0002]

2. Description of the Related Art FIGS. 33 to 36 are diagrams for explaining the configuration and operation of a power conversion device having a snubber circuit according to the prior art, and FIG. 37 is a diagram for explaining the situation of a reverse voltage applied to a snubber diode. . 33 to 36, 10
0 is a DC power supply, 101 to 106 are IGBTs, 101a,
102a is a freewheel diode, 110, 111
Is a snubber diode, 112 and 113 are snubber capacitors, and 114 and 115 are snubber resistors.

[0003] A conventional power converter shown in the figure is an example of a three-phase two-level inverter circuit using an IGBT as a switching element.
The power is supplied to a load such as a motor having 200 v and 200 w. In this conventional technique, an excessive reverse voltage is generated in the snubber diode due to the timing of the switching of the other phase and the switching of the own phase. Below, this phenomenon
A mode that occurs in the snubber diode 111 on the lower side of the u- phase in the illustrated circuit will be described as an example.

Now, it is assumed that the IGBT 101 on the upper side of the u phase, the IGBT 104 on the lower side of the v phase, and the IGBT 106 on the lower side of the w phase are on, and the current shown in FIG. At this time, the u-phase lower snubber capacitor 113 is charged to the voltage E of the DC power supply 100.

In the state described above, the IGBT 104 on the lower side of the v-phase
Is turned off and the v-phase upper IGBT 103 is turned on, the path of the load current shown in FIG.
Changes as shown in FIG. At this time, the positive-side terminal of the u-phase lower snubber capacitor 113 (A in FIG. 34)
The potential at point (dot) temporarily decreases due to the back electromotive force of the stray inductance 100a with respect to the increase in the current in the path shown in FIG. 34, and a part of the charge of the snubber capacitor 113 is discharged in the path shown in FIG.

[0006] Thereafter, when the current path is increased to a steady state, shown as, since the counter electromotive force of the stray inductance 100a disappears, the potential of the point A rises again to the voltage E, in this case, u phase lower and Figure 35 the charging current flows as shown in the snubber capacitor 113 and the snubber diode 111. As described above, a current may flow through the u-phase snubber diode 111 due to the influence of the switching of the other phase, the v-phase.

When the IGBT 102 on the lower side of the u-phase is turned on while the current due to the influence of the switching of the other phase is flowing, the electric charge of the snubber capacitor 113 on the lower side of the u-phase is discharged through the path shown in FIG. Then, a reverse recovery current as indicated by a broken line flows through the snubber diode 111, and a reverse voltage is generated. The peak value V _RP of this reverse voltage is
The peak value V _RP of the reverse voltage immediately after the current starts to flow through the snubber diode changes very much depending on the time Δt from when the other phase switches and the current starts to flow through the snubber diode until the IGBT of the own phase turns on. It will be big.
As shown in FIG. 37, the peak value V _RP of the reverse voltage is ΔΔ
After increasing once with the passage of t, it decreases to a certain size.

The large value of the reverse voltage V _RP often exceeds the withstand voltage of the snubber diode and causes the snubber diode to be destroyed. The reason why the peak value of the reverse voltage is large immediately after the current starts flowing through the snubber diode is as follows.

Now, it is assumed that the snubber diode changes from a reverse bias state to a forward bias state. At this time,
The carrier inside the diode gradually spreads from the pn junction of the diode to the entire inside of the diode. Also,
It is assumed that the snubber diode changes from a forward bias state to a reverse bias state. At this time, a depletion layer extends from the pn junction of the diode, and carriers are gradually swept out. Then, the discharged carrier becomes a reverse recovery current.

Here, immediately after the snubber diode shifts from the reverse bias state to the forward bias state, the carrier becomes p
Consider a case where the state is shifted to the reverse bias state again in a state where the state exists only near the n-junction. In this case, if the carriers in the pn junction are swept out due to the expansion of the depletion layer, then no carriers are present, so that the reverse recovery current sharply decreases, and the steep current at this time. Causes a large reverse voltage.

In the illustrated prior art, such a large reverse voltage cannot be suppressed by the snubber resistor 115.

As a prior art related to a power converter having a snubber circuit capable of absorbing such a reverse voltage and suppressing the reverse voltage, for example, Japanese Patent Application Laid-Open No. 3-10732 discloses
The technique described in Japanese Patent Publication No. 8 and the like is known.

In this prior art, in a power converter using a semiconductor switching element, an excessive oscillation voltage generated at the time of reverse recovery of a snubber diode in a snubber circuit causes a malfunction of a drive circuit of the semiconductor element or a control circuit of the power converter. In order to prevent this, an RC snubber for a snubber diode composed of a series circuit of a resistor and a capacitor is connected to the snubber diode.

[0014]

However, the aforementioned R-
The conventional technique using the C snubber has a problem that it is difficult to sufficiently suppress excessive voltage generated at the time of reverse recovery of the snubber diode.

That is, in the prior art using an RC snubber for a snubber diode composed of two parts, a resistor and a capacitor, the loop composed of the snubber diode and the RC snubber inevitably becomes longer. However, the existence of stray inductance cannot be ignored. Due to the existence of this stray inductance, the above-described conventional technique can sufficiently absorb an overvoltage having a very large and steep dv / dt generated by the snubber diode due to the timing of switching of the other phase and switching of the own phase. This creates the problem of being impossible.

An object of the present invention is to solve the above-mentioned problems of the prior art, to sufficiently suppress excessive voltage generated at the time of reverse recovery of the snubber diode, and to prevent BD of the snubber diode. An object of the present invention is to provide a snubber circuit suitable for use for configuring a more reliable power converter, which has a smaller number of components than a conventional RC snubber.

[0017]

According to the present invention, an object of the present invention is to provide a snubber circuit used in a power converter constituted by semiconductor switching elements, in parallel with a snubber diode or with a snubber diode and a snubber capacitor. Achieved by connecting a single element, for example, a resistor, capacitor, clamp diode, in parallel with the snubber diode near the snubber diode to suppress excessive voltage generated during reverse recovery of the snubber diode in parallel with the series circuit of Is done.

[0018]

Since a single element for suppressing an excessive voltage generated at the time of reverse recovery of the snubber diode is arranged near the snubber diode, it is constituted by the snubber diode and the element for suppressing the reverse recovery voltage. The loop is almost eliminated, and the existence of the stray inductance can be ignored.

According to the present invention, the excessive voltage generated at the time of reverse recovery of the snubber diode can be sufficiently suppressed.

[0020]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiments of the snubber circuit according to the present invention will be described below in detail with reference to the drawings.

FIGS. 1 to 9 show various basic circuit examples of the snubber circuit according to the embodiment of the present invention. 1 to 9, 4 and 5 are IGBTs, 4a and 5a are freewheel diodes, 10, 11, and 30 are snubber diodes,
20,21,34 snubber resistor, 14,15,32 snubber capacitor, 10a, 11a, 30a snubber diode snubber resistor (hereinafter, referred to as D _S snubber resistor),
10b, 11b, 30b are clamp diodes, 10
d, 11d, 30d snubber capacitor for the snubber diode (hereinafter, D as _S snubber capacitor) is.

In the snubber circuit according to the embodiment of the present invention shown in FIGS. 1 to 9, a plurality of semiconductor switching elements such as IGBTs 4, 5 are connected in series, and snubber diodes 10, 11, which are forwardly connected to a DC power supply. 30, snubber capacitors 14, 15, 32 connected in series with snubber diodes 10, 11, 30;
Snubber resistors 20, 21, connected in parallel with 11, 30
The snubber circuit constituted by the S.34 is applied to a power converter which is individually connected in parallel to the semiconductor switching element or is connected in parallel to a plurality of the semiconductor switching elements. I do.

The circuit shown in FIG. 1 is a series-connected IGB
The snubber diodes 10, 11,
This circuit constitutes a power conversion device constituted by connecting a snubber circuit composed of snubber capacitors 14 and 15 and snubber resistors 20 and 21. According to the present invention, a snubber diode 1
D _S snubber resistor 10a in the vicinity of 0, 11, 11a are connected and configured.

[0024] This circuit, D _S snubber resistor 10a, 11
in the vicinity of a snubber diode 10, 11, because it is connected in parallel to the snubber diode 10 and 11, even when the loop of the snubber diode 10, 11 and snubber resistor 20 and 21 is long, D _S snubber resistor There is no stray inductance in the loop between the snubber diodes 10a, 11a and the snubber diodes 10, 11, and the snubber diodes 10, 11
11 generates an excessive voltage at the time of reverse recovery even, D _S
The snubber resistors 10a and 11a can sufficiently suppress the reverse recovery voltage.

The circuit shown in FIG. 2 is a circuit that constitutes a power conversion device constituted by connecting a series of snubber circuits including a snubber diode 30, a snubber capacitor 32, and a snubber resistor 34 to a series connection circuit of IGBTs 4 and 5. , and the by the present invention, D _S snubber resistor 30a in the vicinity of the snubber diode 30 is connected and configured.

[0026] This circuit is also similar to the case of the circuit shown in FIG. 1, the snubber diode 30 is also be generated excessive voltage at the time of reverse recovery, D _S snubber resistor 30a is sufficiently suppress the reverse recovery voltage be able to.

The circuit shown in FIG.
And the snubber capacitor 32 are connected in reverse to the case of FIG. 2, and the same effects as in the case of FIG. 2 can be obtained.

The circuit shown in FIG.
The snubber diodes 10, 11,
This circuit constitutes a power conversion device constituted by connecting a snubber circuit composed of snubber capacitors 14 and 15 and snubber resistors 20 and 21. According to the present invention, a snubber diode 1
In the vicinity of 0 and 11, a clamp diode 10b is connected in parallel with a series circuit of the snubber diode and the snubber capacitor.
11b is connected.

This circuit comprises a clamp diode 10b,
11b is connected near the snubber diodes 10 and 11 and the clamp diodes 10b and 11b are connected in parallel with the series circuit of the snubber diodes and the snubber resistors, so that the snubber diodes 10 and 11 generate an excessive voltage during reverse recovery. Even if the reverse recovery voltage is generated, the clamp diodes 10b and 11b can sufficiently suppress the reverse recovery voltage.

The circuit shown in FIG. 5 is a series-connected IGB
T4, 5 are circuits that constitute a power conversion device that is configured by connecting a set of snubber circuits including a snubber diode 30, a snubber capacitor 32, and a snubber resistor 34. A clamp diode 30b is connected in parallel to a series circuit of the snubber diode and the snubber capacitor.

In this circuit, similarly to the circuit shown in FIG. 4, even if snubber diode 30 generates an excessive voltage at the time of reverse recovery, clamp diode 30b can sufficiently suppress the reverse recovery voltage. it can.

The circuit shown in FIG.
And the snubber capacitor 32 are connected in reverse to the case of FIG. 5, and the same effect as in the case of FIG. 5 can be obtained.

[0033] Each of the circuits shown in FIGS. 7 to 9, a device for the circuit shown in FIGS. 1 to 3 described above, to suppress the excessive voltage generated during reverse recovery of snubber diode D _S Snubber resistors 10a, 11a, 30a
The, which has replaced D _S snubber capacitor 10d, 11d, the 30d, also these circuits can achieve the same effects as in the FIGS.

Next, examples of mounting structures of various snubber circuit examples according to the above-described embodiments of the present invention will be described with reference to the drawings.

[0035] FIG. 10 is a diagram illustrating an example implementation of a D _S snubber resistor. 10, 60 is a cooling fin, 61 is a copper bar, and other reference numerals are the same as those in FIG.

The illustrated mounting example is an example in which a snubber circuit including a snubber diode 10, a snubber capacitor 14, and a snubber resistor 20 is connected in parallel to the IGBT 4, and the anode of the snubber diode 10 is fixed to the cooling fin 60, It is configured to be electrically connected to the collector of the IGBT 4.

[0037] Then, D _S snubber resistor 10a provided by the present invention has one electrode is fixed to the cooling fin 60, is the other electrode fixed to the snubber diode 10 by a copper bar 61, D _S snubber resistor 10a and snubber diode 10 are electrically connected in parallel.

The structure of the implementation shown in FIG. 10, by placing the D _S snubber resistor 10a in the vicinity of the snubber diode 10, D _S snubber resistor 10a and the snubber diode 1
0 and it is very small that the floating inductance of the wiring for connecting the overvoltage generated during reverse recovery of snubber diode 10 can be effectively absorbed by D _S snubber resistor 10a.

In contrast to the example shown in FIG.
When it is desired to connect a snubber diode to the emitter side of the IGBT, it is sufficient to connect the emitter of the IGBT and the cathode of the snubber diode by using a snubber diode having the same shape and the opposite direction of the current.

[0040] Figure 11 is a diagram showing an example in which is incorporated a D _S snubber resistor snubber diode of the module structure. 11, 50 is a copper base, 51 is an insulating plate, 52 is a diode chip, 53 and 54 are electrodes, and 55 is a resistance chip.

In this example, the snubber diode 10 has a module structure constituted by joining a diode chip 52, electrodes 53 and 54, an insulating plate 51 made of alumina, aluminum nitride or the like, and a copper base 50 by soldering or the like. the module according to the present invention, in which is incorporated constituted by a resistor chip 55 D _S snubber resistor 10a.

FIG. 12 shows an example of mounting a snubber circuit using the module described with reference to FIG. 12, reference numeral 62 denotes a cooling fin, reference numeral 80 denotes a snubber diode module, and other reference numerals are the same as those in FIG.

[0043] In FIG. 12, the snubber diode module 80 is configured by a built-in D _S snubber resistor 10a, illustrated circuit, the snubber diode module 80, the snubber capacitor 14, the snubber circuit according to the snubber resistor 20, in parallel to IGBT4 Connected and configured.

The snubber circuit thus configured also has a D _S
Since the resistance chip as the snubber resistor 10a is connected near the diode chip as the snubber diode, the reverse voltage generated by the snubber diode can be effectively absorbed as in the case of the example described in FIG. .

In contrast to the example shown in FIG.
When it is desired to connect a snubber diode to the emitter side of the IGBT, the emitter of the IGBT may be connected to the cathode side of the snubber diode module.

FIG. 13 is a diagram showing an example of mounting a clamp diode. In FIG. 13, reference numeral 63 denotes a snubber capacitor main body, reference numeral 64 denotes a wiring, and other reference numerals are the same as those in FIG.

The illustrated mounting example shows a snubber diode 1, a snubber capacitor 14, and a snubber resistor 20 in an IGBT 4 snubber circuit.
0, a series connection of a snubber capacitor 14 and a clamp capacitor 10b connected in parallel. The clamp diode 10b includes the snubber diode 10, the snubber capacitor 14, and the wiring 6 thereof.
4 are arranged parallel to and close to each other.

In the illustrated mounting example, the inductance due to the wiring of the loop constituted by the clamp diode 10b, the snubber capacitor 14, and the wiring 64 can thereby be reduced, and the excessive voltage at the time of reverse recovery of the snubber diode 10 can be reduced. Can be effectively clamped.

In contrast to the example shown in FIG.
If it is desired to connect a snubber diode to the emitter side of the IGBT, use a snubber diode of the same shape and the current direction is opposite, connect the cathode of the snubber diode to the emitter of the IGBT, and connect the anode of the clamp diode to the emitter of the IGBT. May be connected.

[0050] Figure 14 is a diagram showing an example in which is incorporated a D _S snubber capacitor snubber diode of the module structure, the sign of the figure are the same as for FIG. 11.

In this example, the snubber diode 10 has a module structure constituted by joining a diode chip 52, electrodes 53 and 54, an insulating plate 51, and a copper base 50 by soldering or the like. , D
_It has a built-in _S snubber capacitor 10d. The D _S snubber capacitor 10d, in FIG. 14, the electrodes connected to both electrodes of the diode chip 52 53,5
4 and an insulating plate 51 insulating between them.

The role of the insulating plate 51 is to provide electrical insulation between the copper base 50 and the diode chip 52 as a snubber diode, and to transfer heat generated in the diode chip 52 to the copper base 50 by heat. The material of the insulating plate 51 is mainly alumina (Al ₂ O ₃ ), aluminum nitride (AlN)
Is used.

The capacitance of the insulating plate 51 is as follows: the relative dielectric constant of alumina ε _τ = 8.5, tan δ = 5 to 20 × 10 to ⁴ , and the dielectric constant (F / mm) in vacuum ε ₀ = 8.85 × 10 ~ ^15, 0.5 mm thickness t of the alumina insulating plate, vertical a, and the length of the lateral B and 50 mm, can be obtained by the following equation.

[0054] _{C = ε τ ε 0 × A} × B / t = 8.5 × 8.85 × 10 ~ 15 × 50 × 50 / 0.5 = 0.38 × 10 ~ 9 (F) tanδ is the aforementioned for such a small, insulating plate between the electrodes 53, 54 can be made apparently small capacitor internal loss, which can be used as D _S snubber capacitor 10d.

FIGS. 15 and 16 show mounting examples in which a snubber circuit is formed using the modules described with reference to FIG.
15 and 16, reference numerals 70 and 71 denote snubber diode modules, and other reference numerals are the same as those in FIG.

FIG. 15 shows an example of mounting the cooling fins 62 of the snubber diode module 70 on the collector side of the IGBT 4, and FIG. 16 shows the mounting fins 6 of the snubber diode module 71 on the emitter side of the IGBT 5.
5 shows an example of implementation in the case of connecting 5.

The snubber circuit includes snubber diodes 10, 1
1, snubber capacitors 14, 15, snubber resistor 20, 2,
Is composed of 1, D _S snubber capacitor 10d, 11
“d” is configured using the stray capacitance existing on the insulating plate 51 in the snubber diodes 70 and 71.

The snubber circuit thus configured also has a D _S
Since the snubber capacitors 10d and 11d are present near the diode chip as the snubber diode, the reverse voltage generated by the snubber diode can be effectively absorbed.

Next, an example of a circuit in which the various snubber circuits according to the embodiment of the present invention described above are applied to a three-phase inverter will be described with reference to the drawings.

The inverter shown in FIG. 17 is a semiconductor switching element I connected in series with DC power supply 1.
For the GBTs 4 and 5, snubber diodes 10, 11,
This is a circuit example of a two-level inverter (hereinafter, referred to as an individual snubber two-level inverter) configured by individually connecting a snubber circuit composed of snubber capacitors 14 and 15 and snubber resistors 20 and 21 in parallel.
D _S snubber resistor 10a according to the invention, 11a is formed are connected in parallel.

In the inverter shown in FIG. 18, the IGBTs 4 to 7 are connected in series to the DC power supply 1, and the neutral point of the clamp capacitors 2 and 3 connected in series to the DC power supply 1 is controlled by the clamp diodes 8 and 9. IGBT
4, 5 and connected to the connection point of the IGBTs 6 and 7, snubber diodes 10 to 13, snubber capacitors 14 to 1
7 is a circuit example of a three-level inverter (hereinafter, referred to as an individual snubber three-level inverter) configured by individually connecting a snubber circuit composed of snubber resistors 20 to 23 to IGBTs 4 to 7 in parallel. Then, the inverter, the snubber diode 10-13, and the D _S snubber resistor 10a~13a according to the invention are connected in parallel.

The inverter shown in FIG. 19 is different from the individual snubber three-level inverter described with reference to FIG. 18 in that the snubber capacitors 32 and 33 and the snubber capacitors 14 and 15 and the snubber capacitors 16 and 17 form a Δ type. 18 and the snubber resistors 21 and 22 in FIG.
Is a circuit example of a three-level inverter (hereinafter referred to as a Δ-type snubber three-level inverter) in which is replaced by a snubber resistor 25. And this inverter is a snubber diode 1
To 0 to 13, D _S snubber resistor according to the present invention 10a~13
a are connected in parallel.

The inverter shown in FIG. 20 is an individual snubber two-level inverter IGBT4 described with reference to FIG.
5, a snubber diode 30, a snubber capacitor 32,
This is a circuit example in which a snubber circuit including a snubber resistor 34 is added. Then, the inverter, the snubber diode 10,11,30, and D _S snubber resistor 10a according to the present invention, 11a, and 30a are connected in parallel.

The inverter shown in FIG. 21 is an individual snubber three-level inverter IGBT4 described with reference to FIG.
5 and IGBTs 6 and 7 with snubber diodes 30 and 3
1, snubber capacitors 32, 33, snubber resistors 34, 3
5 is a circuit example to which a snubber circuit made up of five is added. And
This inverter has snubber diodes 10 to 13, 3
D _S snubber resistor according to the invention 0,31 10A～13
a, 30a and 31a are connected in parallel.

The inverter shown in FIG.
In a level inverter, an example in which a clamp diode 10b, 11b according to the present invention is connected in parallel to a series circuit of a snubber diode 10 and a snubber capacitor 14 and a series circuit of a snubber diode 11 and a snubber capacitor 15 It is.

The inverter shown in FIG.
In the level inverter, a series circuit of a snubber diode 10 and a snubber capacitor 14, a snubber diode 1
1 and a series circuit of a snubber capacitor 15, a series circuit of a snubber diode 12 and a snubber capacitor 16, and
For a series circuit of the snubber diode 13 and the snubber capacitor 17, the clamp diode 10b according to the present invention is used.
13b are connected in parallel.

The inverter shown in FIG.
In the level inverter, a series circuit of a snubber diode 10 and a snubber capacitor 14, a snubber diode 1
1 and a series circuit of a snubber capacitor 15, a series circuit of a snubber diode 12 and a snubber capacitor 16, and
For a series circuit of the snubber diode 13 and the snubber capacitor 17, the clamp diode 10b according to the present invention is used.
13b are connected in parallel.

The inverter shown in FIG.
In the level inverter, a series circuit of the snubber diode 10 and the snubber capacitor 32, the snubber diode 1
1 and a series circuit of a snubber capacitor 32, a series circuit of a snubber diode 12 and a snubber capacitor 33, and
For a series circuit of the snubber diode 13 and the snubber capacitor 33, the clamp diode 10c according to the present invention is used.
13c is connected in parallel.

The inverter shown in FIG.
In a two-level inverter in which a snubber circuit including a snubber diode 30, a snubber capacitor 32, and a snubber resistor 34 is added to the IGBTs 4 and 5 of the level inverter, a series circuit of a snubber diode 10 and a snubber capacitor 14, a snubber diode 11 and a snubber capacitor 15 This is an example in which the clamp diodes 10b, 11b, and 30b according to the present invention are connected in parallel to a series circuit including a snubber diode 30 and a snubber capacitor 32.

The inverter shown in FIG.
IGBTs 4 and 5 and IGBTs 6 and 7 of level inverters
, Snubber diodes 30, 31 and snubber capacitor 3
In a three-level inverter to which a snubber circuit including snubber resistors 34 and 35 is added, a series circuit of a snubber diode 10 and a snubber capacitor 14, a series circuit of a snubber diode 11 and a snubber capacitor 15, a snubber diode 12 and a snubber A series circuit with the capacitor 16, a series circuit with the snubber diode 13 and the snubber capacitor 17, a snubber diode 30 and the snubber capacitor 3
This is an example in which the clamp diodes 10b to 13b, 30b, and 31b according to the present invention are connected in parallel to the series circuit of No. 2 and the series circuit of the snubber diode 31 and the snubber capacitor 33.

The inverter shown in FIG.
In the level inverter, snubber diodes 10, 1
Relative to 1, D _S snubber capacitor 10 according to the present invention
This is an example in which d and 11d are connected in parallel.

The inverter shown in FIG.
In the level inverter, snubber diodes 10-1
Against 3, D _S snubber capacitor 10d according to the invention
13 to 13d are connected in parallel.

The inverter shown in FIG.
In the level inverter, snubber diodes 10-1
Against 3, D _S snubber capacitor 10d according to the invention
13 to 13d are connected in parallel.

The inverter shown in FIG.
The level inverter IGBT4,5, snubber diode 30, the snubber capacitor 32, the two-level inverter by adding a snubber circuit comprising a snubber resistor 34, relative to the snubber diode 10,11,30, D _S snubber capacitor 10d according to the invention , 11d, and 30d are connected in parallel.

The inverter shown in FIG.
IGBTs 4 and 5 and IGBTs 6 and 7 of level inverters
Snubber diodes 30, 31 and snubber capacitor 3
2, 33, the three-level inverter plus snubber circuit consisting of the snubber resistors 34 and 35, relative to the snubber diode 10~13,30,31, D _S snubber capacitor 10d~13d according to the invention, 30d, the 31d parallel This is an example of a configuration connected to.

[0076]

As described above, according to the present invention, a snubber diode for a snubber diode composed of a single element is connected close to the snubber diode, so that an excessive voltage generated at the time of reverse recovery of the snubber diode is obtained. Can be suppressed, and the BD of the snubber diode can be prevented. Further, the present invention can reduce the number of parts as compared with the conventional snubber diode RC snubber circuit.

When the snubber circuit according to the present invention is used in a power converter, the power converter can be made more reliable.

[Brief description of the drawings]

FIG. 1 is a diagram showing an example of a basic circuit of a snubber circuit according to an embodiment of the present invention.

FIG. 2 is a diagram showing an example of a basic circuit of a snubber circuit according to an embodiment of the present invention.

FIG. 3 is a diagram showing an example of a basic circuit of a snubber circuit according to an embodiment of the present invention.

FIG. 4 is a diagram showing an example of a basic circuit of a snubber circuit according to an embodiment of the present invention.

FIG. 5 is a diagram showing an example of a basic circuit of a snubber circuit according to an embodiment of the present invention.

FIG. 6 is a diagram showing an example of a basic circuit of a snubber circuit according to an embodiment of the present invention.

FIG. 7 is a diagram showing an example of a basic circuit of a snubber circuit according to an embodiment of the present invention.

FIG. 8 is a diagram showing an example of a basic circuit of a snubber circuit according to an embodiment of the present invention.

FIG. 9 is a diagram illustrating an example of a basic circuit of a snubber circuit according to an embodiment of the present invention.

FIG. 10 is a diagram showing an example of a mounting structure of a snubber circuit according to an embodiment of the present invention.

FIG. 11 is a diagram illustrating an example of a mounting structure of a snubber circuit according to an embodiment of the present invention.

FIG. 12 is a diagram showing an example of a mounting structure of a snubber circuit according to an embodiment of the present invention.

FIG. 13 is a diagram illustrating an example of a mounting structure of a snubber circuit according to an embodiment of the present invention.

FIG. 14 is a diagram showing an example of a mounting structure of a snubber circuit according to an embodiment of the present invention.

FIG. 15 is a diagram showing an example of a mounting structure of a snubber circuit according to an embodiment of the present invention.

FIG. 16 is a diagram showing an example of a mounting structure of a snubber circuit according to an embodiment of the present invention.

FIG. 17 is a diagram showing a circuit example when the snubber circuit according to the embodiment of the present invention is applied to a three-phase inverter.

FIG. 18 is a diagram showing a circuit example when the snubber circuit according to the embodiment of the present invention is applied to a three-phase inverter.

FIG. 19 is a diagram showing a circuit example when the snubber circuit according to the embodiment of the present invention is applied to a three-phase inverter.

FIG. 20 is a diagram showing a circuit example when the snubber circuit according to the embodiment of the present invention is applied to a three-phase inverter.

FIG. 21 is a diagram showing a circuit example when a snubber circuit according to an embodiment of the present invention is applied to a three-phase inverter.

FIG. 22 is a diagram showing a circuit example when the snubber circuit according to the embodiment of the present invention is applied to a three-phase inverter.

FIG. 23 is a diagram showing a circuit example when the snubber circuit according to the embodiment of the present invention is applied to a three-phase inverter.

FIG. 24 is a diagram showing a circuit example when the snubber circuit according to the embodiment of the present invention is applied to a three-phase inverter.

FIG. 25 is a diagram showing a circuit example when the snubber circuit according to the embodiment of the present invention is applied to a three-phase inverter.

FIG. 26 is a diagram showing a circuit example when the snubber circuit according to the embodiment of the present invention is applied to a three-phase inverter.

FIG. 27 is a diagram showing a circuit example when a snubber circuit according to an embodiment of the present invention is applied to a three-phase inverter.

FIG. 28 is a diagram showing a circuit example when the snubber circuit according to the embodiment of the present invention is applied to a three-phase inverter.

FIG. 29 is a diagram showing a circuit example when the snubber circuit according to the embodiment of the present invention is applied to a three-phase inverter.

FIG. 30 is a diagram showing a circuit example when the snubber circuit according to the embodiment of the present invention is applied to a three-phase inverter.

FIG. 31 is a diagram showing a circuit example when a snubber circuit according to an embodiment of the present invention is applied to a three-phase inverter.

FIG. 32 is a diagram showing a circuit example when the snubber circuit according to the embodiment of the present invention is applied to a three-phase inverter.

FIG. 33 is a diagram illustrating the configuration and operation of a power conversion device having a snubber circuit according to a conventional technique.

FIG. 34 is a diagram illustrating the configuration and operation of a power conversion device having a snubber circuit according to a conventional technique.

FIG. 35 is a diagram illustrating the configuration and operation of a power conversion device having a snubber circuit according to a conventional technique.

FIG. 36 is a diagram illustrating the configuration and operation of a power conversion device having a snubber circuit according to a conventional technique.

FIG. 37 is a diagram illustrating a situation of a reverse voltage applied to a snubber diode.

[Explanation of symbols]

1 DC power source 2, 3 clamp capacitor 4~7,101~106 IGBT 8,9 neutral point clamp diodes 10～13,30,31,110,111 snubber diode 10a to 13a, 30a D _S snubber resistor 10B～13b, 30b clamp diodes 10c~13c clamp diodes 10d~13d, 30d D _S snubber capacitor 14～17,32,33,112,113 snubber capacitor 20～23,25,34,35,114,115 snubber resistor

Continuation of front page (56) References JP-A-2-193527 (JP, A) JP-A-2-299468 (JP, A) JP-A-4-295227 (JP, A) (58) Fields studied (Int) .Cl. ⁷ , DB name) H02M 7/5387 H02M 1/06 H02M 7/537

Claims (8)

(57) [Claims] In a snubber circuit connected to both ends of a semiconductor switching element and having a snubber capacitor connected in series to a parallel connection of a snubber diode and a snubber resistor, an excessive voltage generated at the time of reverse recovery of the snubber diode is reduced. A snubber circuit, wherein a single element for suppression is connected in parallel with the snubber diode closer to the snubber resistor . 2. A semiconductor switching device having two terminals connected to both ends thereof.
Connected in parallel with the snubber diode and snubber resistor.
In a snubber circuit consisting of a series of nava capacitors
The snubber connected in parallel with the snubber diode.
The resistor is connected to the snubber with a connection line shorter than the connection line of the resistor.
A snubber circuit characterized by being connected in parallel to an iod. 3. The snubber diode is a module having an insulating layer between a diode chip and a cooling plate of the snubber diode, and the resistor is configured in the module constituting the snubber diode. The snubber circuit according to claim 2, wherein 4. The snubber circuit according to claim 1, wherein said single element is a capacitor. 5. The snubber diode is a module having an insulating layer between a diode chip and a cooling plate of the snubber diode, wherein the capacitor is formed by a stray capacitance existing in the insulating layer. The snubber circuit according to claim 4. 6. A free-wheeling diode of opposite polarity and
In a snubber circuit in which a snubber capacitor is connected in series to a parallel connection of a snubber diode and a snubber resistor, the snubber diode is connected to both ends of a column-connected semiconductor switching element, the clamping diode for suppressing an excessive voltage generated during reverse recovery of snubber diodes, before
A snubber circuit characterized by being connected in parallel closer to the free wheel diode . 7. One of the electrodes of said snubber diode is cold.
Fixed and electrically connected to the
One of the terminals is fixed and electrically connected to the cooling fin.
And the other terminal of the resistor is the other terminal of the snubber diode.
3. The electrode of claim 2, wherein said electrode is connected by a connection line.
The snubber circuit described. 8. A method using a plurality of semiconductor switching elements.
Direct current into alternating current, or, in the power converter for converting direct current into alternating current, and wherein the snubber circuit according one of claims 1 to 7 is connected in parallel with the semiconductor switching element Noso respectively Power converter.