JP3269095B2 - Pitch control device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to an interval system GoSo location, about pitch system GoSo location for expansion and compression processing of the audio signals in particular Odeo video apparatus or the like.

[0002]

BACKGROUND ART pitch system GoSo location of this conventional type, as shown in FIG. 3, an A / D converter 1 for converting an input audio signal into a digital signal, the bandwidth limitations of the converted digital signal Low-pass filter 2 and a RAM 3 for temporarily storing a digital signal output from the low-pass filter 2
A RAM control circuit 4 for controlling the RAM 3, an expansion / compression degree control circuit 5 for controlling the degree of expansion / compression in the expansion / compression processing, a frame control circuit 6 for controlling the timing of a frame to be processed, Fade-in / fade-out circuits 12 and 13 for controlling the signal level for connecting the signals of the frames of interest, an overlap circuit 14 for adding the signals of the frames to be connected, and an output signal obtained by converting the processed digital signal into an analog signal D / A
And a converter 8.

Next, the operation of the conventional pitch control device will be described.

First, an input audio signal I is converted into a digital signal by an A / D converter 1. Next, the low-pass filter 2 is a digital filter, which inputs the converted digital signal and performs low-pass filtering. This is because, in the compression processing, the frequency characteristic of the signal is shifted to a higher frequency side and the conversion is performed, so that the highest frequency component of the compression-processed signal is equal to or less than 1/2 of the sampling frequency and satisfies the Nyquist theorem. This is to limit. It is assumed that the pass band width characteristic of the low-pass filter 2 changes according to the degree of compression indicated by the expansion / compression degree control circuit 5 so that the subsequent processing can be performed up to the highest possible frequency component of the input signal.

Next, the output of the low-pass filter 2 is stored in the RAM 3 for each frame by the RAM control circuit 4 controlled by the output of the frame control circuit 6.

The expansion / compression processing is performed by changing the read timing of a signal stored in the RAM 3 with respect to the write timing. For example, the RAM control circuit 4 changes the read cycle with respect to the write cycle according to the output of the expansion / compression degree control circuit 5. Alternatively, when the read cycle cannot be changed with respect to the write cycle, the RAM control circuit 4 performs the following processing according to the output of the decompression / compression degree control circuit 5.
First, in the case of decompression, the same data is repeatedly read out once every N times. At this time, the signal is expanded by (N + 1) / N times. Next, in the case of compression, data is skipped and read out once every N times. At this time, the signal is compressed by (N-1) / N times.

As a result of the decompression or compression processing, a signal surplus or shortage occurs with respect to a frame period. Therefore, R
The AM control circuit 4 performs a correction process of truncating the surplus signal or supplementing the insufficiency signal from the preceding and succeeding frames. The above processing is repeated for each frame.

At the connection between the frames, the signal level of each frame is controlled by the fade-in / fade-out circuits 12 and 13 as described below so that the signal does not become discontinuous. The first and last signals after the expansion, compression, and correction processing are respectively subjected to fade-in and fade-out processing. Here, the term “fade-in” refers to gradually increasing the output level from a mute state to a through state. Fade-out is to gradually lower the output level from a through state to a mute state.

The output from the RAM 3 is independent of the even (2n) frame output FE and the odd (2n + 1) frame output FO. Are overlapped, that is, added and output.

Finally, the output digital signal is converted to D /
The signal is converted into an analog signal by the A converter 8 and an output signal O is output.

As described above, in the conventional pitch control device, each frame is connected by the fade-in / fade-out process and the overlap process.

[0012]

In the above-described conventional pitch control device, the input signal of a specific frequency is canceled by the phase inversion in the overlap portion of the output signal of the preceding and succeeding frames at the frame connection portion. However, there is a drawback that sound quality is deteriorated due to the occurrence of distortion due to such modulation.

[0013]

According to the pitch control method of the present invention, an A / D converter converts an input audio signal into a digital signal.
/ D converter and a band of the converted digital signal
Low-pass filter that limits the band and outputs a band-limited digital signal
And over the filter, the band-limited digital signal one o'clock separated each unit of frame which is a unit of a predetermined time width
A RAM for storing the de-implementing each said frame
Controls the degree of expansion / compression in the expansion / compression processing, which is either expansion processing or compression processing of digital audio signals
An expansion / compression degree control circuit,
The decompression / compression processing is performed by controlling the reading of the RAM.
And a decompression / compression process which is a signal output by the reading.
A RAM control circuit for generating a logical signal,
A frame control circuit that performs frame timing control;
During the frame connection processing after the expansion / compression processing, the frame
Surplus signal resulting from the decompression processing for each of the
Min and correct for non Ashishin No. partial outputs a correction processed signal
A frame correction processing means for analyzing the corrected signal
/ D converter that converts analog data and outputs analog output signal
The pitch correction device comprising:
Processing means for executing the second frame during the expansion / compression processing.
The expansion / compression processing signal of the first frame immediately before
Zero crossing detected to cross the specified DC level
A detection signal and the decompression / compression processing signal of the second frame.
Signal is the same as the decompressed signal of the first frame
Zero-cross polarity detection that detects zero-cross polarity
A zero-cross detection circuit for outputting an output signal ;
For supply of loss detection signal or output stop time detection signal described later
Responding to the expanded / compressed signal of the first frame.
Stop the output, the zero-cross polarity detection signal or described later
The second frame is responsive to the supply of the mute time detection signal.
Output switching for starting output of the expansion / compression processing signal
And a circuit of the decompression / compression processing signal of the first frame.
The output stop condition is not satisfied for a predetermined time
Output stop to detect the output stop time detection signal
A time detection circuit, and the decompression / compression processing of the second frame.
The output start condition of the logical signal is not satisfied for a predetermined time.
And outputs the mute time detection signal.
And a short time detection circuit.

[0014]

[0015]

Next, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram showing an embodiment of a pitch control device according to the present invention.

As shown in FIG. 1, the pitch control device according to the present embodiment comprises an A / D converter 1, a low-pass filter 2, a RAM 3, a RAM control circuit 4, a decompression control circuit, and the like. In addition to the circuit 5, the frame control circuit 6, and the D / A converter 8, an output switching circuit 7 for stopping the signal output of the frame by the zero cross detection signal, and detecting the zero cross of the signal after the expansion compression and the correction processing. It is provided with a zero-cross detection circuit 9, an output stop time detection circuit 10, and a mute time detection circuit 11.

Next, the operation of this embodiment will be described.

First, the processing until the input audio signal I is converted into a digital signal and subjected to decompression, compression and correction processing on a frame basis is the same as that shown in the above-mentioned prior art example, and the description will be repeated. The description is omitted here.

Next, processing of a connection portion between the respective frames is performed as follows.

First, after completion of the immediately preceding frame F0 cycle with respect to the frame F1 currently being processed, it is detected that the signal after the expansion / compression and correction processing of the frame F0 crosses the set DC level V, that is, the zero crossing is detected. The detection is performed by the circuit 9. At this time, even if the immediately preceding frame F0 cycle is completed, it is necessary to continue the decompression and correction processing as if the frame F0 cycle is extended until a zero cross is detected. Also,
At the same time when the immediately preceding frame F0 cycle is completed,
The expansion compression and correction processing in the next frame, that is, the frame F1 currently being processed is started. To enable these processing operations, the output of the RAM 3 is independent of the even (2n) frame output FE and the odd (2n + 1) frame output FO.

FIG. 2 is an operation time chart for explaining the connection operation of signals between frames.

Next, after zero-cross detection of the signal of the immediately preceding frame F0, the output switching circuit 7
The signal output SF0 of 0 is stopped, and only the DC component is output, that is, the mute state is set. However, in order to limit the time until the transition to the mute state after the completion of the previous frame F0 cycle, the output stop time detection circuit 10 detects that the output stop condition is not satisfied for a certain time, and outputs the output stop time detection signal. Output. When the output stop time detection signal is output, the output switching circuit 7 forcibly stops the signal output SF0 of the immediately preceding frame F0 and sets the output to a mute state.

Next, the output signal SF1 of the next frame, that is, the frame F1 currently being processed, crosses the DC level with the same gradient as the output signal SF0 when the output of the immediately preceding frame F0 is stopped. That is, the same zero-cross polarity is detected by the zero-cross detection circuit 9 and a zero-cross polarity detection signal is output.
When the zero-cross polarity detection signal is output, the output switching circuit 7 outputs the signal SF1 of the next frame F1.
However, in order to limit the time until the signal SF1 of the next frame F1 is output after the completion of the cycle of the previous frame F0, it is determined that the output start condition of the signal SF1 of the next frame F1 is not satisfied for a certain period of time. The signal is detected by the circuit 11 and a mute time detection signal is output. When the mute time detection signal is output, the output switching circuit 7
The output of the signal SF1 of the next frame F1 is forcibly started.

Finally, the output digital signal is converted to D /
The signal is converted into an analog signal by the A converter 8 and an output signal O is output.

Although the embodiments of the present invention have been described above, the present invention is not limited to the above embodiments, and various modifications can be made.

For example, instead of limiting a mute time by a mute time detection circuit in connection of signals between frames, a fade-in / fade-out circuit similar to a conventional one performs a fade-in / fade-out process, which also deviates from the gist of the present invention. Of course, it can be applied unless otherwise described.

[0028]

As described above, according to the present invention, the pitch control of the present invention
Equipment, the frame correction processing means, performing the expansion and compression process
Zero-cross detection that detects that the decompression processing signal of the frame immediately before the current frame inside crosses the set DC level
Outgoing signal and the decompressed and processed signal of the current frame
Must have the same zero-cross polarity as the expansion / compression signal of the
A zero-cross detection circuit for outputting a zero-crossing polarity detection signal detected and output stop of the zero-cross detection signal or later
Decompression / compression processing signal of previous frame by stop time detection signal
Output is stopped, and a zero-cross polarity detection signal or
Decompression and compression of the current frame by supplying
An output switching circuit that starts outputting the processed signal and the previous frame
The condition for stopping the output of the signal
Output stop time detection signal
Output stop time detection circuit, and the decompression / compression processing of the current frame.
Check that the output start condition of the
Mute time to output the above mute time detection signal
By providing the detection circuit, it is possible to suppress the occurrence of distortion due to the modulation of a specific frequency at the frame connection portion, and thus to prevent the deterioration of sound quality.

[Brief description of the drawings]

FIG. 1 is a block diagram showing an embodiment of a pitch control device of the present invention.

FIG. 2 is a time chart illustrating an example of an operation of the pitch control device of the present embodiment.

FIG. 3 is a block diagram showing an example of a conventional pitch control device.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 D / A converter 2 Low-pass filter 3 RAM 4 RAM control circuit 5 Expansion / compression degree control circuit 6 Frame control circuit 7 Output switching circuit 8 D / A converter 9 Zero cross detection circuit 10 Output stop time detection circuit 11 Mute time detection circuit 12, 13 fade-in / fade-out circuit 14 overlap circuit

Continuation of front page (58) Field surveyed (Int.Cl. ⁷ , DB name) G10L 21/00-21/04

Claims (1)

(57) [Claims] 1. An input audio signal is converted into a digital signal.
A / D converter for converting and the converted digital data
Limits the band of digital signals and outputs band-limited digital signals.
Low-pass filter, and said band-limited digital signal
A RAM for temporarily storing I Subdivision <br/> off the each unit of frame which is a unit of a predetermined time width, carried for each of the frame
Control of expansion and compression of the expansion and compression process is either decompression and compression of the digital audio signal
A control circuit for controlling the degree of expansion and compression,
Controlling the reading of the RAM in response to the
This is a signal that has been subjected to decompression and compression processing and output by the reading.
A RAM control circuit for generating a decompression / compression processing signal;
Frame system for controlling the timing of the frame of the elephant
Control circuit and at the time of frame connection processing after the decompression / compression processing.
Resulting from the expansion and compression processing for each of said frames
A frame correction means for outputting a correction processed signal excess signal component and correct for non Ashishin No. fraction that, the correction processing Sumishin
D / A that converts the signal to analog and outputs an analog output signal
A pitch control device including a converter , wherein the frame correction processing means performs the decompression / compression processing.
Said stretching of the first frame immediately before the second frame in
Check that the compression signal crosses a predetermined DC level.
The detected zero-cross detection signal and the second frame
The decompression processing signal is the decompression of the first frame.
Detects the same zero-cross polarity as the compressed signal
Zero-cross detection that outputs the detected zero-cross polarity detection signal
A circuit and the zero-cross detection signal or an output stop time detection signal described later.
Decompressing the first frame in response to supplying a signal
Stop the output of the processing signal, the zero cross polarity detection signal
Or, in response to the supply of a mute time detection signal described below,
Start outputting the decompressed and processed signal of the second frame
An output switching circuit, and the output of the decompression / compression processing signal of the first frame.
Detects that the stop condition is not met for a predetermined time
Output stop time detection for outputting the output stop time detection signal
Circuit and the output of the decompressed signal of the second frame
Before detecting that the start condition is not satisfied for the predetermined time,
Mute time between detection times to output the serial mute time detection signal
Pitch control device characterized by comprising a road