JP3253879B2 - Delta-sigma modulation circuit and signal transmission or recording / reproducing apparatus using the same - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention is preferably implemented in a digital audio system, and is provided with a delta-sigma modulation circuit for producing a 1-bit digital signal, and a transmission / recording / reproduction of the 1-bit digital signal provided with the circuit. Related to the device.

[0002]

2. Description of the Related Art A 1-bit digital signal obtained by the delta-sigma modulation is demodulated into an analog audio signal only by using a simple low-order low-pass filter when the 1-bit digital signal is an audio signal. There is an advantage that a complicated processing circuit is unnecessary for demodulation such as possible. Also, since the 1-bit digital signal is a finely divided data flow that does not require word synchronization, it is less susceptible to transmission paths and the like, and is therefore resistant to errors, and has the advantage of eliminating the need for an error correction circuit. Have. Furthermore, in a conventional multi-bit digital signal, once a sampling frequency, a dynamic range, and the like are standardized, there is a problem that it is difficult to change the standard. Therefore, in recent years, attention has been paid to a 1-bit digital encoding scheme that has many advantages over the multi-bit encoding scheme.

[0003]

As an example of a typical prior art multi-bit encoding system, digital audio such as a compact disk will be described below. In the case of a compact disc, the sampling frequency fs of 4
22.05 kHz, which is 1/2 of 4.1 kHz, becomes the upper limit frequency Fa of the audio signal band, and a frequency band higher than this upper limit frequency Fa cannot be used for data transmission. For this reason, subcodes such as flags for identifying the left or right channel as a sub signal are compressed and multiplexed in the time axis direction together with the main data of the audio signal as the main signal, and transmitted. Alternatively, recording and reproduction are performed.

Therefore, a circuit for encoding the flag and the audio signal into a standardized data format is required on the transmitting or recording side, and the receiving or reproducing side decodes the received or reproduced data and outputs the main data. And a sub-code separating circuit is required. Thus, in a conventional multi-bit signal,
There is a problem that a signal processing circuit for performing signal processing corresponding to the format is required.

An object of the present invention is to provide a delta-sigma modulation circuit capable of transmitting or recording / reproducing by superimposing a sub-signal on a main signal without requiring a complicated signal processing circuit, and a signal transmission / recording using the same. It is to provide a playback device.

[0006]

According to a first aspect of the present invention, there is provided a delta-sigma modulation circuit for sampling a digital signal represented by analog or multi-bit at a high speed and converting it into a 1-bit signal. At a predetermined frequency higher than the 1-bit main signal having a desired dynamic range and an effective frequency band, a sub-signal having an information amount corresponding to a dynamic range at the predetermined frequency is converted into a sub-signal of the predetermined frequency. The signal is superimposed on the main signal by frequency division multiplexing via a carrier wave.

According to the above configuration, the present inventor has set that the 1-bit signal obtained by delta-sigma modulation is, for example, about two to three times the effective frequency band in which a predetermined dynamic range of the main signal can be secured. Even if the frequency band is equal to or higher than the predetermined upper limit frequency, if the sub-signal has a low bit rate corresponding to a narrow dynamic range up to the quantization noise floor, a predetermined signal required for demodulation is required.
Attention is paid to the fact that / N can be sufficiently secured, and at a predetermined frequency equal to or higher than the upper limit frequency, a sub-signal of an information amount corresponding to a dynamic range at that frequency is superimposed by frequency division multiplexing.

Therefore, on the demodulation side such as a receiving device or a reproducing device, the sub-signal may be separated by a band-pass filter or the like, and demodulation processing corresponding to the sub-signal may be performed. The required complicated configuration is eliminated, and the circuit for signal processing can be simplified.

Further, the delta-sigma modulation circuit according to the invention of claim 2 is characterized in that the superimposition of the sub-signal on the main signal is performed by an addition stage in the delta-sigma modulation circuit.

According to the above configuration, since the frequency division multiplexing is used, it is only necessary to simply add a sub signal such as a sine wave of the predetermined frequency to the main signal, and the addition process is performed by a delta-sigma modulation circuit. In this case, multiplexing can be performed without adding a special configuration by performing the processing in an addition stage that delays the quantized output and negatively feeds back to the input side.

Further, in the delta-sigma modulation circuit according to the third aspect of the present invention, the main signal is an audio signal,
The sub-signal is at least one of a flag indicating channel information, a flag indicating presence / absence of pre-emphasis, time information, and sampling frequency information.

[0012] According to the above configuration, the sub-signal is a flag indicating channel information such as the left or right channel, and whether the pre-emphasis is performed or not, corresponding to the audio signal of the main signal. It is 1-bit data such as a flag to represent, or small-bit data related to the main signal such as time information.
N can be secured.

According to a fourth aspect of the present invention, there is provided a signal transmission or recording / reproducing apparatus, wherein the delta-sigma modulation circuit according to any one of the first to third aspects is provided in a transmitting apparatus or a recording apparatus, and a receiving apparatus or a reproducing apparatus. Is characterized in that the separation of the sub-signal from the received or reproduced 1-bit signal is performed by a low-order filter.

According to the above configuration, since the sub signal is frequency division multiplexed, it can be separated from the main signal by a low-order filter, and the separation of the sub signal can be realized with a simple configuration.

Furthermore, in the signal transmission or recording / reproducing apparatus according to the fifth aspect of the present invention, the main signal is an audio signal, the sub-signal is channel information, and the delta-sigma modulation according to claim 1 or 2. A circuit is provided in a transmitting device or a recording device, and a receiving device or a reproducing device performs left / right or multi-channel separation based on the sub signal.

According to the above arrangement, the sub-signals are used to separate multi-channels such as left and right channels, heavy bass channels, and front and rear four channels, corresponding to the main signal audio signal.

Therefore, such channel information multiplexed by time division in the conventional multi-bit signal is
It can be multiplexed by frequency division and easily extracted on the demodulation side.

Further, in the signal transmission or recording / reproducing apparatus according to the invention of claim 6, the main signal is an audio signal, and the sub signal is a flag indicating the presence or absence of pre-emphasis. Is provided in the transmitting device or the recording device, and the receiving device or the reproducing device responds to the flag by detecting the de-emphasis signal.
N / OFF is controlled.

According to the above configuration, whether or not the sub-signal has been subjected to pre-emphasis processing such as emphasizing low-frequency components and suppressing high-frequency components corresponding to the audio signal of the main signal Is used as a flag indicating

In this way, such a flag which has been multiplexed by time division in the conventional multi-bit signal can also be multiplexed by frequency division and easily extracted.

Furthermore, in the signal transmission or recording / reproducing apparatus according to the present invention, the main signal is an audio signal, the sub-signal is sampling frequency information, and the delta sigma according to claim 1 or 2. The modulation circuit is provided in the transmitting device or the recording device, and the receiving device or the reproducing device is
A 1-bit signal is demodulated with a system clock from which the sub-signal can be extracted at the predetermined frequency.

According to the above configuration, the transmitting device or the recording device side can store a CD (compact disk), DAT (digital audio tape recorder), satellite broadcast, or the like.
For multi-bit input signals having different sampling frequencies fs, for example, FS = 64 fs and FS = 32 without performing complicated processing such as converting the sampling rate to unify the sampling frequency FS of the 1-bit signal.
Even if the multi-bit input signal is converted to a 1-bit signal while keeping a multiple of oversampling such as fs constant,
By changing the system clock on the receiving device or the reproducing device so that the sub-signal of the predetermined frequency can be extracted, the sampling frequency is matched between the delta-sigma modulation side and the demodulation side so that the 1-bit digital signal can be accurately detected. Can be demodulated.

Accordingly, even when the sampling frequency of the input signal is different, complicated processing such as time axis compression can be omitted when multiplexing information representing the sampling frequency such as a subcode. The sampling frequency can be given a range without complicated processing such as sampling rate conversion.

Further, in the signal transmission or recording / reproducing apparatus according to the invention of claim 8, the transmitting apparatus or the recording apparatus comprises:
Input selection means, and in response to the selection result, comprising an input selection means for selecting a clock oscillation frequency of the system clock generation circuit from a plurality of predetermined frequencies, the receiving device or the reproduction device, the receiving device or the reproduction device of the predetermined frequency A narrow band filter having a pass band, and a clock control circuit that receives an output of the narrow band filter and switches a clock oscillation frequency of a system clock generating circuit so that the sub signal is detected.

According to the above arrangement, the transmitting device or the recording device performs oversampling of a predetermined number of times on a multi-bit input signal of a predetermined sampling frequency fs such as the CD, DAT or satellite broadcast. In response to this, the system clock is switched in response to the input selection, and in response to this, the receiving device or the reproducing device switches the system clock so that the sub-signal can be detected. In this way, when the sampling frequency fs of the multi-bit input signal is determined in advance to a plurality of types, the sampling frequency of an appropriate type can be easily set.
And the setting can be performed promptly.

Further, in the signal transmission or recording / reproducing apparatus according to the ninth aspect of the present invention, the transmitting apparatus or the recording apparatus can set a clock oscillation frequency of a system clock generating circuit to an arbitrary frequency. Comprising: a narrow band filter having a pass band of the predetermined frequency; a clock control circuit capable of sweeping a clock oscillation frequency of a system clock generation circuit; and an output of the narrow band filter. And a detection circuit for stopping the sweeping operation when the sub-signal is detected.

According to the above configuration, even if the sampling frequency is arbitrarily set in accordance with the desired dynamic range, frequency band, bit rate, etc., the main signal is added to add information representing the sampling frequency. The demodulation can be performed accurately without requiring any special processing.

[0028]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The basic concept of the present invention will be described below with reference to FIGS.

FIG. 1 is a block diagram showing a basic configuration when the present invention is implemented as an audio signal transmission device 1.
In this audio signal transmission device 1, a delta-sigma modulation circuit MOD in a transmission circuit TX applies an additional information signal generation circuit GS to an analog or multi-bit audio signal Min which is a main signal created by an audio signal source GM. Then, the additional information signal Sub, which is a sub-signal created in step (1), is multiplexed by frequency division to perform delta-sigma modulation, and the created high-speed 1-bit digital signal is transmitted to the receiving circuit RX via the transmission line J.

In the receiving circuit RX, the high-speed 1-bit digital signal is demodulated by the demodulating circuit DEM to be converted into an analog signal, and then input to the low-pass filter FL and the band-pass filter FB. The band-pass filter FB extracts the additional information signal Sub, which is the sub signal,
The additional information signal Sub is decoded in the control circuit CTL. The control circuit CTL displays a signal on the display device DIS in response to the decoded additional information signal Sub, and / or processes the analog audio signal output from the low-pass filter FL.
Is controlled. The analog audio signal from the signal processing circuit ACT is amplified by an amplifier P, and then amplified by a speaker S.
It is acousticized from P.

FIG. 2 is a graph showing the frequency characteristic of the quantization noise level for explaining the concept of the present invention.
The higher-order delta-sigma modulation has a noise shaping characteristic of shifting quantization noise to a higher frequency band side, and has a desired dynamic range, for example, 90 dB.
Is used as the effective frequency band of the audio band up to the upper limit frequency Fa at which the frequency band can be secured.

On the other hand, above the upper limit frequency Fa, the quantization noise floor gradually increases as the frequency increases, as shown in FIG. Therefore,
According to the 1-bit encoding method to which the present invention is applied, a noise reduction band can be widely secured over an audio signal band.
This band has an S / N that can sufficiently decode small bits of data. Therefore, in the present invention, the band is used for the additional information signal Sub.

FIG. 3 shows a first embodiment of the present invention.
7 will be described below.

FIG. 3 is a block diagram showing an electrical configuration of the audio signal transmission device 1a according to the first embodiment of the present invention. The audio signal transmission device 1a generally converts analog or multi-bit audio signals from the audio signal sources GL and GR into a delta-sigma modulation circuit MO in the transmission circuit TXa.
After being modulated into a 1-bit digital signal by DL and MODR, the signal is transmitted to a receiving circuit RXa via transmission lines J1 and J2, and demodulation circuits DEM1 and DEM2 in the receiving circuit RXa.
The analog audio signal demodulated by the speaker is converted from the speakers SPL and SPR of the left and right channels into sound.

Therefore, in order to accurately discriminate the audio signals of the left and right channels and to demodulate and output the audio signals when the transmission lines J1 and J2 are switched, the transmitting circuit TXa has:
Either channel (left channel in the example of FIG. 3)
The audio signal, which is the main signal, is generated by the oscillator OS and is composed of, for example, a continuous sine wave signal. After the channel identification signal, which is the additional information signal, is frequency-division multiplexed, it is modulated into a 1-bit digital signal. You. On the other hand, on the receiving circuit RXa side, the channel of the 1-bit digital signal is determined by the channel determining circuits CTL1 and CTL2 from the received 1-bit digital signal.

That is, in the high-speed sampling 1-bit encoding method, if the sampling frequency is FS, FS / 2 is theoretically the upper limit frequency Ft of the transmission band, and F
It is known that S / 6 is the upper limit frequency Fa of a frequency band usable as an audio signal band.

For example, if FS = 32 fs and fs is 44.1 kHz of a compact disc, Ft = 32 × 44.1 / 2 = 705.6 (kHz) Fa = 32 × 44.1 / 6 = 235.2 ( kHz).

However, when hardware is actually implemented in a circuit, quantization noise is reduced to the upper limit frequency Ft,
Fa is difficult to sufficiently reduce to 10-20 kHz required for current consumer digital audio equipment.
The values of the upper limit frequencies Ft and Fa can be relatively easily achieved by setting the S / N at z to 90 to 100 dB.
Is a realistic value of 1/2 to 1/4.

For example, the sampling frequency fs
Is 32 times as large as 44.1 kHz of a compact disk or 48 kHz of a digital audio tape recorder, the upper limit frequencies Fa and Ft are about 50 kHz and 120 kHz, respectively, as shown in FIG. , The upper limit frequencies Fa and Ft are 100 kHz and 240 kHz, respectively.
about z.

Therefore, in the present invention, the carrier frequency Fs, for example, 80 kHz is set in the frequency band of Fa to Ft, and the additional information signal is frequency-multiplexed at the carrier frequency Fs. As understood from FIG. 4, the carrier frequency Fs
Can secure a dynamic range of about 40 to 60 dB, and an S / N that can sufficiently transmit the data of the additional information signal can be secured. Further, since the carrier frequency Fs is further away from the upper limit frequency Fa of the audio signal band which is set sufficiently wide by 20 kHz or more, a signal up to about 10 kHz can be used as a modulation wave, and simple data can be obtained. It is understood that transmission can be performed by multiplexing.

First, in the example of FIG. 3, the additional information signal to be multiplexed is a channel discrimination signal as described above, and an oscillator or a multi-bit digital signal of the left channel from the audio signal source GL is supplied to the oscillator. A channel discrimination signal composed of a sine wave signal of the carrier frequency Fs created by the OS is added in an adder K1 in the delta-sigma modulation circuit MODL. The added signal is subjected to delta-sigma modulation to a high-speed 1-bit digital signal and output to the transmission line J1. On the other hand, the audio signal of the right channel from the audio signal source GR is directly input to the delta-sigma modulation circuit MO.
The signal is input to the DR, is subjected to delta-sigma modulation to a high-speed 1-bit digital signal, and is output to the transmission line J2.

Delta-sigma modulation circuits MODL, MODR
Generally comprises an integrating circuit M, a quantizer Q for quantizing the integrated output by 1 bit and outputting the same, a delay device D0 for delaying the output of the quantizer Q, and an output of the delay device D0. The adder K1 that performs negative feedback on the input side of the circuit M is provided.

On the other hand, the receiving circuit RXa is connected to the transmission line J1.
Or demodulation circuits DEM1, D2 connected to J2, respectively.
EM2, a low-pass filter (abbreviated to LPF) F11, a band-pass filter (abbreviated to BPF) F12, and a channel discriminating circuit CTL provided in association with the demodulation circuit DEM1.
1, a low pass filter F21, a band pass filter F22, a channel discriminating circuit CTL2, and a channel switching circuit SW provided in association with the demodulation circuit DEM2.

The channel switching circuit SW includes two switches S1 and S2 realized by relays, analog switches, and the like.
And these common contacts S1C, S1C
2C is connected to demodulation circuits DEM1 and DEM2, respectively. On the other hand, the individual contact S1L of the switch S1
And the individual contact S2L of the switch S2 are commonly connected to the amplifier PL of the left channel, and the individual contact S1 of the switch S1 is connected.
R and the individual contact S2R of the switch S2 are commonly connected to the amplifier PR of the right channel.

The demodulation circuits DEM1 and DEM2 are realized by a low-pass filter whose cutoff frequency is selected as the upper limit frequency Ft, and demodulate a high-speed 1-bit digital signal into an analog signal. Low-pass filters F11, F2
1 is selected as the upper limit frequency Fa, whereby an audio signal component is extracted from the analog signal,
The signals are input to switches S1 and S2. Switches S1, S2
The analog audio signals of the left and right channels accurately distributed as described below are amplified by the amplifiers PL and PR, and then are acoustically converted from the speakers SPL and SPR.

The switches S1 and S2 are switched and controlled in conjunction with each other by a channel switching signal output from a channel discriminating circuit CTL1 or CTL2 in response to the channel discriminating signal extracted by the band-pass filter F12 or F22. You. Bandpass filter F1
2 and F22 extract the channel discrimination signal having the carrier frequency Fs as a center frequency and therefore being superimposed on the audio signal. The channel discrimination circuit CTL1 is
When the band discrimination signal is extracted by the band-pass filter F12, a channel switching signal for turning on the switches S1 and S2 to the individual contacts S1L and S2R, respectively, is output. On the other hand, the channel discrimination circuit CTL2
When the channel discrimination signal is extracted by the bandpass filter F22, the switch outputs a channel switching signal for turning on the switches S1 and S2 to the individual contacts S1R and S2L, respectively.

The low-pass filters F11 and F21 are
It is sufficient that high-frequency noise components such as a channel discrimination signal can be removed. As described above, a primary filter having a cutoff frequency of the upper limit frequency Fa may be used, and can be realized by, for example, one resistor and one capacitor. Further, the band-pass filters F12 and F22 also have the upper limit frequencies Fa to Ft.
It is only necessary to extract the component (1), and it can be realized by a primary filter. Also, depending on the application, 60
A high-pass filter having a cut-off frequency of about kHz may be used.

Further, the band-pass filters F12,
F22 is configured by providing a low-pass filter at the front stage and a high-pass filter at the rear stage, and when the 1-bit digital signal can be demodulated by the low-pass filter at the front stage, the demodulation circuits DEM1 and DEM2 may be omitted. . In this case, the audio signal components are demodulated by the low-pass filters F11 and F21.

FIG. 5 is an electric circuit diagram showing a specific configuration of the channel determination circuit CTL1. The input channel discrimination signal is a continuous sine wave signal of the carrier frequency Fs as shown in FIG. 6A, and the channel discrimination signal is supplied to the amplifier AMP as shown in FIG. 6B. Amplified. The channel discrimination signal from the amplifier AMP is rectified by the diode D as shown in FIG. 6C and smoothed by the capacitor C as shown in FIG. The signal is output to the switches S1 and S2 as a signal. When the switches S1 and S2 reach a high level equal to or higher than the threshold voltage indicated by the reference numeral Vth in FIG.
Conduction is made to each of S2R.

The channel discrimination circuit CTL2 has the same configuration as the channel discrimination circuit CTL1, except that the channel discrimination circuit CTL2 outputs a low-level channel switching signal when the channel discrimination signal is detected. Thus, when the channel discrimination signal is detected on the channel discrimination circuit CTL2 side, the switches S1 and S2 are turned on to the individual contacts S1R and S2L, respectively.

The band-pass filter F12 and the channel discriminating circuit CTL1, or the band-pass filter F
22 and the channel discriminating circuit CTL2 may be provided in only one of the channels. In this case, for example, the channel discriminating circuit is provided in the left channel, and the same as described above. When the channel discrimination signal is superimposed on the left channel,
When the channel discrimination signal is detected, the switches S1, S2
To the individual contacts S1L and S2R, respectively, and when no channel discrimination signal is detected, the individual contacts S1R and S2R
What is necessary is just to output the channel switching signal which conducts to 2L, respectively.

FIG. 7 shows the delta-sigma modulation circuit MOD.
FIG. 3 is a block diagram specifically illustrating a configuration example of L. This delta-sigma modulation circuit MODL includes the above-described FIG. 2 and FIG.
Since a high noise shaping effect is required as shown in FIG. 5, the delta-sigma modulation circuit MODL is realized by a high-order (seventh-order in the example of FIG. 5) delta-sigma modulation circuit. Therefore, the integrating circuit M is connected in cascade.
The integrators M1 to M7 are provided. Outputs from the integrators M1 to M6 are input to the next-stage integrators M2 to M7 via multipliers A2 to A7, respectively.

In connection with the integrators M2 and M3, a delay unit D1 for delaying the output of the integrator M3 by one sampling period and outputting the result is multiplied by a predetermined multiplication coefficient to the output from the delay unit D1. A partial feedback loop is formed which includes a multiplier A11 that performs the above operation and an adder K2 that performs negative feedback of the output from the multiplier A11 to the input side of the integrator M2. Similarly, regarding the integrators M4 and M5, the delay unit D2 and the multiplier A12
And a partial feedback loop formed by the adder K4 and
Regarding the integrators M6 and M7, the delay unit D3 and the multiplier A1
A partial feedback loop including 3 and an adder K6 is formed.

The outputs from the integrators M1 to M7 are added to each other in an adder K10 and then quantized in a quantizer Q to a 1-bit signal of "1" or "-1". The quantization result of the quantizer Q is output from the terminal T3 and is negatively fed back to the adder K1 provided before the integrator M1 via the delay unit D0. Terminal T
1 from the audio signal source GL and the adder K1
, The signal is added to the channel discrimination signal Sin from the oscillator OS inputted from the terminal T2, and the delay unit D
After being added to the negative feedback signal from 0, it is input to the integrator M1.

Note that another delta-sigma modulation circuit M
The ODR is configured similarly to the delta-sigma modulation circuit MODL, except that the adder K1 simply adds a negative feedback signal to the audio signal of the right channel.

In this way, the audio signal transmission device 1a
Can switch between the left and right channels in response to the channel determination signal superimposed on the audio signal, and can accurately demodulate the audio signals of the left and right channels. In the case of realization by time division multiplexing, a special format is required and an error prevention circuit or the like is required. On the other hand, the audio signal transmission device 1a is provided with a channel identification signal required for an audio signal. Are multiplexed by frequency division, so that the adder K1 can also be used for superposition, and simple low-order bandpass filters F12 and F22 need only be used for separation, and the configuration is greatly simplified. Can be Furthermore, the channel determination signal only needs to be able to determine the presence / absence of a signal. Therefore, as is clear from FIG. 4, the carrier frequency Fs has a sufficient S / N to determine the quantization noise level. There is no misjudgment.

FIG. 8 shows a second embodiment of the present invention.
It is as follows if it explains based on.

FIG. 8 is a block diagram showing an electrical configuration of the audio signal transmission device 1b according to the second embodiment of the present invention. In the audio signal transmission device 1b, an emphasis determination signal composed of a continuous sine wave signal similar to that of the above-described audio signal transmission device 1a is multiplexed as an additional information signal. The emphasis determination signal indicates whether or not a pre-emphasis process for emphasizing a specific frequency component of the audio signal has been performed. Therefore, when the pre-emphasis processing is being performed, the audio signal demodulated in the receiving circuit RXb is subjected to the de-emphasis processing.

In the transmission circuit TXb, an emphasis determination signal of the carrier frequency Fs from the oscillator OS is input to one of the delta-sigma modulation circuits MODL or MODR (MODL in the example of FIG. 8) via the switch Sb. Is done. The switch Sb is turned on when pre-emphasis processing is selected, whereby
The emphasis determination signal is a sound signal source GL or GR
Are multiplexed by frequency division into the audio signal from The opening / closing of the switch Sb is performed by turning off / on the pre-emphasis circuit when the pre-emphasis circuit is provided in the transmission circuit TXb.
May be performed in conjunction with the audio signal sources GL, GR
If a pre-emphasis circuit is provided on the side,
It may be performed using a dedicated switching signal between the audio signal sources GL and GR, or may be performed by a user.

Delta sigma modulation circuit M for each of the left and right channels
The 1-bit digital signals from the ODL and MODR are respectively input to demodulation circuits DEML and DEMR in the reception circuit RXb via transmission lines JL and JR of the left and right channels, respectively. The demodulation circuits DEML and DEMR, like the demodulation circuits DEM1 and DEM2, are implemented by first-order low-pass filters whose cutoff frequency is selected as the upper limit frequency Ft. Analog signals output from the demodulation circuits DEML and DEMR are respectively supplied to low-pass filters FLL and FLL.
Input to FLR.

The cut-off frequency of the low-pass filters FLL, FLR is set to the upper limit frequency Fa, similarly to the low-pass filters F11, F21. The analog audio signals of the left and right channels from the low-pass filters FLL and FLR are converted into de-emphasis circuits EMPL and EMPR.
And a speaker S via the amplifiers PL and PR, respectively.
The sound is converted from PL and SPR.

The de-emphasis circuit EMPL includes a resistor rL1, rL2 interposed in series on a signal line between the low-pass filter FLL and the amplifier PL, and a connection between a connection point of the resistors rL1, rL2 and a ground line. And a series circuit of a capacitor cL and a switch SL interposed therebetween. As described later, when the pre-emphasis process is being performed, the switch SL
Is conducted, whereby the attenuation of the audio signal from the low-pass filter FLL to the amplifier PL increases as the frequency of the audio signal increases. That is, in the example of FIG. 7, the pre-emphasis processing is high-frequency emphasis.

In this manner, by performing the de-emphasis operation corresponding to the pre-emphasis constant, the analog audio signal input to the amplifiers PL and PR can have flat frequency characteristics.

Similarly to the de-emphasis circuit EMPL, the de-emphasis circuit EMPR also includes resistors rR1, rR
The switch SR includes an R2, a capacitor cR, and a switch SR. The switch SR is controlled to open and close in conjunction with the switch SL.

The channel on which the emphasis determination signal is superimposed (the left channel in the example of FIG. 7) is provided with a band configured in the same manner as the band-pass filters F12 and F22 and the channel determination circuits CTL1 and CTL2. A pass filter FB and an emphasis determination circuit CTLb are provided. An analog signal from the demodulation circuit DEML is input to the band-pass filter FB together with the low-pass filter FLL. After the emphasis determination signal is extracted, the analog signal is input to the emphasis determination circuit CTLb. Emphasis determination circuit CTLb
Turns on the switches SL and SR when the emphasis determination signal is detected.

In this way, a signal indicating the presence or absence of pre-emphasis necessary for an audio signal can be superimposed on a 1-bit digital signal. On the demodulation side, in accordance with the presence or absence of pre-emphasis, de-emphasis is performed. ON / O
FF can be automatically selected. Further, by simply connecting the emphasis determination signal to the light emitting diode as it is, a display circuit indicating the presence or absence of pre-emphasis can be configured.

Since the emphasis discrimination signal and the above-described channel discrimination signal can sufficiently secure the usable band of the additional information signal as shown in FIG.
As shown by a solid line and a virtual line in, one of them may be a sine wave signal of the carrier frequency Fs and the other may be superimposed as another carrier frequency between the upper limit frequencies Fa to Ft. .

FIG. 9 shows a third embodiment of the present invention.
This will be described below with reference to FIG.

FIG. 9 is a block diagram showing an electrical configuration of an audio signal transmission device 1c according to the third embodiment of the present invention. This audio signal transmission device 1c is similar to the above-described audio signal transmission device 1a, and the corresponding portions are denoted by the same reference numerals and description thereof will be omitted. This audio signal transmission device 1
In c, the analog or multi-bit audio signals from the audio signal sources GL and GR are converted into high-speed 1-bit digital signals at a sampling frequency of 32 fs, for example, by delta-sigma modulation circuits MODL and MODR in the transmission circuit TXc. After that, it is input to the time division multiplexing circuit MPX.

This time-division multiplexing circuit MPX corresponds to FIG.
10A, the 1-bit digital signals from the delta-sigma modulation circuits MODL and MODR shown in FIG. 10B are alternately sampled at twice the frequency, that is, 64 fs, and as shown in FIG. A left-right alternating 1-bit digital signal is created and output to the transmission path J.

Correspondingly, on the receiving circuit RXc side, an input signal from the transmission line J is converted into a channel separating circuit DIV.
In FIG. 10 (a) and FIG. 10 (b), 1-bit signals of the left and right channels shown in FIGS. 10 (a) and 10 (b) are separated, and a 1-bit signal of one of the left and right channels is input to the demodulation circuit DEM1, and the other is Is input to the demodulation circuit DEM2. The channel separation circuit DIV includes a pair of sample-hold circuits or latch circuits that can hold a high-speed 1-bit signal of 64 fs with a shift of 64 fs from each other and a period of 32 fs.

The analog signal demodulated by the demodulation circuit DEM1 is commonly input to the filters F11 and F12.
An analog signal from the demodulation circuit DEM2 is commonly input to the filters F21 and F22. Therefore, the analog audio signals of the respective left and right channels to be supported are input to the amplifiers PL and PR, amplified by the amplifiers PL and PR, and then sounded from the speakers SPL and SPR, respectively.

In this way, data for discriminating left and right data can be added to a 1-bit signal serially transmitted by mixing left and right channels without using a special format. it can.

FIG. 1 shows a fourth embodiment of the present invention.
1 and FIG. 12 are as follows.

FIG. 11 is a block diagram showing an electrical configuration of an audio signal transmission device 1d according to a fourth embodiment of the present invention. The audio signal transmission device 1d is similar to the above-described audio signal transmission devices 1a, 1b, and 1c, and corresponding portions are denoted by the same reference numerals and description thereof is omitted. It should be noted that in the audio signal transmission device 1d, time information is used as additional information.

In the transmission circuit TXd, an encoder ENC and a time information generation circuit GT are provided together with the delta-sigma modulation circuits MODL and MODR and the oscillator OS. The time information generating circuit GT has the configuration shown in FIG.
As shown by the symbol, a digital serial signal that repeats a high level or a low level intermittently according to time information to be added is generated. This time information is about 8 bits of data representing the elapsed time of each music piece of the audio signal and / or the total time from the start of transmission, and may be generated on the transmission circuit TXd side as shown in FIG. Also, similarly to the above-described emphasis determination signal, the audio signal sources GL, G
It may be input from the R side.

The sine wave signal from the oscillator OS is modulated by the digital serial signal into an intermittent signal as shown in FIG. 12B in the encoder ENC, input to the delta-sigma modulation circuit MODL, and output from the audio signal source GL.
And then converted to a 1-bit digital signal.

On the other hand, on the receiving circuit RXd side, the demodulating circuit DE
From the analog signal from the ML, while the audio signal component of the left channel is extracted by the low-pass filter FL,
The signal is input to the decoder DEC via the band pass filter FB. The decoder DEC decodes the intermittent signal as shown in FIG. 12B extracted by the band-pass filter FB into a digital serial signal as shown in FIG. 12A and outputs the digital serial signal to the display drive circuit DRV. I do.

The display drive circuit DRV outputs a predetermined display signal to the display device DIS in accordance with the input digital serial signal. The display device DIS is configured by, for example, arranging a plurality of day-shaped segments, and performs display in response to a display signal from the display drive circuit DRV. In this way, the time information multiplexed with the audio signal by frequency division can be displayed and output on the receiving circuit RXd side.

When the transmission amount is insufficient with only the left channel for the time information, both the left and right channels may be used, or the audio signal transmission devices 1a, 1b, and 1b may be used for the other channel on which the time information is not superimposed. Another effective signal may be superimposed on the audio signal as shown by 1c.

FIG. 1 shows a fifth embodiment of the present invention.
3 will be described below.

FIG. 13 is a block diagram showing an electrical configuration of an audio signal transmission device 1e according to the fifth embodiment of the present invention. The audio signal transmission device 1e is implemented as a new hi-fi audio system used in a home or business, for example. The transmission circuit TXe serving as a base station includes:
Audio signal source G having various sampling frequencies fs
1, G2 and G3 are connected, and the transmission circuit TXe oversamples the multi-bit digital audio signals of the respective left and right channels from these to form high-speed 1-bit digital signals, and transmits the optical transmission lines OPL and OPR spatially. Then, transmission is performed to one or a plurality of receiving circuits RXe. When a plurality of the receiving circuits RXe are provided, these receiving circuits RXe are installed in each room or the like, and demodulate the received high-speed 1-bit digital signal of each of the left and right channels into an analog audio signal of each of the right and left channels, respectively.
After being amplified by L and PR, the sound is converted from the speakers SPL and SPR.

Therefore, in the transmission lines OPL and OPR, in order to reproduce a waveform in which a large amount of attenuation and distortion has occurred and perform reproduction with high fidelity, the receiving circuit RXe side
A system clock signal for demodulation is generated by the system clock generation circuit CK2.

On the transmission circuit TXe side, on the other hand, the audio signal sources G1, G2, and G3 are, for example, fs
= 44.1 kHz CD, fs = 48 kHz DAT, and fs = 32 kHz satellite broadcasting (A mode), etc., when a multi-bit digital audio signal source of a different sampling frequency is used, the system clock for the input digital audio signal is The frequency of the system clock signal generated by the generation circuit CK1 is switched.

That is, each audio signal source G1, G2, G3
Are input to the delta-sigma modulation circuits MODL and MODR via input changeover switches SWL and SWR, respectively, and are operated by a user. The input selection circuit SEL that switches these input switches SWL and SWR in conjunction with each other also switches the clock oscillation frequency of the system clock generation circuit CK1 in conjunction with the switching of the input switches SWL and SWR. As a result, as described above, FS = 32 fs
Or, oversampling of a predetermined number of times is always performed, such as FS = 64 fs.

The delta-sigma modulation circuits MODL, MO
The sampling timing of the DR quantizer Q, the delay times of the delay units D0, D1, D2, and D3 and the time constants of the integrators M1 to M7 are also controlled by the system clock signal. On the other hand, from the oscillator OS, F
A pilot spectrum that is a sine wave of s = 200 kHz is generated and added to the left-channel multi-bit digital signal in the adder K1 in the delta-sigma modulation circuit MODL.

As described above, the transmission circuit TXe outputs
Audio signal sources G1 and G having different sampling frequencies fs
2 and G3 are selected, and a high-speed 1-bit digital signal with a sampling frequency FS adapted to each is created and output.

On the receiving circuit RXe side, the transmission path OP
The high-speed 1-bit digital signals of the left and right channels from the L and OPR are input to 1-bit extraction circuits SMPL and SMPR, respectively, where, for example, waveform shaping is performed, and signal degradation due to the transmission lines OPL and OPR is reduced. Compensated. The high-speed 1-bit digital signals of the left and right channels from the 1-bit extraction circuits SMPL and SMPR are input to the signal processing circuits PRCL and PRCR via the mute circuits MUTL and MUTR, respectively. Signal processing circuit PRC
The L and PRCR demodulate a high-speed 1-bit digital signal into an analog audio signal in response to a system clock signal. The left channel analog audio signal from the signal processing circuit PRCL is output to the amplifier PL after the pilot spectrum is subtracted in a pilot spectrum subtraction circuit PIL implemented by a low-pass filter or the like, and is output from the signal processing circuit PRCR. The right channel analog audio signal is directly output to the amplifier PR.

The high-speed 1-bit digital signal from the 1-bit extraction circuit SMPL is a narrow-band band-pass filter FB whose center frequency is the carrier frequency Fs.
Thus, the analog demodulation and the pilot spectrum component of the carrier frequency Fs are extracted, and the output is input to the pilot spectrum detection circuit DET. This pilot spectrum detection circuit DET derives an output to a clock control circuit CTLCK when a pilot spectrum is detected at a predetermined level or higher.

The clock control circuit CTLCK controls the system clock generation circuit CK2 to change the frequency of the system clock signal to each of the audio signal sources G1, G2, G
3 and a sampling frequency FS corresponding to each sampling frequency fs. When the pilot spectrum is detected by the band-pass filter FB and the pilot spectrum detection circuit DET, the frequency of the system clock signal is sampled. Since the frequency matches the frequency FS, the switching is stopped.

As described above, one-bit extraction circuit SMP
L, SMPR and signal processing circuits PRCL, PRCR
Can extract a 1-bit signal and demodulate it into an analog audio signal based on a system clock signal having a frequency corresponding to the sampling frequency FS selected on the transmission circuit TXe side. The output from the pilot spectrum detection circuit DET is output from the mute circuit MU.
When the pilot spectrum is not detected, the muting circuits MUTL and MUTR stop outputting the high-speed 1-bit digital signal. As a result, it is possible to prevent the demodulation-defective analog audio signal from being acousticized.

FIG. 1 shows a sixth embodiment of the present invention.
The description based on No. 4 is as follows.

FIG. 14 is a block diagram showing an electrical configuration of an audio signal transmission device 1f according to the sixth embodiment of the present invention. This audio signal transmission device 1f is similar to the above-described audio signal transmission device 1e, and the corresponding portions are denoted by the same reference numerals and description thereof will be omitted. It should be noted that in the audio signal transmission device 1f, analog or multi-bit audio signals from the audio signal sources GL and GR are sampled using the sampling frequency FS as an arbitrary frequency.

That is, in the audio signal transmission device 1e, the sampling frequency f from the audio signal sources G1 to G3 is used.
The multi-bit digital audio signals having different s are multiplied by a predetermined number in the delta-sigma modulation circuits MODL and MODR.
For example, while oversampling is performed at a sampling frequency FS of 32 or 64 times, in the audio signal transmission device 1f, the sampling frequency FS can be arbitrarily set.

Therefore, on the transmission circuit TXf side, the system clock generation circuit CK3 that supplies the system clock signal to the delta-sigma modulation circuits MODL and MODR is
The dynamic range, the effective frequency band, the transmission capacity of the transmission lines OPL, OPR, and the audio signal sources GL, G
The oscillation frequency is changed by the clock control circuit CKVAL in accordance with the type of the audio signal from R or the like. In response to this, on the receiving circuit RXf side, the clock control circuit CKSCAN causes the system clock generating circuit CK4 to sweep the oscillation frequency of the system clock signal so that the pilot spectrum is detected by the pilot spectrum detecting circuit DET. Then, the level of the detected pilot spectrum gradually increases, and when the level reaches the peak value, the sweep operation is stopped.

Thus, the sampling frequency FS
Even if is set to an arbitrary value, a high-speed 1-bit digital signal can be accurately demodulated into an analog audio signal, and the sampling frequency FS can have a certain width without particularly setting the sampling frequency FS.

As described above, the audio signal transmission devices 1a, 1b, 1c, 1d, 1e, and 1f according to the present invention focus on the distribution characteristics of the quantization noise of a 1-bit digital signal by delta-sigma modulation, and Since additional information is multiplexed by frequency division between upper limit frequencies Fa to Ft which have no influence, a signal processing format for adding such additional information becomes unnecessary, and a complicated signal processing circuit becomes unnecessary. be able to.

The present invention is not limited to the data transmission apparatus as described above, but includes transmission circuits TXa, TXb, TXc, TXd, T
A recording device in place of Xe or TXf, and a receiving circuit R
The present invention can also be implemented for recording / reproducing by using a reproducing apparatus instead of Xa, RXb, RXc, RXd, RXe or RXf. Further, it goes without saying that the signal transmission may be performed by light or electricity, and may be performed by wire or wireless. Furthermore, the main signal is not limited to the audio signal, and may be another signal to which a 1-bit encoding method based on delta-sigma modulation can be applied.

As described above, the high-speed delta-sigma-modulated 1-bit digital signal is transmitted through the transmission path J;
2; each of the above-described audio signal transmission devices 1a, 1b, 1c, and 1 is hardly affected by JL and JR and resistant to errors.
In d, 1e, and 1f, the error correction circuit is omitted. This error correction circuit, waveform shaping circuit for jitter removal,
The configurations of a circuit for isolating data from digital circuit noise such as a clock, a duty ratio control circuit for RT (Return To Zero) encoding, and a moving average circuit for reducing high-frequency noise include demodulation circuits DEM1 and DEM2. ;
DEML, DEMR and signal processing circuits PRCL, PR
In connection with the CR, it is appropriately added depending on the application.

[0100]

As described above, the delta-sigma modulation circuit according to the first aspect of the present invention converts a sub-signal having an information amount corresponding to a dynamic range at a frequency higher than the main signal into a frequency higher than the main signal. Multiplex by division.

Therefore, on the demodulation side, the sub-signal can be separated with a simple configuration such as a band-pass filter, and the circuit for signal processing can be simplified.

Further, in the delta-sigma modulation circuit according to the second aspect of the present invention, as described above, the superimposition of the sub-signal on the main signal is performed by the addition stage in the delta-sigma modulation circuit.

Therefore, multiplexing can be performed without adding a special configuration, by also using the addition stage for delaying the quantized output and negatively feeding back to the input side.

Furthermore, in the delta-sigma modulation circuit according to the third aspect of the present invention, as described above, the main signal is an audio signal, the sub signal is a flag indicating channel information, a flag indicating presence / absence of pre-emphasis, a time information Alternatively, at least one of the sampling frequency information is used.

Therefore, these flags and information necessary for the audio signal are converted into a predetermined signal within a narrow dynamic range by utilizing the fact that the flags and information are small bits.
/ N can be secured and superimposed.

In the signal transmission or recording / reproducing apparatus according to the fourth aspect of the present invention, as described above, the above-mentioned delta sigma modulation circuit is provided in the transmitting apparatus or the recording apparatus, and the receiving apparatus or the reproducing apparatus has a low-order signal. A filter is provided to separate the sub-signal from the received or reproduced 1-bit signal.

Therefore, the separation of the sub-signals can be realized with a simple configuration.

Furthermore, in the signal transmission or recording / reproducing apparatus according to the fifth aspect of the present invention, as described above, the receiving apparatus or the reproducing apparatus converts the main signal into the audio signal and the sub-signal into the channel information. Based on this, channel separation such as left and right channels, heavy bass channels, and front and rear four channels is performed.

Therefore, in the conventional multi-bit signal,
Such channel information multiplexed by time division is
It can be multiplexed by frequency division and easily extracted on the demodulation side.

In the signal transmission / recording / reproducing apparatus according to the sixth aspect of the present invention, as described above, the main signal is used as an audio signal, the sub signal is used as a flag indicating the presence or absence of pre-emphasis, and in response to the flag, De-emphasis ON / OF
Control F.

Therefore, in the conventional multi-bit signal,
Such a flag multiplexed by time division can also be multiplexed by frequency division and easily extracted.

Further, in the signal transmission or recording / reproducing apparatus according to the seventh aspect of the present invention, as described above, the main signal is used as the audio signal, the sub-signal is used as the sampling frequency information, and the system clock which can extract the sub-signal is used. The 1-bit signal is demodulated.

Therefore, for a multi-bit input signal having a different sampling frequency fs, the multiple of the oversampling can be reduced without performing complicated processing such as converting the sampling rate and unifying the sampling frequency FS of the 1-bit signal. Even if the multi-bit input signal is converted to a 1-bit signal while being kept constant, the sampling frequency is matched between the delta-sigma modulation side and the demodulation side by changing the system clock so that the sub-signal can be extracted. 1-bit digital signals can be accurately demodulated.

Thus, when multiplexing information representing the sampling frequency, such as a subcode, into an audio signal, complicated processing such as time axis compression can be eliminated, and complicated processing such as the sampling rate conversion can be omitted. The sampling frequency can be given a range without any processing.

In the signal transmission or recording / reproducing apparatus according to the eighth aspect of the present invention, as described above, the transmitting apparatus or the recording apparatus performs oversampling of multi-bit input signals having different sampling frequencies fs by a predetermined number of times. ,
The receiving device or the reproducing device switches the system clock so that the sub signal can be detected.

Therefore, it is possible to easily and quickly set an appropriate type of sampling frequency among the sampling frequencies fs of a plurality of types of input signals that are determined in advance.

Furthermore, in the signal transmission or recording / reproducing apparatus according to the ninth aspect of the present invention, as described above, the transmitting apparatus or the recording apparatus can set the system clock to an arbitrary frequency, and the receiving apparatus or the reproducing apparatus Sweeps the frequency of the system clock and stops the sweep operation when a sub-signal is detected.

Therefore, even if the sampling frequency is set arbitrarily according to the desired dynamic range, frequency band, bit rate, etc., special processing is performed on the main signal to add information representing the sampling frequency. And demodulation can be performed accurately.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a basic configuration when the present invention is applied to an audio signal transmission device.

FIG. 2 is a graph showing frequency characteristics of a quantization noise level for explaining the concept of the present invention.

FIG. 3 is a block diagram showing an electrical configuration of the audio signal transmission device according to the first embodiment of the present invention.

FIG. 4 is a graph for explaining a frequency spectrum of an audio signal, an additional information signal, and quantization noise according to an embodiment of the present invention.

FIG. 5 is an electric circuit diagram showing a specific configuration of a channel determination circuit in the audio signal transmission device shown in FIG. 3;

FIG. 6 is a waveform chart for explaining the operation of the channel determination circuit shown in FIG. 5;

FIG. 7 is a block diagram specifically showing a configuration example of a delta-sigma modulation circuit in the audio signal transmission device shown in FIG.

FIG. 8 is a block diagram illustrating an electrical configuration of an audio signal transmission device according to a second embodiment of the present invention.

FIG. 9 is a block diagram illustrating an electrical configuration of an audio signal transmission device according to a third embodiment of the present invention.

FIG. 10 is a diagram for explaining a time division multiplexing operation in the audio signal transmission device shown in FIG.

FIG. 11 is a block diagram illustrating an electrical configuration of an audio signal transmission device according to a fourth embodiment of the present invention.

12 is a waveform chart for explaining the operation of the audio signal transmission device shown in FIG.

FIG. 13 is a block diagram illustrating an electrical configuration of an audio signal transmission device according to a fifth embodiment of the present invention.

FIG. 14 is a block diagram illustrating an electrical configuration of an audio signal transmission device according to a sixth embodiment of the present invention.

[Explanation of symbols]

1, 1a, 1b, 1c, 1d, 1e, 1f Audio signal transmission device ACT signal processing circuit CK1 to CK4 system clock generation circuit CKSCAN clock control circuit CTL control circuit CTL1, CTL2 channel discrimination circuit CTLb emphasis discrimination circuit CTLCK clock control circuit D0 , D1, D2, D3 Delay device DEM; DEM1, DEM2; DEML, DEMR
Demodulation circuit DEC decoder DET pilot spectrum detection circuit DIS display device DIV channel separation circuit DRV display drive circuit ENC encoder F11, F21; FL; FLL; FLR low-pass filter F12, F22; FB band-pass filter G1, G2, G3; GM; GL , GR audio signal source GS additional information signal generation circuit GT time information generation circuit J1, J2; J; JL, JR transmission line M integration circuit MOD; MODL, MODR delta-sigma modulation circuit MPX time-division multiplexing circuit MUTL, MUTR mute circuit OS Oscillator OPL, OPR Transmission path P; PL, PR amplifier PIL Pilot spectrum subtraction circuit PRCL, PRCR Signal processing circuit RX, RXa, RXb, RXc, RXd, RXe, RX
f Receiving circuit Q Quantizer S1, S2 switch SEL Input selection circuit SP; SPL, SPR speaker SMPL, SMPR 1-bit extraction circuit SW channel switching circuit SWL, SWR Input switching switch TX, TXa, TXb, TXc, TXd, TXe, TX
f transmission circuit

──────────────────────────────────────────────────続 き Continuation of front page (72) Inventor Toru Hayase 22-22 Nagaikecho, Abeno-ku, Osaka-shi, Osaka Inside Sharp Corporation (56) References JP-A-5-235930 (JP, A) JP-A-1- 291536 (JP, A) Japanese Utility Model Hei 6-66138 (JP, U) (58) Field surveyed (Int. Cl. ⁷ , DB name) H03M 3/02 H04J 1/05

Claims (9)

(57) [Claims] 1. A 1-bit main signal having a desired dynamic range and effective frequency band in a delta-sigma modulation circuit for sampling a digital signal represented by analog or multi-bit at a high speed and converting it into a 1-bit signal. At a predetermined frequency higher than the higher frequency side, a sub signal of an information amount corresponding to a dynamic range at the predetermined frequency is superimposed on the main signal via a carrier wave of the predetermined frequency by frequency division multiplexing. Delta-sigma modulation circuit. 2. The delta-sigma modulation circuit according to claim 1, wherein the superimposition of the sub-signal on the main signal is performed by an addition stage in the delta-sigma modulation circuit. 3. The main signal is an audio signal, and the sub-signal is at least one of a flag indicating channel information, a flag indicating presence / absence of pre-emphasis, time information, and sampling frequency information. 3. The delta-sigma modulation circuit according to claim 1, wherein: 4. A transmission device or a recording device, wherein the delta-sigma modulation circuit according to claim 1 is provided in a transmission device or a recording device, and the reception device or the reproduction device performs the sub-signal conversion from the received or reproduced 1-bit signal. Signal transmission or recording / reproducing apparatus, wherein the separation of the signals is performed by a low-order filter. 5. The delta-sigma modulation circuit according to claim 1, wherein the main signal is an audio signal, the sub-signal is channel information, and a delta-sigma modulation circuit according to claim 1 or 2 is provided in a transmission device or a recording device.
A signal transmitting or recording / reproducing device, wherein the receiving device or the reproducing device performs left / right or multi-channel separation based on the sub-signal. 6. A delta-sigma modulation circuit according to claim 1, wherein said main signal is an audio signal, said sub-signal is a flag indicating the presence or absence of pre-emphasis, The device or the playback device responds to the flag and turns on / off the de-emphasis.
A signal transmission or recording / reproducing apparatus, characterized by controlling: 7. A delta-sigma modulation circuit according to claim 1, wherein said main signal is an audio signal, said sub-signal is sampling frequency information, and said transmission apparatus or recording apparatus is provided with a delta-sigma modulation circuit. Is a system clock from which the sub-signal can be extracted at the predetermined frequency.
A signal transmission or recording / reproducing apparatus for demodulating a bit signal. 8. The transmission device or the recording device includes input selection means for selecting an input and selecting a clock oscillation frequency of a system clock generation circuit from a plurality of predetermined frequencies in accordance with a result of the selection. The receiving device or the reproducing device, a narrow band filter having a pass band of the predetermined frequency, the output of the narrow band filter is input, the clock oscillation frequency of the system clock generation circuit so that the sub signal is detected The signal transmission or recording / reproducing apparatus according to claim 7, further comprising a clock control circuit for switching. 9. The transmitting device or the recording device includes a clock control circuit that can set a clock oscillation frequency of a system clock generating circuit to an arbitrary frequency, and the receiving device or the reproducing device has a predetermined frequency. A narrow-band filter having a pass band, a clock control circuit capable of sweeping a clock oscillation frequency of a system clock generating circuit, and an output of the narrow-band filter is input, and when the sub-signal is detected, the sweep operation is stopped. The signal transmission or recording / reproducing apparatus according to claim 7, further comprising a detection circuit.