JP3252532B2 - Digital data recording method and apparatus - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a digital data recording / reproducing method and apparatus capable of variable speed reproduction, and more particularly to an error correction capability during normal reproduction while increasing the amount of digital data recorded on a magnetic tape. The present invention relates to a digital data recording method and apparatus capable of improving the digital data.

[0002]

2. Description of the Related Art In a digital VTR of dynamic tracking (DT system) which performs tracking by a variable speed reproduction method by moving a movable head up and down, generally, all lap angles are effectively used, so that a digital video signal and a digital audio signal are used. The signal or any digital data cannot be effectively recorded on most areas of the magnetic tape as in normal recording. The reason is DT
In consideration of the variable speed reproduction, all the recording tracks cannot be traced unless the total lap angle is larger than the recording lap angle. This is because if the head protrudes or protrudes from the lower end and the upper end of the magnetic tape within the total wrap angle, there is a restriction that the magnetic tape is damaged.

The above is described more specifically below with reference to FIG. FIG. 4 shows a state in which the DT head can trace the magnetic tape.
The area where the T head can exist is shown. When the recording track angle is determined, the angle (wrap angle) at which the magnetic tape is wound on the rotating drum is a necessary condition that the magnetic head does not protrude from the magnetic tape within the wrap angle. From this condition and the movable range of the magnetic head,
A rotating drum contact start line and a contact end line are determined.
That is, the effective wrap angle is determined. Assuming that digital data is recorded all the time between the contact of the magnetic tape and the rotating drum (total wrap angle), depending on the position of the DT head, the area indicated by the symbol L is:
In principle, a part of the recording track cannot be traced. Therefore, conventionally, all of the recording tracks can be traced within the operating range of the DT head, that is, L
It was necessary to make the recording lap angle narrower than the effective lap angle so that = 0. In the figure, the area shown between the black points is the recording wrap angle. That is, conventionally, only the area shown between black points can be used as a program area for recording digital data, that is, a digital video signal and / or a digital audio signal.

[0004]

The size of the unused area (ineffective area) between the white circle and the black point shown in FIG. 4 depends on the movable width of the DT head. In track recording, this movable width also requires a large amount, so that the unused area is further increased, which is not preferable from the viewpoint of high-density recording.

Accordingly, the present invention achieves high density even when performing variable speed reproduction in the DT system.
It is an object of the present invention to provide a digital data recording method and a digital data recording apparatus that can use the above-mentioned unused area.

[0006]

According to the present invention, in variable-speed reproduction tracking by a movable (DT) head,
Assuming that the recording track cannot be physically traced at the start or end of the contact between the magnetic tape and the DT head, and that the reproduced data is lost during variable speed reproduction, the effective recording angle should be set to the total lap angle as much as possible. Get closer. Then, the missing data is restored by error correction during reproduction. Therefore, at the time of recording, an error correction code capable of reproducing the digital data missing at the time of variable speed reproduction is added to digital digital and recorded. In the present invention, the digital data recorded on the helical track of the magnetic tape includes digital video signals only, digital data obtained by mixing digital video signals and digital audio signals, and digital audio signals only. These are collectively called digital data. The area where these digital data are recorded is called a program area.

That is, according to the present invention, in a digital data recording method for recording digital data on a magnetic tape using displacement head means, the effective recording angle and the total wrap angle are made substantially equal, and the magnetic tape cannot be reproduced during variable speed reproduction. A digital data recording method characterized in that an error correction code is added to the digital data so that the digital data recorded in at least one of the two ends of the digital data can be reproduced.

Further, according to the present invention, a displacement head means,
Means for processing digital data to be recorded on a magnetic tape by making the effective recording angle and the total wrap angle substantially equal; and capable of reproducing the digital data recorded in an area on at least one of both ends of the magnetic tape which cannot be reproduced during variable speed reproduction. A digital data recording apparatus having means for adding an error correction code and recording the data as described above.

[0009]

In practice, longitudinal tracks for recording cue signals and recording control signals are provided at the upper and lower ends of the magnetic tape. In addition, since a margin such as compatibility is required, generally, the total wrap angle is different from the effective wrap angle. However, in the present invention, the effective recording angle and the total wrap angle are made substantially equal to each other and are used for recording program data up to a normally reproducible program area. When the program area is expanded in this manner, a loss of reproduced data occurs near the two longitudinal edges of the magnetic tape during variable speed reproduction. In the present invention, while assuming the loss, as a measure against the loss, an error correction code capable of reproducing the loss at the time of recording is added to the digital data, the lost data is detected at the time of reproduction, and the error correction code is used. Restore missing data. The erasure correction is an error correction method when an error location (byte) is known in advance, and generally, the same number of bytes as the added parity byte can be corrected. A digital VTR usually employs a Reed-Solomon product code configuration using an outer code and an inner code, and all errors that cannot be corrected by the inner code are set with an error flag and erasure correction is performed by the outer code. In the present invention, the parity (outer code) is increased by the increased area and the missing data is restored by such erasure correction. However, the coding method of the present invention is not limited to the Reed-Solomon product code configuration. No data loss occurs during normal reproduction. Therefore, according to the present invention, more powerful error correction can be performed by adding a parity by increasing the program area.

[0010]

FIG. 1 is a block diagram of a high-definition VTR as an embodiment of a digital data recording / reproducing apparatus according to the present invention. FIG. 1A shows a recording system of a VTR, and FIG. 1B shows a reproducing system. The recording video signal and the reproducing video signal include, for example, a luminance signal Y and a first color difference signal P.
_B, component signals of a second color difference signals P _R,
Alternatively, a component signal including R, G, and B is exemplified. In the following examples, the luminance signal Y, first color difference signal P _B, describes a component signal consisting of the second color difference signals P _R. The recording system of the VTR includes an A / D converter 3, an outer code ECC circuit 4, a shuffling circuit 5, a synchronization / ID signal adding circuit 6, an inner code ECC circuit 7, a modulation circuit 8, a recording amplifier circuit 9, and a recording amplifier. It has a head 10. The VTR reproduction system includes a reproduction head 11, a reproduction amplification circuit 12, a demodulation circuit 13, an inner code decoding circuit 14, a deshuffling circuit 15, an outer code decoding circuit 16, and an error correction (co
nceal) circuit 17 and a D / A converter 18. FIG.
In the VTRs shown in (A) and (B), R, G, B or the luminance signal Y, the first
The component video signals as configured by the color difference signal P _B and the second color difference signals P _R and recorded on the magnetic tape, reproducing such component signal. In the following description, a luminance signal Y, a first chrominance signal P _B, and a second chrominance signal P
_{An example in which R} is recorded and reproduced will be described.

The operation of the recording system of the VTR will be described. When the video signal is in the form of an analog signal, it is converted into a digital signal in the A / D converter 3 and applied to the outer code ECC circuit 4. When the video signal is in the form of a digital signal, it is directly applied to the outer code ECC circuit 4. Outer code EC
The C circuit 4 calculates an outer code and adds it to the video signal for error correction during reproduction. The shuffling circuit 5 rearranges output data from the outer code ECC circuit 4 in order to disperse a burst error during reproduction with respect to the outer code sequence. The synchronization / ID signal adding circuit 6 adds, to the shuffled video signal, a synchronization signal serving as a reference for reading the video signal at the time of reproduction, an address indicating the number of each block, and an index (ID) such as field information. The inner code ECC circuit 7 adds an inner code for error correction to the output data from the synchronization / ID signal adding circuit 6. The modulation circuit 8 modulates the data to which the inner code has been added by the inner code ECC circuit 7 into a data sequence matching the magnetic recording characteristics of the magnetic tape and the recording head 10. This modulation method includes:
For example, scramble NRZ modulation, mirror square modulation, and the like can be applied. The modulated video signal is amplified by a recording amplifier circuit 9 and recorded on a magnetic tape (not shown) via a recording head 10.

The operation of the reproduction system of the VTR will be described. The video signal recorded on the magnetic tape described above
And amplified by the reproducing amplifier circuit 12. The demodulation circuit 13 demodulates the video signal so as to return to the video signal modulated by the modulation circuit 8. The inner code decoding circuit 14 corrects the error of the demodulated video signal using the inner code. The deshuffling circuit 15 deshuffles the error-corrected video signal so as to return to the previous data arrangement performed by the shuffling circuit 5. The outer code decoding circuit 16 decodes the video signal that has been deshuffled using the outer code into a video signal that has not been processed by the outer code ECC circuit 4. Even in the inner code decoding circuit 14 and the outer code decoding circuit 16, it is often impossible to completely correct the error. The error correction circuit 17 performs a correction process for concealing the error by using a video signal at the same position in a field around the pixel where the error remains and before and after the field or in the previous frame. The video signal whose error has been corrected by the error correction circuit 17 is output as it is as a reproduced digital video signal or is converted into an analog video signal via a D / A converter 18 and output as a reproduced analog video signal. The RF detection circuit 21 and the variable head control circuit 22 shown in FIG. 2 will be described later.

FIG. 3 is a diagram showing tracking during variable speed reproduction by the DT head. To perform tracking during variable speed reproduction, it is generally necessary to change the height of the reproduction head. FIG. 3 shows that it is necessary to change the height of the DT head momentarily in the direction shown by the arrow in order to track the recording track when the magnetic tape advances in the direction opposite to the normal reproduction. In order to change the height of the DT head, usually, the DT head is mounted on an actuator such as a piezoelectric element and the expansion and contraction of the actuator is controlled. To do so, the voltage applied to an actuator such as a piezoelectric element may be changed.

Signals for controlling the DT head are roughly classified into the following three types of element signals. (1) Slope control signal The trace angle of the DT head is determined by the running speed of the magnetic tape. In order to maintain the trace angle, a slope (slope) signal is required. The running speed of the magnetic tape can be determined from the period of the capstan frequency generation signal FG indicating the rotation speed of the capstan. A rotary drum pulse generation signal PG indicating the position of the rotary drum is used for resetting the slope voltage. (2) Jumping control signal After tracing the track, the DT head needs to return to the track closest to the original head height position, and the jumping control signal is used to cause the DT head to jump to the closest track. The control signal CTL and the capstan frequency generation signal FG are used for detecting the position (movement amount) of the magnetic tape. (3) Tracking control signal This signal is for accurately tracing the track, and the DT head height is gradually reduced by the hill-climbing approach so that the envelope of the reproduction non-frequency signal RF is maximized. The movement of the envelope of the frequency signal RF in the direction in which the envelope is increased is repeated.

FIG. 2 shows the variable head control unit 22 shown in FIG.
FIG. The variable head control unit 22 generates the above-described control signal, and controls the CPU 229 of the microcomputer that controls the entire operation described below;
The RF envelope signal S21 from the detection circuit 21 and the rotary drum pulse generation signal PG indicating the position of the rotary drum
Tracking control circuit 225 that generates a tracking control signal based on the control signal CTL, a jumping control signal that generates a jumping control signal based on a control signal CTL, a capstan frequency generation signal FG indicating the position of the capstan motor, and a rotating drum pulse generation signal PG 223; a slope control circuit 221 for controlling the inclination of the DT head based on the capstan frequency generation signal FG and the rotating drum pulse generation signal PG;
An addition circuit 227 adds signals from 1, 223 and 225.

FIG. 4 is a VTR for the high-definition television shown in FIG.
FIG. 3 is a diagram showing an area of a magnetic head recorded / reproduced by the magnetic head. Practically, the upper and lower ends of the magnetic tape are provided with longitudinal tracks for recording cue signals and recording control signals. In addition, since a margin such as compatibility is required, generally, the total wrap angle is different from the effective wrap angle. However, in this embodiment, the program area is extended to between the white circles. FIG.
As shown in FIG. 5, according to the present embodiment, digital data (program data) is recorded between the white circles shown in FIG. With respect to the conventional program area defined between black points, a trial calculation is made as to how much the program area defined in the present embodiment defined between white circles increases with respect to the conventional area.

Table 1 Conditions (1) Effective wrap angle 180 ° (2) Recording track angle 4.6 ° (3) Rotary drum diameter 82 mm (4) DT head operating range ± 300 μm

Therefore, the interval between the white circle and the black point is 0.3 / t.
Since an = 4.6 ° = 3.75 mm and the track length between the white circles is 128.7 mm, the rate of increase is (3.75 × 2) × 100 / 128.7 = 5.8%. That is, the track length can be increased by 5.8%.

When the program area is expanded in this way,
At the time of variable-speed reproduction, reproduction data is lost near both edges along the longitudinal direction of the magnetic tape. In this embodiment,
Assuming that this data is lost, digital data is recorded on a magnetic tape using an error correction code as a measure against the data loss, and at the time of reproduction, the data is deleted using erasure correction in the reproduction system shown in FIG. To restore. In general, when erasure correction is performed, data having the same number of bytes as that of an invalid parity can be corrected. A digital VTR usually employs a Reed-Solomon product code configuration using an outer code and an inner code, and sets all errors that cannot be corrected by the inner code to an error flag. Erasure correction is performed using a code. In this embodiment, the missing data is restored by increasing the parity (outer code) by the increased area of 5.8%. No data loss occurs during normal reproduction. Therefore, stronger error correction can be performed by the increased outer parity code.

A preferred embodiment of the error correction code will be described in detail. A VTR will be exemplified as an error correction processing device. VTR
In, a video signal is recorded on a magnetic tape by adding an error correction code, and when the recorded video signal is reproduced, an error of the reproduction signal is corrected using the error correction code. As such an error correction code, an error correction code using an inner code and an error correction code using an outer code are used. The inner code is an error correction code for data relatively close to each other in the recording pattern, and the inner code is generally considered to be effective for random errors. An outer code is an error correcting code for data as far as possible from each other in a recording pattern. The outer code is effective for, for example, a burst-like error in which a magnetic tape is damaged and a video signal is lost. It has been. In general, take the inner code in the horizontal direction and take the outer code in the vertical direction of the video signal array,
In many cases, calculations are performed in the horizontal and vertical directions to form a product code.

In the ECC configuration of the VTR illustrated in FIG. 1, a burst error of up to about 5 to 7% of all recorded data is corrected by an error correction circuit, and a burst error of more than 5% is corrected by an error correction circuit 17. Yes, it is. For example, when data of one track is lost, the error correction circuit 17 operates to obtain a reproduced image which is almost equal to an error-corrected signal. In addition, the ECC is configured so that a large burst error as large as one track can be positively corrected for errors.
The C block is completed in track units or head units. In the above-described VTR, data to be recorded is processed in pixel units, errors occurring during reproduction are corrected by an error correction circuit (ECC), and even if data that cannot be corrected occurs, erroneous data is eliminated by shuffling. It is distributed on the screen. Since the data around the erroneous data is not erroneous, the error correction processing in the error correction circuit 17 is easy, and even if the reproduced signal is partially corrected, it is possible to obtain a reproduced image of almost the same quality.

The error correction processing described with reference to FIG. 1 is based on the assumption that error correction is performed on a pixel-by-pixel basis, and is not a block-based processing described later. In particular, in the above-described error correction code processing, error correction over a plurality of tracks is not performed. Digital VTR using image compression technology
In the image compression processing, for example, 8 samples ×
Since processing is performed in block units such as 8 lines, if an error occurs during playback and error correction cannot be performed,
The error propagates to a block of 8 samples × 8 lines, which is a processing unit, and data of the entire block is lost. Therefore, in the error correction processing, it is necessary to correct data not in the above-described pixel unit but in the block unit, and a problem that the error correction processing becomes very complicated and difficult is encountered. Further, when high-density recording is pursued in a high definition digital VTR, problems such as shortening of recording wavelength and shortening of track pitch are encountered.
The shortening of the track pitch means a narrow track, and the head must accurately trace the recorded track during reproduction. Considering further editing in a digital VTR, in insert recording, the recorded data is erased from a position already recorded on the magnetic tape to another position with a flying erase head, and then a new video signal is written with the recording head. Record. Normally, track patterns on a magnetic tape in a continuously recorded portion are finely arranged at equal intervals. However, when recording is performed later by editing, a gap occurs between the track patterns at the start position and the end position of the portion to be recorded later.
The size of this discontinuity can be controlled by mechanical circuits, especially the physical accuracy and mounting accuracy of the flying erase head, or how the recording head is controlled by the servo circuit at the position where the track pattern is continuously formed during editing. It is related to that. These matters become narrow tracks in the high-density digital VTR,
No matter how accurate and precise the process is, there are limitations in terms of variations. In addition, in order to be accurate and precise, there is a problem that the price of the apparatus is high. When the magnetic tape edited in this way is reproduced, only one track of the data recorded before editing is partially erased or overwritten at the beginning and end of the editing point. The track width becomes narrow (so-called track narrowing), and the error rate of reproduced data increases. In extreme cases, data of one track may be lost.

The second embodiment of the present invention specifically describes an error correction code in the error correction described in the first embodiment. An example will be described in which the error correction capability when a video signal is recorded at high density on a narrow track in block units is improved. Further, in the second embodiment, in consideration of the editing process,
Improve reliability by providing error correction capability up to the track unit. FIG. 5 is a configuration diagram of a high definition digital VTR as a second embodiment of the present invention. FIG. 5A is a configuration diagram of a recording system of the digital VTR, and FIG. 5B is a configuration diagram of a reproduction system of the digital VTR. The recording system of the digital VTR includes an A / D converter 3, a block shuffling circuit 5A, and a bit rate reduction (BRR).
Encoding circuit 121, block / outer code ECC circuit 4A,
It has a channel interleave circuit 122, a synchronization / ID signal addition circuit 6A, a block / internal code ECC circuit 7A, a modulation circuit 8A, a recording amplifier circuit 9, and a recording head 10. The playback system of the digital VTR includes a playback head 1
1, reproduction amplifier circuit 12, demodulation circuit 13A, block
Inner code decoding circuit 14A, channel deinterleave circuit 123, block deshuffling circuit 15A, block / outer code decoding circuit 16A, bit rate reduction (BRR) decoding circuit 124, block deshuffling circuit 15A, error correction (conceal) circuit 17A, D /
It has an A converter 18. Digital VTR shown in FIG.
Is provided with the RF detection circuit 21 and the variable head control circuit 22 shown in FIG. 1, but the second embodiment does not particularly refer to the operation of the DT head.
1 and the description of the variable head control circuit 22 are omitted. Of course, the digital VTR shown in FIG. 1 and the digital VTR shown in FIG. 5 can be integrated. As a recording video signal, R, G, B or the luminance signal Y, and recorded component video signals as configured in a first color difference signal P _B and the second color difference signals P _R on the magnetic tape, the Such a component signal is reproduced. In the following description, the luminance signal Y and the first
And recording color difference signals P _B and the second color difference signals P _R, is illustrated for the case of reproducing.

The operation of the recording system of the digital VTR shown in FIG. If the video signal is in the form of an analog signal, it is converted into a digital signal in the A / D converter 3 and input to the block shuffling circuit 5A. When the video signal is in the form of a digital signal, it is directly applied to the block shuffling circuit 5A. The block shuffling circuit 5A distributes the video signal to discrete positions in block units in relation to the outer code, and when the BRR encoding circuit 121 compresses the image in block units, for example, the block shuffling circuit 5A Dispersion processing is performed to make the compression ratio uniform between the image data that can change the compression ratio very much for a video with little change and the image data that cannot compress very much for a complicated video. The BRR encoding circuit 121 compresses a video signal in block units shuffled in block units. The block / outer code ECC circuit 4A adds an outer code to an image-compressed video signal in block units. The channel interleave circuit 122 equally divides and distributes data in the outer code direction into tracks of one field. The synchronization / ID signal adding circuit 6A adds a synchronization signal for reproduction, an ID / address, and the like. The block / internal code ECC circuit 7A performs synchronization / I
An inner code is added to the output data of the D signal adding circuit 6A.
The modulation circuit 8A performs 8/14 modulation, and the video signal modulated via the recording amplification circuit 9 and the recording head 10A is recorded on the magnetic tape 30.

An outline of the operation of the data VTR reproducing system shown in FIG. The video signal recorded on the magnetic tape 30 is read out via the reproducing head 11 and amplified by the reproducing amplifier circuit 12. Demodulation circuit 13A
Performs demodulation corresponding to 8/14 modulation in the modulation circuit 8A,
The video signal is modulated back by the modulation circuit 8A. block·
The inner code decoding circuit 14A corrects the error of the demodulated video signal in block units using the inner code. The channel de-interleave circuit 123 is
The processing opposite to the equal division and distribution performed in step 2 is performed. The block / outer code decoding circuit 16A restores the video signal signal based on the outer code added by the outer code ECC circuit 4A. The bit rate reduction decoding circuit 124 performs image decompression processing that is the reverse of the image compression processing performed by the BRR encoding circuit 121. The block deshuffling circuit 15A performs an inverse process of the shuffling performed by the block shuffling circuit 5A. The error correction circuit 17A performs a correction process for concealing an error that could not be corrected by the outer code. That is, the error correction circuit 17A performs a correction process of concealing the error by using the video signal at the same position in the surrounding and adjacent fields of the pixel where the error remains or the previous frame. The video signal corrected by the error correction circuit 17A is output as it is as a reproduced digital video signal,
The signal is converted into an analog video signal via the / A converter 18 and output as a reproduced analog video signal.

FIG. 6 shows a schematic sectional configuration of the recording head 10A. Eight heads 1-8 is provided in the recording head 10A, records the eight tracks of data per revolution in 120H _Z, 180 degrees wound on the magnetic tape 30, 2
By rotation, data for 16 tracks, that is, one field of data is recorded on the magnetic tape 30. That is, since the present embodiment is a digital VTR for high definition, the number of scanning lines is 11
25 this field, T for high-definition of frequency 60H _Z
The V signal is recorded on the magnetic tape 30 such that the number of heads is 8 and the number of tracks per field is 16 tracks.

FIG. 7 shows the image area recorded per field and the number of image compression conversion blocks. HDTV TV signal luminance signal Y, a first color difference signal P _B and a second component signal having color difference signals P _R, when the number of recording lines and 544 lines per field, recording the number of samples, the luminance signal Y About 1
920 samples, each of the first color difference signal P _B and the second color difference signal P _R is half of 960 samples of the luminance signal Y, the image compression conversion total number of blocks per field becomes 32,640 blocks.

In the recording system shown in FIG. 5A, the analog component video signal for high-definition recording is converted by the A / D converter 3 into a luminance signal Y of 7 bits.
4.25MH _Z, for the first color difference signal P _B and the second color difference signals P _R is quantized sampled at 37.125MH _Z. Block shuffling circuit 5A
In the video signal composed of one block = 8 samples × 8 lines for which the image compression processing is performed in the BRR encoding circuit 21, one field shown in FIG.
32640 block luminance signal Y, first color difference signal P _B
And second color difference signals P _R while mixing, rearranged. As described above, the rearrangement processing in block units in the block shuffling circuit 5A includes not only making the image compression rate uniform in the BRR encoding circuit 21 but also making the outer code added in the outer code ECC circuit 4A discrete. Is intended. In the block shuffling circuit 5A, the video signal illustrated in FIG. 7 is divided so that four parallel (channel) processing is performed, that is, 8160 blocks per channel. FIG. 8 illustrates a configuration of four channels. This four-parallel processing is for reducing the load of signal processing because the high-definition video signal described above is high-speed. BRR encoding circuit 121
, The video signal shuffled by the block shuffling circuit 5A is image-compressed to 1 / 3.37.

The processing in the block / outer code ECC circuit 4A, the channel / interleave circuit 122, and the block / inner code ECC circuit 7A will be described. Block / outer code ECC circuit 4A and block / inner code E
In the CC circuit 7A, as illustrated in FIG. 8, the outer code and the inner code are added to the shuffling video signal from the block shuffling circuit 5A so that the outer code and the inner code for error correction have a product code configuration. Is added. That is,
In FIG. 8, an inner code is added in the horizontal direction and an outer code is added in the vertical direction, and the outer code and the inner code form a product code. For each channel, the luminance signal Y has 4080 blocks, the first color difference signal P _B and the second color difference signal P _R
Are 2040 blocks, and an outer code and an inner code are added in block units for a total of 8160 blocks. That is, for the video signal in 8160 blocks,
68 bytes in outer code (vertical) direction, 8 bytes in inner code (horizontal) direction
A product code configuration is formed with the compressed data for the blocks. The ECC block in this example is 15 per channel.
It becomes an ECC block. Since the image compression ratio is 1 / 3.37, the number of data in the inner code direction is 152 bytes.
As the outer code, a 12-byte outer code (parity) is added to 68-byte data. Therefore, the number of data in the outer code direction is 80 bytes. In this example, a Reed-Solomon code is used as the outer code. The reason that the outer code is 12 bytes is as follows.
Not only the tracks but also the two tracks can be corrected at the same time, and the error correction of the two tracks requires an outer code of 10 bytes, but it is 12 bytes for margin. The code length of the outer code needs to be an integral multiple of N, assuming that the number of tracks per field is N and that the code length is evenly distributed over N tracks. In this example, the number of data in the outer code direction, 80 bytes,
Since the data for one field is recorded on 16 tracks by two rotations using the recording head 10A illustrated in FIG. 2, the number of tracks is equal to five times N = 16. As the inner code, a total of 164 bytes is obtained by adding a 12-byte Reed-Solomon code to 152-byte data.
The channel interleave circuit 122 outputs 8 in the outer code direction.
0-byte data is equally divided and distributed into 16 tracks per field.

As described above, the data to which the outer code and the inner code are added and processed so as to be evenly distributed to 16 tracks are added to the magnetic recording characteristics of the magnetic tape 30 and the recording head 10A in the modulation circuit 8A. It is modulated into the combined data sequence. In this example, 8/14 modulation is performed. The modulated data is amplified in the recording amplifier circuit 9 and recorded on the magnetic tape 30 via the recording head 10A illustrated in FIG. That is, the recording head 10
Is rotated twice, and data of one field and 16 tracks is recorded on the magnetic tape 30.

The operation of the reproduction system of the digital VTR illustrated in FIG. 5B will be described. The reproducing head 11 reads the data recorded on the magnetic tape 30. The reproducing amplifier circuit 12 amplifies the read data and further equalizes the data as necessary. The demodulation circuit 13A performs demodulation reverse to that of the modulation circuit 8A, and returns to the data sequence before modulation in the modulation circuit 8A.

The block / inner code decoding circuit 14A, the channel deinterleave circuit 123,
The operation of the outer code decoding circuit 16A will be described. The block / inner code decoding circuit 14A performs the first-stage error correction on a block basis using the added inner code. The channel deinterleave circuit 123 restores the data divided and distributed to each track. The block / outer code decoding circuit 16A performs second-stage error correction in block units using the added outer code. As described above, the outer code is obtained by adding 12 bytes of parity to 68 bytes of data, and for the number of tracks = 16, 1 / N track = 1/16 track = 0.0625 <(12 bytes / 80 Byte =) 0.15, which is sufficient for performing error correction in track units. That is, powerful error correction can be realized. When 80 bytes of data in the outer code direction are evenly distributed over 16 tracks, it becomes 5 bytes / track. Therefore, even if the data of one track is completely lost at the time of editing, the error in the outer code of each ECC block results in an error of 5 bytes each. Therefore, the addition of the parity of 12 bytes can sufficiently correct the error. Further, even if clogging occurs in one of the eight heads, two bytes of data will be lost, and when viewed in the outer code direction in each ECC block,
Since an error occurs every 10 bytes, the error can be sufficiently corrected by performing the erasure correction by adding the parity of 12 bytes. As described above, since the product code configuration of Reed-Solomon is adopted, all errors that cannot be corrected by the inner code are set with an error flag and erasure correction is performed by the outer code. Regarding a burst error, even if 15% of the data of one field data is lost in 16 tracks, the data is lost by the error correction and the data can be restored.

Bit rate reduction decoding circuit 12
4 is a BRR for the error-corrected data described above.
The image decompression process is performed in the reverse order of the encoding circuit 121. The block deshuffling circuit 15A performs a process reverse to the shuffling performed by the block shuffling circuit 5A, and restores the data in block units to the original order. The error correction circuit 17A corrects an error in a block that cannot be corrected by the above-described error correction and remains as an error. When the reproduced video signal is output in an analog form, the output data of the error correction circuit 17A is converted into an analog signal by the D / A converter 18.

Although the above-described embodiment has been described in relation to a high definition video signal, in implementing the present invention,
The error correction processing can be performed not only for the video signal but also for the audio signal in the same manner as described above. In the above-described embodiment, the video pixel signal of 8 samples × 8 lines 1 = 64 has been described as one block. However, the pixel configuration of this block is an example, and the embodiment of the present invention has the following block configuration. Is not limited. As component video signal, the luminance signal Y, has been illustrated for the case of applying the first color difference signal P _B and the second color difference signals P _R, present also in the case of using R, G, and component video signals B The invention can be applied. Further, the configuration of the recording head 10A illustrated in FIG. 6 is merely an example, and the recording head 10 illustrated in FIG. 2 can be used. That is, it is not limited to the above-described arrangement of the heads, and is not limited to the configuration of eight multi-heads.
It goes without saying that the present invention is applied even when an arbitrary multi-head is used.

Further, a digital VTR for high definition has been exemplified as a preferred embodiment of the present invention. However, the error correction processing of the present invention is not limited to digital VTRs other than high definition and generally includes an inner code as an error correction code and an outer code. The present invention can be applied to an error correction code process in which, among error correction codes in which a code and a code are double-added to data, the outer code is formed over a plurality of streams for one processing unit of data.

In the second embodiment of the present invention, when the number of tracks per field is N, an outer code is added to the digital recording data by 1 / N or more, and the inner code and the outer code are added. The product code configuration is characterized in that the outer code of the double added error correction code is formed over N tracks for one field. In the second embodiment of the present invention, the data subjected to the error correction code processing is subjected to first-stage error correction in units of blocks using the added inner code, and using the added outer code. The second stage of error correction is performed on a block-by-block basis, and a correction process for concealing errors remaining by the error correction is performed. Further, in the second embodiment of the present invention, the inner code and the outer code as error correction codes are double-added to digital data as a product code configuration, and the outer code is added to the digital data among the added error correction codes. And a plurality of streams for one processing unit. Second embodiment of the present invention
The embodiment further includes means for blocking digital data into blocks of a predetermined size and block shuffling in a predetermined relationship, and block / outer code adding means for adding an outer code to the shuffled data in block units. Error correction code processing for digital data, comprising: a block / inner code adding means for adding an inner code to the data to which the outer code has been added in block units, and taking a product code configuration with the outer code and the inner code. Features the device. Further, a second embodiment of the present invention is a block / inner code decoding means for performing a first-stage error correction on a block-by-block basis using the inner code in the data processed by the digital data error correction code processor. , For the inner code error corrected data,
The second unit is used in block units using the added outer code.
Block / outer code decoding means for performing error correction of the stage, block / deshuffling means for performing block deshuffling processing reverse to the processing in the block / shuffling means for the data in which the outer code error has been corrected, and the inner code And an error correction decoding device for digital data, comprising: an error correction means for performing a correction process for concealing an error remaining by outer code error correction.

In the first and second embodiments described above, the recording and reproduction of a video signal has been described. However, the present invention is not limited to the recording and reproduction of a video signal, but may be applied to the recording and reproduction of an audio signal. it can. Further, the present invention can be applied to recording and reproduction of a video signal and an audio signal. As the latter example, a method of recording a video signal and an audio signal on the same track is known.
Further, the expansion of the area for recording digital data need not be performed on both the upper and lower ends of the magnetic tape, but can be performed on any one of them.

[0037]

According to the present invention, loss of reproduced data at the entrance and exit of the magnetic tape in variable speed reproduction by tracking of the DT head is allowed, and the program area on the magnetic tape can be effectively used. Extra parity (outer code) is added to restore missing data during variable speed playback, but the extra HDTV enables strong error correction during normal playback, and error rates due to dropout and compatibility It is effective against the decrease of

Further, according to the present invention, the burst error correction capability is greatly improved, and the probability of performing error correction processing is reduced. Therefore, highly reliable reproduced image data can be obtained without increasing the load of error correction processing. According to the present invention, it is possible to perform error correction even for data loss in track units, so that there is a margin in editing timing, and V
Authorize the burden on the mechanical and servo systems of the TR. As a result, the reliability of the VTR can be improved. Further, according to the present invention, in a VTR that records and reproduces image data with a plurality of heads, the ECC is configured so that the number of tracks equal to or greater than the number of tracks recorded by one head per field can be corrected. As a result, image data can be restored by error correction even for one head clog.

[Brief description of the drawings]

FIG. 1 is a block diagram of a high-definition VTR as a digital data recording / reproducing apparatus according to a first embodiment of the present invention. FIG. 1 (A) is a block diagram of a recording system, and FIG. 1 (B) is a block diagram of a reproducing system. It is.

FIG. 2 is a detailed configuration diagram of a variable head control unit shown in FIG.

FIG. 3 is a diagram illustrating tracking during variable speed reproduction by a DT head.

FIG. 4 is a diagram showing an area of a magnetic head recorded and reproduced by the high-vision VTR shown in FIG. 1;

5A and 5B are configuration diagrams of a high definition digital VTR according to a second embodiment of the present invention, wherein FIG. 5A is a configuration diagram of a recording system, and FIG. 5B is a configuration diagram of a reproduction system.

6 is a schematic diagram of a multi-rotation head in the digital VTR shown in FIG.

7 is a configuration diagram of a video signal subjected to signal processing in the digital VTR shown in FIG.

8 is a signal form diagram for explaining a method of performing signal processing on the video signal shown in FIG. 7 in the digital VTR shown in FIG. 1;

[Explanation of symbols]

3 A / D converter 4 Outer code ECC circuit 4A Block outer code ECC circuit 5 Shuffling circuit 5A Block shuffling circuit 6, 6A Synchronization ID signal adding circuit 7 ··· Inner code ECC circuit 7A ··· Block · Inner code ECC circuit 8: 8A ··· Modulation circuit 9 ··· Recording amplifier circuit 10, 10A ··· Recording head 11 ··· Reproduction head 12 ···· Reproduction amplifier circuit 13: 13A demodulation circuit 14 inner code decoding circuit 14A block inner code decoding circuit 15 deshuffling circuit 15A block deshuffling circuit 16 outer code decoding circuit 16A block outer code decoding Circuit 17 Error correction circuit 17A Block error correction circuit 18 D / A converter 21 RF signal detection circuit 22 Variable head control unit 1 21 bit rate reduction (BRR) encoding circuit 122 channel interleave circuit 123 channel deinterleave circuit 124 bit rate reduction (BRR) decoding circuit

──────────────────────────────────────────────────続 き Continuation of the front page (51) Int.Cl. ⁷ identification code FI G11B 20/18 570 G11B 20/18 570K 572 572B 572G (58) Investigated field (Int.Cl. ⁷ , DB name) G11B 5 / 09,20 / 18

Claims (2)

(57) [Claims] 1. A digital data recording / reproducing method for recording digital data on a magnetic tape using displacement head means, wherein an effective recording angle and a total wrap angle are made substantially equal, and at least both ends of the magnetic tape which cannot be reproduced during variable speed reproduction. A digital data recording method, characterized by adding an error correction code to said digital data so that data recorded in one area can be reproduced. 2. Displacement head means, means for processing digital data to be recorded on a magnetic tape by making the effective recording angle and the total wrap angle substantially equal, and at least one area at both ends of the magnetic tape which cannot be reproduced during variable speed reproduction. Means for adding an error correction code to the digital data so that the data recorded in the digital data can be reproduced and recording the digital data.