JP3237613B2 - Method of manufacturing probe card - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a probe card which eliminates need for a tester in electrically inspecting a semiconductor device, enables electric inspection supporting high frequency and high speed and can be easily downsized, and a method for manufacturing the probe card. SOLUTION: A ball bump 5 is formed, a pit 16 having a recess is formed at a part corresponding to a position of the ball bump 5 on a semiconductor substrate 1 by etching, a conductor wire 4 is formed on an internal wall of the pit 16, and the ball bump 5 is formed on the pit 16 formed with the conductor wire 4. A circuit forming part (tester device) 2 for the purpose of electric characteristic inspection is formed in advance on the semiconductor substrate 1 by a semiconductor diffusion process.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a probe card using a semiconductor device composed of an LSI chip and a method of manufacturing the same, and more particularly to a structure of a connection portion provided with concave pits in the LSI chip. is there.

[0002]

2. Description of the Related Art In the manufacture of semiconductor products, for example, IC chips, an IC in a wafer state is provided at the final stage of a pre-process.
When inspecting a chip, a probe card as proposed in Japanese Patent Application Laid-Open No. 3-126240 is used. Hereinafter, this probe card will be described with reference to FIG. In the final stage of the pre-process of the semiconductor device, when performing an electrical inspection in a wafer state, FIG.
As shown in FIG. 2, a ball bump group 22 corresponding to a pad of a wafer chip and a ball bump group 22 'corresponding to a tester terminal are separately formed on a silicon substrate 21 such as P-type or N-type silicon by etching. I do. Impurity 23 for lowering the resistance of valence +3 or valence +5 is implanted into each ball bump group, and a ball bump group 22 corresponding to the wafer chip and a ball bump group 22 ′ corresponding to the tester terminal are formed. Between the other silicon substrate 2
The surface of No. 1 has a large resistance value by an oxide film or the like.
There is also a probe card in which a compensation circuit 25 for high-frequency measures is wired on a silicon substrate 21 in an electric transmission path 24 of the probe card.

Using the probe card having the above-described structure, the XY table on which the IC chip is mounted is properly positioned (X, Y, and O angles), so that the pads of the IC chip and the ball bumps are formed. By an appropriate pressing contact with the group 22, the conductive state is brought into a conductive state from the ball bump group 22 'to the connection terminal on the tester side through the electric transmission path 24, and the electrical characteristics of the IC chip are tested.

[0004]

In the above-mentioned conventional probe card, a silicon projection formed on a silicon substrate by an etching method is used in order to electrically connect with a pad of a wafer chip to establish electrical conduction. However, it is very difficult to control the height of the protrusion to a level of several μm by the etching method. Therefore, it is impossible to cope with narrow pitch and taping.

In addition, since the silicon projection is integrated with the silicon substrate, if even one pin becomes defective, the probe card corresponding to one IC chip becomes defective, resulting in high cost. Would. Since the repair is impossible, the entire probe card is discarded. At the same time, the inspection state of the wafer becomes missing, and a re-inspection is required.

In order to reduce the resistance value of the ball bump groups 22 and 22 ', impurities are implanted. However, when the number of pins is increased, the pitch becomes narrower.
Type or NPN type parasitic transistor is formed, and a certain leak current flows. Therefore, accurate electrical characteristics inspection cannot be performed.

Further, the conventional probe card has only two functions of contacting the pads of the wafer chip for electrical conduction and connecting to a tester. Therefore, both a probe card and a tester are required. This tester is very expensive and requires enormous capital investment.

[0008] In general, a defect mark is attached to a chip having a defective inspection to clarify the defect, but the conventional technology does not have that function.

SUMMARY OF THE INVENTION An object of the present invention is to provide a probe card which does not require a tester in performing an electrical inspection of a semiconductor device, enables an electrical inspection corresponding to a high frequency and a high speed, is easy to miniaturize, and a method of manufacturing the same. It is to be.

[0010]

According to the present invention, a semiconductor wafer is coated with a resist, the resist is removed from portions where pits are to be formed through an exposure and development process, and a concave pit portion is formed on the semiconductor substrate by etching. Forming, forming a contact hole for electrically connecting the circuit forming portion and the device surface with a metal oxide layer, and forming an aluminum conductor wiring on the metal oxide layer, Forming a protective film in a region other than the pit portion forming region;
a step of forming a thin film conductor layer made of i-Au or Cr-Cu-Au, and a step of forming a ball bump on the metallized pit portion by subjecting the brazing material to a heat treatment. Is obtained.

Further, according to the present invention, in the formation of the ball bump, a metal-plated plastic ball or conductive resin ball is formed in a pit portion by heat treatment with the brazing material. Is obtained.

[0012]

[0013]

[0014]

[0015]

[0016]

[0017]

[0018]

[0019]

[0020]

[0021]

[0022]

[0023]

[0024]

According to the probe card manufactured by the manufacturing method of the present invention, a pit is formed on a semiconductor substrate, a repairable ball bump is formed on the pit, and a contact portion of the probe card is formed. The probe card itself of the present invention is formed on the upper and lower surfaces of the substrate, mounting a semiconductor chip, providing an opening in the semiconductor substrate, incorporating a light emitting device, and incorporating a tester device. Becomes a tester. As a result, there is an effect that a large area becomes unnecessary and a huge investment becomes unnecessary.

Further, it is possible to flexibly cope with a change in the tester standard and to clarify a defect. Further, the probe card itself can be significantly reduced in size, and the number of pins can be increased with high density and high accuracy.

[0026]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, manufacturing of the present invention with reference to FIG. 1
The probe card manufactured by the manufacturing method will be described first embodiment. The probe card shown in FIG.
It is manufactured through the steps described below (see FIG. 2). Note that the lead wire 3 is a lead wire for supplying power, and in FIG.
The protective film and the thin film conductor layer formed on the lower surface of the semiconductor substrate 1 are omitted. The same applies to the following FIGS. 3 to 6 as well.

In FIG. 2, reference numeral 1 denotes a semiconductor substrate formed of an LSI chip, which has a size of 4.5 mm × 12.0 m.
m. Reference numeral 2 denotes a circuit forming portion, and 12 denotes a metal oxide film formed for insulating and protecting the circuit forming portion. Here, since a silicon chip is used for the semiconductor substrate 1, the metal oxide film 12 is silicon oxide. The aluminum conductor wiring 4 is electrically connected to the circuit forming portion 2 via a contact hole 19. The aluminum conductor wiring 4 is connected to the inside of the pit portion 16 formed in the semiconductor substrate 1. A thin film conductor layer 14 of Cr-Cu-Au is formed on the aluminum conductor wiring 4 inside the pit portion 16 in order to improve the metallization property and the connectivity of the ball bump 5. In order to protect the surface, a protective film 1 made of polyimide is formed in a region excluding a portion where the ball bump 5 is formed.
8 are formed.

The following process was employed to realize the structure of the probe card. First, as shown in FIG. 2A, a circuit forming portion 2 is formed on a semiconductor substrate 1 using a semiconductor silicon wafer and utilizing a semiconductor diffusion process technique. Next, as shown in FIG. 2B, a pit portion 16 is formed on the pad portion of the semiconductor substrate 1 by an etching method. The silicon used here had a (100) plane and was etched by pit formation. The etching was performed with a KOH solution using a resist as a mask by lithography. The pit shape was a square of 0.1 mm × 0.1 mm on the device surface and narrowed in the depth direction like a quadrangular pyramid. Etching was stopped at a depth of 0.08 mm. Next, as shown in FIG. 2C, a metal oxide film 12 of silicon oxide is formed to insulate and protect the circuit forming portion 2 of the semiconductor device, and a metal oxide film 12 is formed to electrically connect with the aluminum conductor wiring 4. A contact hole 19 is formed in the film 12. Next, as shown in FIG.
Aluminum conductor wiring 4 is formed on metal oxide film 12 by a method such as sputtering or vapor deposition.

Next, as shown in FIG. 2E, a protective film 18 made of a polyimide resin is formed on the aluminum conductor wiring 4 in a region excluding the region where the pit portion 16 is formed. As shown in FIG. 2F, sputtering and vapor deposition are performed on the aluminum conductor wiring 4 in the formation area of the pit portion 16 for the purpose of metallizing, wettability, and adhesion of the ball bump 5 and further as a barrier metal. Thin-film conductor layer 1 of Cr-Cu-Au by electrolytic plating or electroless plating
4 is formed. Next, as shown in FIG. 2G, the ball bump 5 is formed on the pit portion 16. For the ball bump 5, first, a solder ball mainly containing Pb—Sn is prepared and arranged in the pit portion 16. By heating to the temperature at which the solder melts and melting the solder balls, ball bumps connected to the underlying metal can be formed. Finally, FIG.
As shown in (h), the power supply lead wire 3 is attached, and the process ends.

Here, by using the circuit forming section 2 as a semiconductor device as a tester device, a probe card with a built-in tester device is obtained, and the probe card itself functions as a tester. With such a structure, the following effects can be obtained.

1. Since a tester device is formed on the probe card itself, an expensive tester is not required.

2. Since the material of the probe card is the same as that of the device under test, no distortion due to the difference in the material occurs, so that displacement, contact failure and the like do not occur.

3. Since lithography technology is used to form the pits at locations corresponding to the conventional ball bump group, narrow pitch, multi-pin configuration, array arrangement, and the like are easy, and uniform and accurate pits can be formed. Since a ball bump is formed in the pit, a highly accurate contact can be made with the device.

4. Since the pits and the ball bumps are electrically insulated by the oxide film, no leak occurs between the ball bumps. As a result, inspection with high electrical accuracy can be performed.

5. Since the ball bumps corresponding to the ball bump group of the prior art are repairable ball bumps, only the defective bumps need to be replaced and the cost is reduced.

6. Since a tester is not required, the floor space is the same as that of a conventional auto prober, and the equipment layout efficiency is improved.

7. According to the manufacturing method of the present invention , the probe card can be easily manufactured by a semiconductor process. Therefore, no advanced technology is required.

Next, the flop <br/> probe cards manufactured by the manufacturing method of the present invention, a second embodiment will be described with reference to FIG. In FIG. 3, in the circuit forming portion 2,
Except that the light emitting device 6 is formed, it is the same as the first embodiment described above. In this case, it can be easily formed by using GaAs for the semiconductor substrate 1 and using a semiconductor diffusion process. This light emitting device 6
Plays a role in marking a defective product when an electrical inspection of a semiconductor device is performed. When a defective product occurs, the light emitting device 6 emits light 7 to mark the defective product. By adopting such a structure, it is possible to clearly determine the acceptability. Other effects are the same as those of the first embodiment.

Next, the flop <br/> probe cards manufactured by the manufacturing method of the present invention, a third embodiment will be described with reference to FIG. First, the pit portion 16 and the ball bump 5 are formed on the lower surface of the semiconductor substrate 1. Next, the semiconductor substrate 1
A circuit pattern is formed by the conductor wiring 4 on the upper surface. A semiconductor chip 8 is connected to the conductor wiring 4 by a ball bump 9 to form an electric circuit for a tester. Finally, the lead wire 3 is attached. Note that some of the semiconductor chips 8 serve to change the standard of the tester, and the standard is changed by repair. With such a structure, an electronic circuit for a tester can be easily assembled. Therefore, the tester electronic circuit can be formed by the other semiconductor chip 8 before the tester device is completed, so that a short delivery time can be dealt with.
Other effects are the same as those of the first embodiment.

Next, the flop <br/> probe cards manufactured by the manufacturing method of the present invention will be described with reference to FIG. 5, a fourth embodiment. The light emitting device 6 is provided in place of the semiconductor chip in the structure described in the third embodiment, and the opening 10 is formed in the place immediately below the light emitting device 6 by the semiconductor substrate 1.
Formed by a laser, an etching method or the like. By adopting such a structure, a defective product can be marked with the light 7 emitted from the light emitting device 6, so that the quality can be clearly determined. Other effects are the same as those of the first and third embodiments.

Next , a fifth embodiment of the probe card manufactured by the manufacturing method of the present invention will be described with reference to FIG. An opening 10 is provided in the center of the semiconductor substrate 1 of the probe card shown in the first embodiment so that a defective product is marked by passing a light 7 such as a laser, a probe, or the like. It was done. Therefore, the quality judgment can be clearly left. Other effects are the same as those of the first embodiment.

Next , a sixth embodiment of the probe card manufactured by the manufacturing method of the present invention will be described with reference to FIG. This embodiment is basically a combination of the second embodiment and the third embodiment. On the upper surface of the semiconductor substrate 1, a standard changing device 11 is provided.
Only, the circuit forming section 2 and the light emitting device 6
Is formed. With such a structure, it is possible to flexibly cope with a change in the standard, and at the same time, it is possible to clearly determine the quality. Other effects are the same as those of the first embodiment.

FIG. 7B is a partially enlarged view of a portion A in FIG. 7A. FIG. 2 is a cross-sectional view of a connection structure for electrically connecting upper and lower conductor wirings 4 on the semiconductor substrate 1. The overall process flow is as shown in FIG. FIG.
In (b), a pit portion 16 is formed on the semiconductor substrate 1 on which the circuit forming portion 2 is formed. Next, through holes 17 are formed up to the upper surface of the semiconductor substrate 1 by laser or etching. After that, a metal oxide film 12 is formed and is insulated from the semiconductor substrate 1. Aluminum conductor wiring 4 is formed by sputtering, vapor deposition, or the like, and is patterned. Thereafter, a protective film 18 is formed except for the pits 16. A Ni layer 14-1 and a Au layer are formed thereon as a thin film conductor layer.
The layer 14-2 is formed by electrolytic or electroless plating. Finally, the ball bumps 5 are connected. The basic technology can be easily formed by a semiconductor diffusion process technology.

[0044]

[Embodiment] In the above embodiment, the protection film of the present probe card is described as being formed of a polyimide resin. However, other than this, for example, an organic resin such as an epoxy resin benzocyclobutene may be used. If so, various metal oxide films may be used.

The thin film conductor layer 14 is made of Cr—Cu—Au.
The conductor layer of Ti-Au or Ni
-Au may be a conductor layer.

In the above-described embodiment, a Pb-Sn-based material has been described as an example of the material of the ball bump 5, but Sn-A
g-based, Sn-Zn-based, Au-Sn-based, Au, or I
A brazing material containing n as a main component may be used.

[0047]

According to the probe card manufactured by the manufacturing method of the present invention, a pit is formed on a semiconductor substrate, and a repairable ball bump is formed on the pit to form a contact portion of a probe card. That the transmission path was formed on both upper and lower surfaces of the semiconductor substrate, that the semiconductor chip was mounted, that the semiconductor substrate was provided with an opening, that the light emitting device was built in, that the tester device was built in, etc.
The probe card of the present invention itself can be a tester. As a result, there is an effect that a large area becomes unnecessary and a huge investment becomes unnecessary.

Further, it is possible to flexibly cope with a change in the tester standard and to clarify a defect.

Furthermore, the size of the probe card itself can be greatly reduced, and the number of pins can be increased with high density and high accuracy.

The method for manufacturing a probe card according to the present invention
According to this, a probe card can be easily formed by a semiconductor diffusion process technique, and thus no advanced technique is required. Therefore, it can be manufactured at low cost. Although the description of the present invention is for one chip, it goes without saying that multi-chip support and wafer-to-wafer collective probing can be performed, and at the same time, electrical characteristic inspection can be performed.

Further, since the ball bump is used for the contact with the device to be inspected, the connection distance is short. As a result, an electrical test corresponding to high frequency and high speed can be performed. Therefore, inspection items that could not be measured unless assembled in a package in the past are also manufactured by the manufacturing method of the present invention.
This is made possible by a probe card.

[Brief description of the drawings]

FIG. 1 is a sectional view showing a structure of a probe card according to a first embodiment.

FIG. 2 is a sectional view showing a manufacturing process of the semiconductor device of FIG. 1;

FIG. 3 is a sectional view showing a structure of a probe card according to a second embodiment.

FIG. 4 is a sectional view showing a structure of a probe card according to a third embodiment.

FIG. 5 is a cross-sectional view illustrating a structure of a probe card according to a fourth embodiment.

FIG. 6 is a sectional view showing a structure of a probe card according to a fifth embodiment.

FIG. 7A is a cross-sectional view showing a structure of a probe card according to a sixth embodiment, and FIG. 7B is a partially enlarged cross-sectional view of a portion A in FIG.

8 (a), (b), (c), and (d) are views showing a process for manufacturing a conventional probe card.
(B) is a plan view showing a bump group on the wafer chip side, and (c) is a plan view showing a bump group on the tester side.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Semiconductor substrate 2 Circuit formation part 3 Leader 4 Conductor wiring 5, 9 Ball bump 6 Light emitting device 7 Light 8 Semiconductor chip 10 Opening 11 Standard change device 12 Metal oxide film 14 Thin film conductor layer 14-1 Ni layer 14-2 Au Layer 16 pit 17 through hole 18 protective film 19 contact hole

Front page continued (51) Int.Cl. ⁷ identifications FI H01L 21/92 604T 604H (56) References Patent Rights 6-43210 (JP, A) Patent Rights 5-121409 (JP, A) JP JP-A-5-167004 (JP, A) JP-A-63-20855 (JP, A) JP-A-62-296446 (JP, A) JP-A-2-23623 (JP, A) JP-A-3-214750 (JP) (A) JP-A-4-346242 (JP, A) (58) Fields investigated (Int. Cl. ⁷ , DB name) G01R 1/073 H01L 21/321 H01L 21/60 H01L 21/66

Claims (2)

(57) [Claims] A step of applying a resist to a semiconductor wafer, removing the resist in a portion where a pit is to be formed through an exposure and development step, and forming a concave pit portion on the semiconductor substrate by etching; a circuit forming portion and a device Forming a contact hole for electrical connection by covering the surface with a metal oxide layer, forming an aluminum conductor wiring on the metal oxide layer, and protecting a region other than the pit portion formation region. A step of forming a film, a step of forming a thin film conductor layer made of Ti-Cu, Ni-Au, or Cr-Cu-Au on the pit portion, and a heat treatment of the brazing material on the metallized pit portion. A method for manufacturing a probe card, comprising a step of forming a ball bump obtained by performing the method. 2. A formation of the ball bumps, the probe card manufacturing method according to claim 1, wherein the forming the pit portion by a heat treatment of plastic balls or conductive resin balls metal plated with the brazing material.