JP3227623B2 - Drive circuit for semiconductor switch - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a driving circuit for a semiconductor switch.

[0002]

2. Description of the Related Art In order to increase the response of a load such as a stepping motor, there is a demand for a high-speed on / off operation of a semiconductor switch for controlling a drive power supply supplied to the load. Particularly, in order to quickly stop a stepping motor or the like, it is required to turn off a semiconductor switch at a high speed. FIG. 9 shows a circuit for stopping the stepping motor at high speed.

A motor M as a load and a transistor Q1 as a semiconductor switch for driving the motor M are connected in series to the motor driving power source E. One end of the motor M is connected to the motor drive power source E, and the other end is connected to the collector of the transistor Q1. Transistor Q1
The output control circuit 1 is connected to the base of the device, and the emitter is grounded. A Zener diode ZD and a diode D as a protection circuit are connected in series between the base and collector of the transistor Q1. The diode D and the Zener diode ZD are selected such that the voltage Vca of the sum of the Zener voltage VZD, the diode forward voltage VD, and the base-emitter voltage VBE of the transistor Q1 is lower than the withstand voltage of the transistor Q1. Therefore, the diode D and the Zener diode ZD prevent the collector voltage Vc from rising and exceeding the withstand voltage of the transistor Q1 and being destroyed.

As shown in FIG. 10, in order to start the motor M, when the control signal VIN is set to a high potential voltage (hereinafter referred to as H level), a voltage is applied to the base of the transistor Q1 from the output control circuit 1 and the transistor Q1 is turned on. The current IM flows through the motor M, and the motor M rotates.

In order to stop the motor M, the control signal VIN
Is set to a low potential voltage (hereinafter referred to as L level), the output of the output control circuit 1 becomes L level, and the transistor Q1 is turned off. At this time, the energy stored in the motor M increases the collector voltage Vc of the transistor Q1.
When the collector voltage Vc exceeds the voltage Vca of the sum of the Zener voltage VZD, the diode forward voltage VD and the base-emitter voltage VBE of the transistor Q1, an avalanche current flows through the Zener diode ZD from the collector of the transistor Q1 toward the base. When a voltage is applied to the base of the transistor Q1 and the transistor Q1 is turned on, the energy of the motor M is consumed, and the collector voltage Vc decreases to become substantially equal to the voltage of the power source E, so that the current IM flowing to the motor M stops flowing and the motor M stops. .

[0006]

However, if the Zener diode ZD is damaged for some reason and short-circuited, the diode D is in the forward direction, so that the transistor Q
A base current flows through the base of the transistor 1 to turn on the transistor Q1. Therefore, the collector voltage V of the transistor Q1
c rises only up to the ON voltage Vcb of the transistor Q1, and the current IM flowing through the motor M continues to flow, so that the motor M cannot be controlled.

If the Zener diode ZD is damaged and opened for some reason, the back electromotive force generated by the energy of the motor M causes the collector voltage V.sub.
c exceeds the withstand voltage of the transistor Q1 and
Will be destroyed.

An object of the present invention is to provide a second semiconductor switch provided in a Zener diode even if a Zener diode short-circuits for some reason. It is an object of the present invention to provide a drive circuit for a semiconductor switch that can control a motor by turning off a second semiconductor switch based on a voltage between the switches.

In addition, even if the Zener diode is opened for some reason, the semiconductor switch is turned on based on the voltage between the semiconductor switch and the load caused by the open failure of the Zener diode by the open fault detection circuit. It is an object of the present invention to provide a semiconductor switch drive circuit capable of protecting a semiconductor switch by using the same.

[0010]

According to a first aspect of the present invention, there is provided a semiconductor switch for controlling power supply to a load connected to a load driving power supply, and a semiconductor switch for turning off the semiconductor switch. A Zener diode for turning on the semiconductor switch based on a rise in voltage between the semiconductor switch and a load, wherein a second semiconductor switch is provided in series with the Zener diode; A short fault detection circuit is provided for turning off a second semiconductor switch based on a voltage between the semiconductor switch and a load caused by a short fault of the Zener diode.

Further, according to the present invention, a semiconductor switch for controlling power supply to a load connected to a load driving power supply, and the semiconductor switch when the semiconductor switch is turned off from on. And a Zener diode for turning on the semiconductor switch based on a rise in voltage between the semiconductor switch and the load. And an open failure detection circuit for turning on the semiconductor switch based on the voltage of.

Further, according to the present invention, a semiconductor switch for controlling power supply to a load connected to a load driving power supply, and the semiconductor switch when the semiconductor switch is turned off from on. And a Zener diode for turning on the semiconductor switch based on a rise in voltage between the Zener diode and a load, wherein a second semiconductor switch is provided in series with the Zener diode, and the Zener diode is short-circuited. A short-circuit failure detection circuit for turning off a second semiconductor switch based on a voltage between the semiconductor switch and a load caused by the failure; and providing an open failure of the Zener diode or turning off of the second semiconductor switch. The semiconductor switch and the negative The open failure detection circuit for turning on the semiconductor switch based on the voltage between the provided.

[0013]

According to the first aspect of the present invention, even if the Zener diode is short-circuited for some reason, the second semiconductor switch provided on the Zener diode is short-circuited by the short-circuit failure detection circuit to generate a semiconductor caused by the short-circuit failure of the Zener diode. The motor can be controlled by turning off the second semiconductor switch based on the voltage between the switch and the load.

Further, according to the second aspect of the present invention, even if the Zener diode opens for any reason, the open fault detecting circuit reduces the voltage between the semiconductor switch and the load caused by the open fault of the Zener diode. The semiconductor switch can be protected by turning on the semiconductor switch based on the signal.

According to the third aspect of the present invention, even if the Zener diode short-circuits for some reason, the second semiconductor switch provided in series with the Zener diode is caused by the short-circuit failure of the Zener diode by the short-circuit failure detection circuit. The second semiconductor switch can be turned off to control the motor based on the voltage between the semiconductor switch and the load that is generated as a result. Further, the semiconductor switch is opened by the open failure detection circuit based on a voltage between the semiconductor switch and the load, which is generated when the Zener diode is opened for some reason or when the second semiconductor switch is turned off. By turning on, the semiconductor switch can be protected.

[0016]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A first embodiment of the present invention will be described below with reference to FIGS. As shown in FIG. 1, a motor M as a load and a transistor Q1 as a semiconductor switch for controlling power supply of the motor M are connected in series to a motor drive power supply E as a load drive power supply.
One end of the motor M is connected to the motor drive power source E, and the other end is connected to the collector of the transistor Q1. An output control circuit 1 for controlling on / off of the transistor Q1 is connected to a base of the transistor Q1. The output control circuit 1 receives a control signal VIN from a control device (not shown) via a terminal 2.

Therefore, when the control signal VIN is at the H level, the H level is applied from the output control circuit 1 to the base of the transistor Q1, that is, the transistor Q1 is turned on.
Is turned on, and the motor M rotates. Also, the control signal VIN
Is at L level, the output control circuit 1 does not apply L level, that is, the base voltage is not applied to the transistor Q1, the transistor Q1 is turned off, and the motor M stops.

A Zener diode ZD and a diode D are connected in series between the collector and the base of the transistor Q1. The cathode side of the Zener diode ZD is connected to the collector of the transistor Q1, and the anode side is connected to the anode side of the diode D. Diode D
A second transistor Q2 as a second semiconductor switch is connected between the transistor Q1 and the base of the transistor Q1. The collector of the second transistor Q2 is a diode D
And the emitter is connected to the transistor Q1.
Connected to the base. The diode V, the Zener diode ZD and the second transistor Q2 have a voltage Vcc which is the sum of the Zener voltage VZD, the diode forward voltage VD, the ON voltage VON of the second transistor Q2 and the base-emitter voltage VBE of the transistor Q1. It is selected to be lower than the withstand voltage of Q1. Therefore, the diode D, the Zener diode ZD, and the second transistor Q2 prevent the collector voltage Vc from rising and exceeding the breakdown voltage of the transistor Q1, thereby preventing breakdown.

A voltage dividing circuit is connected to the collector of the transistor Q1. The voltage dividing circuit includes resistors 3 and 4. One end of the resistor 3 is connected to the collector of the transistor Q1, and the other end is connected to the resistor 4. From the middle point between the resistors 3 and 4, the divided output Vc of the collector voltage Vc of the transistor Q1 is obtained by a predetermined voltage dividing ratio determined by the values of the resistors 3 and 4.
2 is obtained. The divided voltage output Vc2 is output to the short-circuit failure detection circuit 5 and the open-circuit failure detection circuit 6.

The short fault detection circuit 5 includes a first comparator 7, a first reference power source E1, a logic circuit 8, and a latch circuit 9. The divided output Vc2 is input to the inverting input terminal of the first comparator 7, the first reference power supply E1 is connected to the non-inverting input terminal, and the first reference voltage Vre.
f1 has been input. The first reference voltage Vref1 is equal to the motor drive power supply E
, That is, a voltage lower than the divided output Vc2a output from the voltage dividing circuit when the motor M is stopped. Also, the first reference voltage Vr
ef1 is set to a voltage higher than the divided output Vc2b output from the voltage dividing circuit based on the collector voltage Vc when the Zener diode ZD is short-circuited, the base current is applied to the base of the transistor Q1, and the transistor Q1 is turned on. I have.

When the divided output Vc2 is lower than the reference voltage Vref1, the first comparator 7 outputs the output Vo1.
Becomes H level, and the divided output Vc2 becomes the reference voltage Vref.
When it is higher than 1, the output Vo1 becomes L level.

The output terminal of the first comparator 7 is connected to the positive input terminal of the logic circuit 8. The control signal VIN is input to the negative input terminal of the logic circuit 8, and the output terminal is connected to the input terminal of the latch circuit 9. Therefore, the output Va of the logic circuit 8 goes high when the output Vo1 is high and the control signal VIN is low. Also, output V
When o1 is at the L level, the output Va of the logic circuit 8 is at the L level regardless of the level of the control signal VIN.

The output terminal of the latch circuit 9 is connected to the base of the second transistor Q2. Latch circuit 9
Output Vr normally outputs an H level, goes to an L level when the output Va of the logic circuit 8 rises from an L level to an H level, and holds the L level until the power of the entire circuit (not shown) is turned off.

The output terminal of the latch circuit 9 is connected to the input terminal of the buffer circuit 10. An output terminal of the buffer circuit 10 is connected to an external connection terminal 11 for connecting an abnormality display device (not shown).

The open fault detecting circuit 6 comprises a second comparator 12 and a second reference power source E2.
The non-inverting input terminal of the second comparator 12 receives the divided output Vc2 of the voltage dividing circuit. The inverting input terminal of the second comparator 12 is connected to the positive terminal of the second reference power supply E2, and receives the second reference voltage Vref2. The second reference voltage Vref2 is set to a voltage higher than the voltage Vc2c output from the voltage dividing circuit based on the collector voltage Vcc when the collector voltage Vc of the transistor Q1 rises and the avalanche current flows through the Zener diode ZD. I have. Also, the second reference voltage Vref2
Is a voltage applied to the collector of the transistor Q1 when the transistor Q1 is broken and opened, and is set to a voltage lower than the withstand voltage between the collector and the emitter of the transistor Q1.

The output V of the second comparator 12
o2 becomes L level when the divided output Vc2 is lower than the reference voltage Vref2, and the divided output Vc2 becomes the reference voltage Vre2.
When it is higher than f2, it becomes H level.

The output Vo2 of the second comparator 12 is connected to the output control circuit 1. The output control circuit 1 controls the control signal VIN and the output Vo2 of the second comparator 12
Turns on the transistor Q1 when one of them is at the H level.

Next, the operation of the semiconductor switch driving circuit thus configured will be described with reference to the time chart of FIG. When rotating the motor M, the control signal VIN becomes H level, and turns on the transistor Q1 via the output control circuit 1. The current IM flows through the motor M based on the turning on of the transistor Q1, and the motor M rotates. Then, the collector potential of the transistor Q1 becomes a potential close to 0 volt. Accordingly, the divided output Vc2 also has a potential close to 0 volt and is lower than the first reference voltage Vref1, so that the output Vo1 of the first comparator 7 goes high. Also, the output Va of the logic circuit 8 is the control signal VIN and the first signal.
Since the level of the output Vo1 of the comparator 7 is the same, the level becomes L level. Therefore, the output of the latch circuit 9 is H
Level, and the second transistor Q2 is on.

At this time, the output Vo2 of the second comparator 12 becomes L level because the divided output Vc2 applied to the non-inverting input terminal is lower than the second reference voltage Vref2. Next, an operation when the motor M stops when the Zener diode ZD is in a normal state will be described.

In order to stop the rotating motor M, the control signal VIN is set to L level, the base voltage is not applied to the transistor Q1 output from the output control circuit 1, and the transistor Q1 is turned off. At this time, a back electromotive force is generated by the energy stored in the motor M, and the collector voltage Vc of the transistor Q1 rises to a voltage Vcc at which an avalanche current flows through the Zener diode ZD. The current flowing in the reverse direction of the Zener diode ZD flows through the diode D and the second transistor Q2 to the base of the transistor Q1.

At this time, the output V of the first comparator 7
o1 indicates that the voltage of the divided output Vc2 is equal to the first reference voltage Vref
Since it is higher than 1, the level becomes L level. When the output Vo1 of the first comparator 7 is at the L level, the output Va of the logic circuit 8 is at the L level regardless of the control signal VIN. Therefore, the output Va of the logic circuit 8 becomes L level,
Since the output Vr of the latch circuit 9 holds the H level, the second transistor Q2 holds the ON state.

Accordingly, a base voltage is applied to the transistor Q1, and the transistor Q1 is turned on. The energy of the motor M is consumed through the transistor Q1, and the collector voltage Vc becomes substantially equal to the voltage of the motor driving power supply E,
The current IM flowing through the motor M becomes zero, and the motor M stops. When the collector voltage Vc of the transistor Q1 becomes lower than the voltage Vcc at which the avalanche current flows through the Zener diode ZD, the current flowing in the reverse direction through the Zener diode ZD becomes zero. Therefore, transistor Q
The base current stops flowing to the base of the transistor 1 and the transistor Q
1 is off. At this time, the output Vo2 of the second comparator 12 is such that the divided output Vc2 is the second reference voltage Vref2.
, And remains at the L level.

Next, the operation in a state where the Zener diode ZD is damaged for some reason and short-circuited will be described. The control signal VIN is set to L level to stop the rotating motor M, and the base voltage is not applied to the transistor Q1 output from the output control circuit 1, so that the transistor Q1 is turned off. A counter electromotive force is generated by the energy stored in the motor M, and the transistor Q
1 is about to rise to a voltage Vcc at which an avalanche current flows through the Zener diode ZD. However, since the Zener diode ZD is short-circuited and the transistor Q1 is kept on, the collector voltage Vc rises only to the on-voltage Vcb of the first transistor Q1. Accordingly, the output Vo1 of the first comparator 7 is such that the voltage of the divided output Vc2 is equal to the first reference voltage Vr.
Since it is lower than ef1, the H level is maintained.

Therefore, the control signal VIN changes from H level to L level.
Level and the output Vo1 of the first comparator 7
Is maintained at the H level, the output Va of the logic circuit 8 changes from the L level to the H level. The output Vr of the latch circuit 9 latches the rising edge of the output Va of the logic circuit 8 and goes to L level to turn off the second transistor Q2 and Zener the buffer circuit 10 to the abnormality display device connected from the external output terminal 11 to the outside. The short circuit of the diode ZD is reported.

The base voltage is not applied to the transistor Q1, the transistor Q1 is turned off, and the collector voltage Vc
Rises above the first reference voltage Vref1. Therefore,
The output Vo1 of the first comparator 7 becomes L level,
The output Va of the logic circuit 8 becomes L level irrespective of the control signal VIN. The output Vr of the latch circuit 9 keeps the L level because the level changes at the rise of the output Va of the logic circuit 8. The output Vr of the latch circuit 9 is held at the L level until the power of the entire circuit is turned off.

When the transistor Q1 is turned off, the collector voltage Vc rises, and when the divided output Vc2 exceeds the second reference voltage Vref2, the output Vo2 of the second comparator 12 goes high. The output Vo2 is input to the output control circuit 1 and forcibly turns on the first transistor Q1 even though the control signal VIN is at the L level. Therefore, the energy stored in the motor M is consumed, and the collector voltage Vc decreases to become substantially equal to the voltage of the motor drive power supply E. Then, the output V of the second comparator 12
O2 becomes L level, transistor Q1 is turned off, and motor M stops.

In the subsequent stop of the motor M, since the second transistor Q2 is kept off, the transistor Q1
Collector voltage Vc rises. However, the transistor Q1 can be controlled by the open failure detection circuit 6 regardless of the short failure detection circuit 5, and the energy of the motor M can be consumed.

Next, the operation when the Zener diode ZD is damaged for some reason and is open will be described. The control signal VIN goes low to stop the rotating motor M, and the transistor Q1 is turned off via the output control circuit 1. Back electromotive force is generated by the energy stored in the motor M, and the collector voltage Vc of the transistor Q1 rises. At this time, since the Zener diode ZD is open, it exceeds the voltage Vcc at which the avalanche current flows through the Zener diode ZD. Therefore, the output V of the first comparator 7
o1 indicates that the voltage of the divided output Vc2 is equal to the first reference voltage Vref
It becomes higher than 1 and becomes L level.

The output Va of the logic circuit 8 holds the L level because the control signal VIN is at the L level and the output Vo1 of the first comparator 7 is at the L level. The output Vr of the latch circuit 9 keeps the H level because the output Va of the logic circuit 8 does not change, and the second transistor Q2 remains on.

When the transistor Q1 is turned off, the collector voltage Vc increases, and when the divided output Vc2 exceeds the second reference voltage Vref2, the output Vc of the second comparator 12 becomes higher.
o2 becomes H level. The output Vo2 is output control circuit 1
To forcibly turn on the first transistor Q1 regardless of the control signal VIN. Therefore, the energy stored in the motor M is consumed, and the collector voltage Vc decreases to become substantially equal to the voltage of the motor drive power supply E. And
The output Vo2 of the second comparator 12 becomes L level, the transistor Q1 is turned off, and the motor M stops.

Thereafter, when the control signal VIN is set to the L level to stop the motor M, the collector voltage Vc of the transistor Q1 rises because the Zener diode ZD is open. However, regardless of the short-circuit failure detection circuit 5, the open-circuit failure detection circuit 6
Is controlled so that the energy of the motor M can be consumed.

As described above, in the drive circuit of the semiconductor switch of this embodiment, even if the Zener diode ZD is short-circuited for some reason, the short-circuit failure detection circuit 5 turns off the second transistor Q2 based on the collector voltage of the transistor Q1. To As a result, the Zener diode Z
The motor M can be controlled by turning off the transistor Q1 by stopping the base current flowing from the collector to the base of the transistor Q1 via D. Further, even if the second transistor Q2 is kept off or the Zener diode ZD is opened for some reason, the open failure detecting circuit 6 controls the transistor Q1 on / off based on the collector voltage of the transistor Q1. The transistor Q1 can be reliably turned on and off without being destroyed.

Next, a second embodiment will be described with reference to FIGS. The description of the same configuration as that of the first embodiment will be omitted by using the reference numerals of the first embodiment, and a new configuration will be described.

A first delay circuit 13 and a third comparator 14 are connected in series between the logic circuit 8 and the latch circuit 9. The first delay circuit 13 includes a resistor 15 and a capacitor 1
6 is an integrating circuit. One end of the resistor 15 receives the output Va of the logic circuit 8, and the other end is connected to the capacitor 16. From the middle point between the resistor 15 and the capacitor 16, an output Va1 gradually increasing / decreasing according to a time constant determined by the values of the resistor 15 and the capacitor 16 is output to the third comparator 14.

The output Va1 is input to the non-inverting input terminal of the third comparator 14, and the third output is input to the inverting input terminal.
Is connected. The output Va1 of the reference voltage Vref3 of the reference power source E3 is
, And exceeds the third reference voltage Vref3 connected to the third comparator 14 until the output Vo3 of the third comparator 14 becomes the H level, that is, the delay time t1. Is set to

The output terminal of the second delay circuit 17 is connected between the first delay circuit 13 and the third comparator 14. The second delay circuit 17 includes a delay circuit section 18, a two-input NOR circuit 19, and an open-collector output inversion circuit 20.
It is composed of One end of the delay circuit section 18 is connected to the control signal V
IN is input via the input terminal 2, and the output Vb at the other end is connected to one input of the NOR circuit 19. The delay circuit section 18 delays the fall of the control signal VIN by a predetermined time (delay time) t2 and outputs a signal obtained by inverting the control signal VIN to the NOR circuit 19.

The other of the inputs of the NOR circuit 19 is a control signal VI.
N is directly input. The NOR circuit 19 changes its output to the H level when the input control signal VIN and the output Vb of the second delay circuit 17 are simultaneously at the L level. Therefore, the output of the NOR circuit 19 changes from the L level to the H level immediately when the control signal VIN changes from the H level to the L level, and changes from the H level to the L level after a lapse of a predetermined delay time t2.

The output of the NOR circuit 19 is input to the inverting circuit 20. Therefore, the output Vb1 of the inverting circuit 20 changes from the H level to the L level when the control signal VIN changes from the H level to the L level, and changes to the H level after the elapse of the delay time t2. The inverting circuit 20 is connected to a non-inverting input terminal of the third comparator 14.

Next, the operation of the motor driving device thus configured will be described with reference to time charts of FIGS. When the control signal VIN is at the H level, the transistor Q1 is turned on and the motor M is rotating. Therefore, the collector voltage Vc of the transistor Q1 becomes a potential close to 0 volt. Further, the divided output Vc2 of the collector voltage Vc of the transistor Q1 also has a potential close to 0 volt. Therefore,
The output Vo1 of the first comparator 7 goes high because the divided output Vc2 applied to the non-inverting input terminal is lower than the first reference voltage Vref1.

At this time, the output Va of the logic circuit 8 is the output Vo1 of the first comparator when the control signal VIN is at the H level.
Is at the H level, so it is at the L level. The output Va1 of the first delay circuit 13 goes low because the output Va of the logic circuit 8 is low. Also, the second delay circuit 17
Output Vb1 because the control signal VIN is at the H level,
It becomes H level. However, the output V of the second delay circuit 17
Since b1, that is, the output Vb1 of the inverting circuit 20 is an open collector output and the output Va1 of the first delay circuit 13 is at the L level, the output Va1 is at the L level instead of the H level.

Since the input of the non-inverting input terminal of the third comparator 14 is at L level and lower than the third reference voltage Vref3, the output Vo3 is at L level. As a result, the output of the latch circuit 9 becomes H level, and the second transistor Q2 is turned on.

At this time, the output Vo2 of the second comparator 12 is obtained by dividing the divided output Vc2 by the second reference voltage Vref2.
Therefore, the level becomes L level. As shown in FIG. 4, when the control signal VIN changes from H level to L level, the transistor Q1 is turned off via the output control circuit 1. Then, the collector voltage Vc of the transistor Q1 rises to a voltage Vcc at which an avalanche current flows through the Zener diode ZD. At this time, the divided output Vc2 also rises and exceeds the first reference voltage Vref1, so that the output Vo1 of the first comparator 7 changes from H level to L level.

Since the control signal VIN is at the L level and the output Vo1 of the first comparator 7 is at the L level, the output Va of the logic circuit 8 is maintained at the L level. Therefore, the first
The output Va1 of the delay circuit 13 remains at the L level.
On the other hand, the output Vb1 of the second delay circuit 17 changes from the H level to the L level, and changes to the H level after the elapse of the delay time t2. The output of the non-inverting input terminal of the third comparator 14 receives the output Va1 of the first delay circuit 13 and the output Vb1 of the second delay circuit 17.

Therefore, the output V of the third comparator 14
o3 indicates that the input of the non-inverting input terminal is the third reference voltage Vref
Since it is lower than 3, the L level is maintained. As a result, the output Vr of the latch circuit 9 is kept at the H level, and the second transistor Q2 is kept on.

By the way, as shown in FIG. 5A, the back electromotive force of the motor M may cause the collector voltage Vc of the transistor Q1 to rise and then decrease to near 0 volt. At this time, the output Vo1 of the first comparator 7 once becomes L level and then becomes H level again by the divided output Vc2 of the voltage dividing circuit of the collector voltage Vc of the transistor Q1. As a result, the output Va of the logic circuit 8 changes from the L level to the H level, and the output Vr of the latch circuit 9 changes from the H level to the L level, so that the second transistor Q2 is turned off.

However, according to the first delay circuit 13, as shown in the time chart of FIG. 5B, the output Va1 of the first delay circuit 13 changes the output Va of the logic circuit 8 from L level to H level. Then, it increases from the L level according to the time constant of the first delay circuit 13. However, the output Va of the logic circuit 8 goes low again. This is before the delay time t1 has elapsed.

Therefore, since the input of the non-inverting input terminal of the third comparator 14 does not exceed the third reference voltage Vref3, the output Vo3 of the third comparator 14 is kept at the L level. As a result, the output Vr of the latch circuit 9 becomes H
The level is maintained at the level, and the second transistor Q2 is maintained in the ON state. Accordingly, the control signal VIN is changed from the H level to the L level, and the first control signal VIN is not changed until the delay time t1 has elapsed.
The noise mixed into the output Vo1 of the comparator 7 is the first
The second transistor Q2 is not accidentally turned off by the delay circuit 13.

Further, even if the control signal VIN becomes L level and the base voltage is not applied to the transistor Q1, the transistor Q1 may not be turned off immediately due to the residual voltage remaining at the base of the transistor Q1. That is, as shown in FIG. 6A, the output V of the first comparator 7 is
o1 does not change from H level to L level until the residual voltage remaining at the base of the transistor Q1 decreases and the transistor Q1 is turned off.

Then, since the control signal VIN is at L level and the output Vo1 of the first comparator 7 is at H level, the output Va is at H level. If the output Va is directly input to the latch circuit 9, the rising of the output Va is latched and the second transistor Q2 is turned off. That is, although the Zener diode ZD is normal, it is erroneously determined that the Zener diode ZD is short-circuited, and the second transistor Q2 is turned off.

However, as shown in the time chart of FIG. 6B, the output Vb1 of the second delay circuit 17 is delayed by the second delay circuit 17 for a delay time t2 after the control signal VIN becomes L level. During the L level. Therefore, the non-inverted signal input of the third comparator 14 becomes L level during the elapse of the delay time t2 due to the output Vb1 of the second delay circuit 17, and does not exceed the third reference voltage Vref3. As a result, the output Vo3 of the third comparator 14
Is held at the L level, and the output Vr of the latch circuit 9 does not go to the L level.

That is, the output Va of the logic circuit 8 is the control signal V
Delay time t after IN is inverted from H level to L level
The second transistor Q2 cannot be turned off unless the H level is maintained until after two lapses. Therefore,
The control signal VIN is changed from the H level to the L level, and the noise mixed into the output Vo1 of the first comparator 7 before the delay time t2 elapses is changed by the second delay circuit 17.
The second transistor Q2 is not accidentally turned off.

Further, even if the control signal VIN becomes L level and the base voltage is not applied to the transistor Q1,
As shown in FIG. 7A, the transistor Q1 has a delay time t1 due to a residual voltage remaining at the base of the transistor Q1.
May not be turned off for longer. In this case,
Similarly, the delay time t2 may be longer than this as shown in FIG. Accordingly, the output Vo3 of the third comparator 14 changes from the L level to the H level, and the output Vr of the latch circuit 9 changes from the H level to the L level, so that the second transistor Q2 is turned off.

In such a case, the first delay circuit 13
7C, the output Vo1 of the first comparator 7 is at the H level even after the control signal VIN goes to the L level as shown in the time chart of FIG. Output Va goes high. First
The output Va1 of the delay circuit 13 of FIG. 1 is about to increase from the L level due to the time constant of the first delay circuit 13. At this time, since the output Vb1 of the second delay circuit 17 is applied at the L level, the input of the non-inverting input terminal of the third comparator 14 is at the L level for the delay time t2.

After the elapse of the delay time t2, the output V
Since a is at the H level, the output Va1 of the first delay circuit 13 is
Increases with the time constant. If the output Va of the logic circuit 8 becomes L level before the delay time t1 has elapsed, the input of the non-inverting input terminal of the third comparator 14 does not exceed the third reference voltage Vref3, so that the output Vo3 of the third comparator 14 is obtained. Is held at the L level. As a result, the output Vr of the latch circuit 9 is held at the H level, and the ON state of the second transistor Q2 is held.

Therefore, the first delay circuit 13 and the second delay circuit 17 cause the second transistor Q2 to be turned on by noise or the like mixed into the output Vo1 of the first comparator 7 between the delay times t1 and t2. An erroneous determination that is turned off can be prevented.

As described above, in the semiconductor switch driving circuit of the present embodiment, the output Va of the logic circuit 8 becomes the L level for the predetermined delay times t1 and t2.
And a second delay circuit 17. As a result, it is possible to prevent the second transistor Q2 from being turned off by erroneously determining that the Zener diode ZD is short-circuited by noise generated when the motor M is turned off.
The transistor Q when the Zener diode is normal
It is possible to prevent the second transistor Q2 from being turned off due to an erroneous determination due to the off delay of 1.

The present invention is not limited to the above embodiment, and may be made as follows without departing from the spirit of the present invention. (1) In the above embodiment, the buffer circuit 10 and the external terminal 11 for notifying an abnormality when the Zener diode ZD is short-circuited are provided only in the short-circuit fault detection circuit 5, but are provided in the open fault detection circuit 6, An abnormality when the zener diode ZD is opened may be notified to the outside.

(2) In the above embodiment, the first delay circuit 13
And the second delay circuit 17 are provided at the same time, but only one of the first delay circuit 13 and the second delay circuit 17 may be provided.

(3) In the above embodiment, the first transistor Q1 is controlled to be turned on / off by the output Vo2 of the open fault detection circuit 6. However, as shown in FIG. 8, the collector and base of the first transistor Q1 are controlled. A third transistor Q3 may be provided therebetween so that the third transistor Q3 is turned on by the output Vo2 of the open failure detection circuit 6 when the zener diode ZD is opened.

[0070]

As described in detail above, according to the semiconductor switch driving circuit of the first aspect of the present invention, the second semiconductor switch provided in series with the Zener diode even if the Zener diode shorts for some reason. The short-circuit failure detection circuit has an excellent effect that the motor can be controlled by turning off the second semiconductor switch based on the voltage between the semiconductor switch and the load caused by the short-circuit failure of the Zener diode. Play.

Further, according to the semiconductor switch driving circuit of the present invention, even if the Zener diode opens for any reason, the semiconductor switch generated by the open failure of the Zener diode by the open failure detection circuit. There is an excellent effect that the semiconductor switch can be protected by turning on the semiconductor switch based on the voltage between the semiconductor switch and the load.

[Brief description of the drawings]

FIG. 1 is a circuit diagram showing a first embodiment of the present invention.

FIG. 2 is a time chart showing the operation of the first embodiment of the present invention.

FIG. 3 is a circuit diagram showing a second embodiment of the present invention.

FIG. 4 is a time chart showing the operation of the second embodiment of the present invention.

FIG. 5 is a time chart showing an operation of a first delay circuit 13 of the second embodiment.

FIG. 6 is a time chart showing an operation of a second delay circuit 17 of the second embodiment.

FIG. 7 is a time chart showing the operation of the delay circuits 13 and 17 of the second embodiment.

FIG. 8 is a diagram illustrating another example of a drive circuit.

FIG. 9 is a diagram showing a conventional driving circuit.

FIG. 10 is a time chart of a conventional driving circuit.

[Explanation of symbols]

Q1: a transistor as a semiconductor switch; Q2, a transistor as a second semiconductor switch; ZD, a zener diode; E, a motor drive power supply as a load drive power supply; M, a motor as a load; VIN, a control signal;
DESCRIPTION OF SYMBOLS 1 ... Output control circuit, 3,4 ... Division resistance, 5 ... Short fault detection circuit, 6 ... Open fault detection circuit

────────────────────────────────────────────────── ─── Continuation of the front page (56) References JP-A-2-13115 (JP, A) JP-A-3-234115 (JP, A) JP-A-3-40517 (JP, A) JP-A-4- 317216 (JP, A) JP-A-1-295520 (JP, A) JP-A-4-31831 (JP, U) (58) Fields investigated (Int. Cl. ⁷ , DB name) H03K 17/00-17 / 70

Claims (3)

(57) [Claims] 1. A semiconductor switch for controlling power supply to a load connected to a load driving power supply, and a voltage between the semiconductor switch and the load increases when the semiconductor switch is turned off from on. A second semiconductor switch is provided in series with the Zener diode in a semiconductor switch drive circuit comprising a Zener diode for turning on the semiconductor switch based on the semiconductor switch and a load caused by a short-circuit failure of the Zener diode. And a short-circuit failure detection circuit for turning off the second semiconductor switch based on a voltage between the two. 2. A semiconductor switch for controlling power supply to a load connected to a power supply for driving a load, and a switch between the semiconductor switch and the load when the semiconductor switch is turned off from on. A semiconductor switch drive circuit comprising a Zener diode for turning on the semiconductor switch based on the semiconductor switch based on a voltage between the semiconductor switch and a load caused by an open failure of the Zener diode. A drive circuit for a semiconductor switch, comprising an open failure detection circuit. 3. A semiconductor switch for controlling power supply to a load connected to a power supply for driving a load, and a switch between the semiconductor switch and the load when the semiconductor switch is turned off from on. A second semiconductor switch is provided in series with the Zener diode in a semiconductor switch drive circuit comprising a Zener diode for turning on the semiconductor switch based on the semiconductor switch and a load caused by a short-circuit failure of the Zener diode. And a short-circuit failure detection circuit for turning off the second semiconductor switch based on the voltage between the second semiconductor switch and the open circuit of the Zener diode or at least one of the off-state of the second semiconductor switch. The semiconductor switch is based on a voltage between the semiconductor switch and a load. Drive circuit of a semiconductor switch provided to open failure detection circuit for turning on the.