JP3222118B2 - Mask pattern forming method - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a lithography technique for transferring a pattern on a mask onto a wafer, and more particularly to an extreme ultraviolet (hereinafter, referred to as EUV) having a wavelength of about 10 nm to 15 nm.
The present invention relates to a reflection type mask used in EUV lithography for exposing by exposing a mask pattern onto a wafer by using a light source as a light source, a mask pattern forming method thereof, and an exposure apparatus using the same.

[0002]

2. Description of the Related Art As semiconductor devices become more highly integrated, 100
There is an urgent need to establish a new process technology that enables ultra-fine processing of sub-nm. Even in lithography technology, in order to improve the optical resolution by shortening the wavelength of the light source,
EUV lithography has been vigorously developed to enable high resolution using EUV as a light source whose wavelength is shorter than the conventional mercury lamp or excimer laser by one order of magnitude from 10 to 15 nm, which is about 10 to 15 nm. I have.

[0003] EUV has a very high absorption for substances, and the refractive index of substances for EUV is almost equal to the value of vacuum. Therefore, the optical system of EUV lithography includes the Journal of the Japan Society of Precision Engineering, Vol. 64, No. 2, pp. 282-28.
As described on page 6 (1998), a reflection optical system combining a convex mirror and a concave mirror is used. In the case of a transmission type mask such as an optical reticle, a reflection type mask is used because EUV intensity is significantly reduced by absorption.

FIG. 1 shows a conceptual diagram of a sectional structure of a reflection type mask. In order to obtain a high reflectance with respect to EUV incident almost perpendicularly to the mask substrate surface, a reflection type mask basically comprises a stack of two or more types of material layers having a pair of refractive indexes that are significantly different at the exposure wavelength. The multilayer film 2 that is repeatedly laminated for about 30 to 40 cycles is coated. Further, the mask pattern 3 is made of a metal thin film processed into a pattern, absorbs EUV and becomes a non-reflection portion, so that exposure contrast is generated. Currently,
A multilayer film 2 coated on a base substrate 1 serving as a base material has a basic period of a molybdenum (Mo) layer and a silicon (S) layer.
i) Layers composed of layers are widely used, and a layer having a wavelength of 1
A maximum reflectance of about 70% is obtained for EUV near 3.5 nm.

On the other hand, in a reflective mask of EUV lithography, about 30% of exposure energy is absorbed by a base substrate and converted into heat. Therefore, when a material having a relatively high coefficient of thermal expansion, such as Si, is used for the base substrate, there is a concern that the base substrate may be deformed due to thermal expansion or the mask pattern arrangement accuracy may be reduced. For this reason, SPIE, vol. 3676, pp. 598 to 605 (1999)
Recently, as described in [SPIE, Vol. 3676, 598 (1999)], a material such as quartz glass or low thermal expansion glass having a coefficient of thermal expansion one or two orders of magnitude smaller than that of Si has been used as a base. The above-mentioned problem has been solved using a substrate.

[0006]

FIG. 2 is a conceptual diagram showing a manufacturing process of a reflective mask for EUV lithography. First,
The multilayer film 2 is coated on the base substrate 1 by sputtering, and the mask pattern metal thin film 4 is deposited on the multilayer film 2 by sputtering. Next, a resist is applied on the metal thin film 4 for a mask pattern, and a desired resist pattern 5 is formed by exposure and development by scanning with an electron beam or a laser beam. Next, plasma dry etching is performed using the resist pattern 5 as a mask, and the resist pattern 5 is removed to form a mask pattern 3.

In the above-mentioned reflection type mask manufacturing process, semiconductor dry etching technology, industrial book, pp. 332 to 3 are used as a means for preventing fluctuation of the mask pattern line width after plasma dry etching of the resist pattern.
Plasma as described on page 36 (1992).
It is effective to cool the base substrate through the stage of the etching equipment during dry etching and adsorb the reaction product of the mask pattern material and the etching gas on the mask substrate surface to prevent the etching progress toward the mask pattern side wall. It is known that However, an undersubstrate with a low coefficient of thermal expansion generally has low thermal conductivity, and it is possible to cool the undersubstrate and adsorb the reaction products on the surface of the mask substrate to prevent fluctuations in the mask pattern line width after plasma dry etching. It was extremely difficult.

For the above reasons, an object of the present invention is to form a mask pattern with high dimensional accuracy by preventing a fluctuation in the line width of a mask pattern after dry etching of a resist pattern, particularly, plasma dry etching. . Further, the present invention provides an exposure apparatus equipped with a mask produced by the above-described mask pattern forming method.

[0009]

In order to solve the above-mentioned problems, a mask pattern forming method according to the present invention employs a reflection pattern of EUV lithography using a base substrate mainly made of a glass material having a low coefficient of thermal expansion and a low thermal conductivity. In the manufacturing process of the mold mask, the mask pattern material on the base substrate coated with the multilayer film, and the reaction gas used when processing the mask pattern material by dry etching, at least one of those reaction products during dry etching. However, they are characterized in that they are combined so as to become a solid phase at room temperature or at a substrate temperature raised during dry etching.

As a result, even when an undersubstrate which is difficult to cool is used, the reaction product is adsorbed to the substrate and the side wall of the mask pattern is protected. Variations in mask pattern line width after plasma dry etching can be prevented, and a mask pattern with high dimensional accuracy can be formed.

Further, according to the mask pattern forming method of the present invention, VUV (Vacuum Ultra) using a base substrate made of a glass material having a low coefficient of thermal expansion and a low thermal conductivity.
In the process of manufacturing a transmission type mask of violet) lithography, the reaction product is adsorbed on the substrate and the mask pattern is protected, so that it is possible to prevent the fluctuation of the mask pattern line width after dry etching. According to the configuration, the wavelength of the ultraviolet light is 10 nanometers (n) as described above.
m) to provide a mask pattern with high dimensional accuracy in EUV lithography with a wavelength of around 15 nanometers or VUV lithography with a wavelength of around 100 nanometers to 200 nanometers. An exposure apparatus for projecting and exposing the obtained mask reflected light or mask transmitted light onto a wafer via an optical system, and further enables the manufacture of a semiconductor element with high dimensional accuracy using the same.

[0012]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS One embodiment of the present invention will be described below with reference to FIGS. Table 1 shows the CRC Handbook of Chemistry and Physics, pages D-194 to D-197 (1989).
Year) [CRC Handbook of Chemistry and Physics, D-
194 to D-197 (1989)], aluminum (A) which is a mask pattern material of a reflective mask is used.
l) Saturated vapor pressure (mmHg) and temperature (K) of reaction products generated when plasma dry etching of chromium (Cr), tantalum (Ta), and tungsten (W) using fluorine or chlorine-based etching gas This shows the relationship.

[0013]

[Table 1]

FIG. 3 is a characteristic diagram showing the relationship between the saturated vapor pressure (mmHg) and the temperature (K) for each reaction product in Table 1 on a graph.

In FIG. 2, the base substrate 1 has a thermal conductivity of Si.
A quartz glass or a low thermal expansion glass of 1/50 or less of that of the multilayer film, a multilayer film composed of a multilayer film 2 having a basic cycle of a Mo layer and a Si layer, a cycle of 6.9 nm, and repeatedly coated 40 times, a mask pattern W having a thickness of 100 nm for the metal thin film 4 for use and a line width of 250 for the resist pattern 5
and a thickness of 300 nm, and a frequency of 2.4 using sulfur hexafluoride (SF ₆ ) as an etching gas, respectively.
S excited by microwave of 5 gigahertz (GHz)
As a result of performing plasma dry etching with active species from F ₆ gas, cooling from the stage on which the mask substrate was mounted could not be efficiently performed, and the temperature of the underlying substrate was from room temperature (300K) to about 50 ° C (323K). Therefore, as shown in FIG. 3, the reaction product tungsten hexafluoride (WF ₆ ) almost sublimates in this temperature region, and the resist pattern 5 has a 10% The line width was reduced as described above.

On the other hand, in FIG. 2, quartz glass or low thermal expansion glass is used for the base substrate 1, and the basic period is Mo for the multilayer film 2.
Layer with a period of 6.9 nm and 4 layers.
A multilayer film coated repeatedly 0 times, a mask pattern metal thin film 4 having a thickness of 100 nm Ta, and a resist pattern 5 having a line width of 250 nm and a thickness of 300 nm ZEP.
SF excited by a microwave having a frequency of 2.45 GHz using SF ₆ as a resist and an etching gas, respectively.
As a result of performing plasma dry etching with active species from _six gases, the temperature of the underlying substrate was changed from room temperature (300K) to 50 ° C.
C (323K), but as shown in FIG.
Since tantalum pentafluoride (TaF ₅ ), a kind of reaction product, was in a solid phase in this temperature range, the mask pattern side walls were protected by TaF ₅ , and the mask pattern after plasma dry etching was performed on the resist pattern 5 3
No significant line width reduction occurred. When a chlorine-based gas composed of chlorine (Cl ₂ ), boron trichloride (BCl ₃ ), or a mixture thereof is used instead of SF _{6 as} the etching gas, the saturated vapor pressure and the temperature are shown in Table 1 and FIG. Although the relationship is not described, it was possible to obtain the same effect as when Ta plasma dry etching was performed using SF ₆ gas as described above. This is because the boiling point of tantalum pentachloride (TaCl ₅ ), a kind of reaction product, is determined by the Journal of Electrochemical Society, Vol. 138, No. 2, pp. 496-499 (19)
1991) [Journal of Electrochemical Society, Vol.
138, No. 2, February 1991].
And 5K, very close to 503 K, the boiling point of TaF _5,
The relationship between the saturated vapor pressure and the temperature giving the saturated vapor pressure is TaF ₅
It is presumed that it was similar to Further, even when an alloy or compound in which Si, germanium (Ge), boron (B) or the like is added to Ta is used for the mask pattern metal thin film 4,
Since its main component is Ta, TaF ₅ or TaCl ₅ is generated at the time of plasma dry etching, and the same effect as above can be obtained.

Further, in FIG. 2, the base substrate 1 is made of quartz glass or low thermal expansion glass, and the
a multilayer film composed of a stack of an o layer and a Si layer and having a period of 6.9 nm and repeatedly coated 40 times;
Alloy with Si, Si, etc., resist pattern 5 has line width of 250
nm, using ZEP resist thickness 300 nm, the etching gas SF _6, respectively, the frequency is 2.45GHz
When plasma dry etching is performed using active species from a mixed gas of Cl ₂ and BCl ₃ excited by microwaves, the temperature of the underlying substrate is from room temperature (300K) to 50 ° C.
(323K), but as shown in FIG. 3, aluminum trichloride which is a kind of reaction product in this temperature range
Since (AlCl ₃ ) was a solid phase, the mask pattern side wall was protected by AlCl ₃ , and no significant line width reduction occurred in the mask pattern 3 after the resist pattern 5 was subjected to the plasma dry etching.

FIG. 4 shows an example of a conceptual diagram of an exposure apparatus using a mask manufactured by the mask pattern forming method of the present invention. In FIG. 4, the mask reflected light 14 obtained by irradiating the exposure light 13 monochromatic to a wavelength of 13.5 nm onto the mask pattern 3 via the EUV illumination optical system emitted from the laser / plasma light source is a concave mirror. The projection exposure is performed on the wafer 12 through an optical system including a convex mirror 10 and a concave mirror 8. In the drawing, 7 is a multilayer film coated on the substrate of the concave mirror 6, 9 is a multilayer film coated on the substrate of the concave mirror 8, 11
Is a multilayer film coated on the substrate of the convex mirror 10. Using this exposure apparatus, a mask pattern 3 having a line width of 250 nm is reduced to 1/5 and transferred onto the wafer 12,
Subsequent processing steps result in the formation of ultrafine and highly dimensional-accurate semiconductor elements with a gate length of 50 nm and a dimensional variation of ± 5% or less on the wafer 12, contributing to an increase in operating time and stabilization. It became a thing.

Further, the mask pattern forming method of the present invention can be applied not only to a reflective mask for EUV lithography,
In VUV lithography using a VUV having a wavelength of about 100 nm to about 200 nm as a light source, an equivalent effect was obtained even when applied to the formation of a mask pattern for a transmission mask using quartz glass or low thermal expansion glass. For example,
A tantalum (Ta) thin film having a thickness of 100 nm is deposited on an undersubstrate made of synthetic quartz glass having a thickness of 9 mm, a resist pattern is formed on the tantalum thin film in a desired circuit shape, and SF is formed using the resist pattern as a mask. ₆
As a result of performing active species plasma dry etching from gas, the underlying substrate is not cooled during dry etching,
The temperature of the base substrate surface is from room temperature (300K) to 50 ° C (3
Although the temperature was increased to about 23K), the mask pattern after the plasma dry etching did not cause a remarkable decrease in line width, and it was found that a mask pattern with high dimensional accuracy could be formed.

[0020]

According to the present invention, an EU using a base substrate mainly made of a glass material having a low coefficient of thermal expansion and a low thermal conductivity is used.
In the manufacturing process of a reflective mask for V lithography,
Furthermore, in the process of manufacturing a transmission type mask for VUV lithography, when the mask pattern on the underlying substrate coated with the multilayer film is processed by dry etching, particularly plasma dry etching, the underlying substrate is not particularly cooled. Further, it is intended to prevent a variation in the mask pattern line width after dry etching with respect to the resist pattern, and to form a mask pattern with high dimensional accuracy.

[Brief description of the drawings]

FIG. 1 is a conceptual diagram of a cross-sectional structure of a reflective mask for EUV lithography.

FIG. 2 is a conceptual diagram of a manufacturing process of a reflective mask for EUV lithography.

FIG. 3 shows the saturated vapor pressure (m
FIG. 4 is a characteristic diagram showing a relationship between mHg) and a temperature (K) at which a saturated vapor pressure is given on a graph.

FIG. 4 is a conceptual diagram showing an example of an exposure apparatus using a mask manufactured by the mask pattern forming method of the present invention.

[Explanation of symbols]

1: base substrate, 2: multilayer film, 3: mask pattern, 4:
Metal thin film for mask pattern, 5: resist pattern,
6: concave mirror, 7: multilayer film coated on the substrate of concave mirror 6, 8: concave mirror, 9: multilayer film coated on the substrate of concave mirror 8, 10: convex mirror,
11: multilayer film coated on the substrate of the convex mirror 10, 12: wafer, 13: exposure light, 14: mask reflection light

Continuation of front page (56) References JP-A-4-67624 (JP, A) JP-A-6-260396 (JP, A) JP-A-11-236686 (JP, A) JP-A-4-247619 (JP) (A) JP-A-4-247614 (JP, A) (58) Fields investigated (Int. Cl. ⁷ , DB name) G03F 1/08 G03F 1/14 G03F 7/20 H01L 21/027 H01L 21/3065 JICST file (JOIS)

Claims (10)

(57) [Claims] 1. A method of forming a mask pattern for lithography, wherein the mask is illuminated with ultraviolet light as a light source and the reflected light of the obtained mask is projected and exposed on a wafer through an optical system including a mirror. A material composed of a material having low thermal conductivity, a mask pattern material on the base substrate, and a reaction gas used when processing the mask pattern by dry etching, at least a reaction product generated during the dry etching. A method of forming a mask pattern, wherein one kind is combined so as to become a solid phase at room temperature or a substrate temperature raised during the dry etching. 2. A method of forming a mask pattern for lithography, wherein the mask is illuminated with ultraviolet light as a light source, and the transmitted light of the mask is projected and exposed on a wafer through an optical system including a lens. A mask pattern material on the mask and a reaction gas used when the mask pattern is processed by dry etching, at least one of reaction products generated at the time of the dry etching. Characterized in that they form a solid phase at room temperature or at a substrate temperature raised during the dry etching. 3. The wavelength of the ultraviolet light is 10 nanometers (n
2. The method according to claim 1, wherein the ultraviolet light is an extreme ultraviolet light having a wavelength of from about m) to about 15 nanometers (nm). 4. The method according to claim 2, wherein the wavelength of the ultraviolet light is vacuum ultraviolet light having a wavelength in the range of about 100 nanometers (nm) to 200 nanometers (nm). 5. The dry etching method according to claim 1, wherein said dry etching is performed by a plasma dry etching method.
The method for forming a mask pattern according to the above. 6. The method according to claim 1, wherein said base substrate is made of quartz glass or low thermal expansion glass. 7. The mask pattern material is tantalum (T).
2. An alloy or a compound of a) or tantalum and at least one element of silicon (Si), germanium (Ge), and boron (B).
3. A method for forming a mask pattern according to any one of claims 1 to 2. 8. The main reaction gas of tantalum (Ta) or an alloy or compound of tantalum as the mask pattern material is a fluorine (F) compound or a mixture thereof, or chlorine (Cl), a chlorine compound or a mixture thereof. The method of forming a mask pattern according to claim 7, comprising: 9. The mask pattern material is made of aluminum (Al) or an alloy or compound of aluminum and silicon (Si), and a main etching gas of the mask pattern material is chlorine (Cl), a chlorine compound,
3. The method according to claim 1, further comprising a mixture thereof. 10. A method of manufacturing a semiconductor, comprising manufacturing a semiconductor element using a mask manufactured by using the method of forming a mask pattern according to claim 1.