JP3195052B2 - Power supply switching circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a power supply switching circuit for supplying a load circuit by switching between a main power supply and a backup power supply.

[0002]

2. Description of the Related Art A main power supply for generating a predetermined drive voltage is provided for operating a load circuit comprising, for example, a static random access memory (hereinafter referred to as "SRAM"). The main power supply can be realized by, for example, generating a predetermined DC voltage (load circuit) from a commercial AC voltage in a device equipped with the load circuit.

By the way, when the main power supply is turned off, if no allowance is given, the SRA as a load circuit must
Since the data stored in M will be lost, a backup power supply is generally prepared to store and retain the data, and the backup voltage is applied to the load circuit instead of the main power supply voltage.

FIG. 7 shows a conventional example of such a circuit for switching between a main power supply and a backup power supply. In FIG. 1, reference numeral 1 denotes a main power supply that supplies a main power supply voltage V _CC , and 2 denotes a backup power supply that supplies a backup power supply voltage V _BAT .

[0005] D1 is a first switching diode connected between the main power supply 1 and the output terminal 3, and D2 is a second switching diode connected between the backup power supply 2 and the output terminal 3. Reference numeral 4 denotes an SRAM connected to the output terminal 3 as a load circuit. Now, first, second switching diodes D1, D2 is a diode having the same properties, when the forward conduction voltage has to be V _F, when the negative power supply 1 is operating normally, Since the main power supply voltage V _CC is higher than the backup power supply voltage V _BAT , the first switching diode D1 is turned on (the second switching diode D2 is turned off) and the output voltage V
_O is a V _O = V _CC -V _F. However, for example, when the main switch (not shown) is turned off, the power supply voltage V _CC is changed to the backup voltage V _BAT.
When the voltage becomes lower than the threshold voltage, the second diode D2 is turned on (the first switching diode D1 is turned off) and the output voltage V _O
Is V _O = V _BAT −V _F.

[0006]

In the above-mentioned conventional circuit, if the minimum value of the operating voltage of the SRAM 4 is 4.5 V and the minimum value of the backup voltage required to hold data is 2 V, V _CC , V _BAT need to have voltages represented by the following equations. _{V CC = 4.5 + V F ···} (1) V BAT = 2 + V F ··· (2) This is because the V _F amount corresponding value higher switching diodes than 4.5V and 2V as V _CC or V _BAT This means that V _CC and V _BAT become the minimum allowable values. On the other hand, SR
When the voltage applied at the time of backup reaches about 2V, the holding state of the AM4 becomes marginal, and when a voltage swing of about 0.2V occurs even for a moment, the data stored in the SRAM4 is erased. In addition, if noise is applied to the main power supply and the voltage of V _CC is reduced due to the noise, a malfunction may occur during the operation of the SRAM 4.

Therefore, the main power supply voltages V _CC and V _BAT are set somewhat higher in consideration of the fluctuation of these voltages and the influence of noise, but this narrows the allowable range (margin). That much more extra allowance of V _F of the diode according to the conventional configuration on becomes narrower. For example, since when the backup power supply 2 is battery V _BAT is going down with time, 0.5V and V _F
Then, from the equation (2), the point at which V _{BAT falls} to 2.5 V (actually 2.7 V in consideration of 0.2 V for the fluctuation of the voltage) becomes an allowable value, and is extra by V _F There is a disadvantage that the margin is reduced.

In view of the foregoing, it is an object of the present invention to provide a novel power supply switching circuit that does not cause a voltage loss due to a switching element. Another object of the present invention is to make it possible to perform appropriate switching control in a power supply switching circuit that does not cause such a voltage loss.

[0009]

In order to achieve the above object, the present invention comprises a MOS transistor connected between a main power supply and an output terminal so as to switch and supply a main power supply and a backup power supply to a load circuit. First switch means, and M connected between a backup power supply and the output terminal.
A second switching means consisting of OS transistors, the first, and a switch control means for providing a switching voltage of the second switch means to the respective MOS transistors constituting each of said switch control means is mains voltage reference potential
Pressure detecting means for detecting the pressure drop below the pressure.
The output of the detecting means falls below the reference voltage of the main power supply voltage.
When the decrease of the voltage is detected, the first switch means is turned off.
F, it works to turn on the second switch means.
In the power supply switching circuit, the detecting means
Applying the voltage of the main power supply to the comparator
Means for applying a reference voltage to the comparator
A voltage circuit, wherein the reference voltage circuit is connected to the main power supply.
The capacitor that is charged
Is the reference voltage . Alternatively, the reference voltage
The path is a MOS that inputs the voltage from the backup power supply.
It includes a transistor buffer amplifier and
The output voltage of the amplifier is used as the reference voltage .

[0010]

Further, the switch control circuit includes a first detecting means for detecting that the voltage of the main power supply falls below a predetermined voltage, and a second detecting means for detecting that the voltage of the main power supply falls below a predetermined voltage. A terminal to which the second detecting means can be connected;
An output which receives the output of the first detecting means and the voltage from the terminal, and the output of the first detecting means and the voltage detected from the terminal, each of which detects that the voltage of the main power supply has fallen below a predetermined voltage. And a logic circuit for generating an output that turns off the first switch means and turns on the second switch means.

[0012]

As described above, the power supply switching circuit comprises the first MOS transistor connected between the main power supply and the output terminal.
Switch means, second switch means comprising a MOS transistor connected between a backup power supply and the output terminal, and switch control means for applying a switching voltage to each of the MOS transistors constituting the first and second switch means. With this configuration, since the first and second switch means are constituted by MOS transistors, no voltage loss occurs due to the switch means. Therefore, the allowable range (margin) of the power supply voltage drop and the backup voltage drop are correspondingly reduced. Becomes wider (margin).

Further, the switch control circuit turns off the first switch means and turns on the second switch means by detecting that the main power supply falls below a predetermined voltage by the detecting means.
With this configuration, the backup power supply is switched before the main power supply voltage falls below a predetermined voltage. Therefore, for example, when the load circuit is an SRAM, data can be reliably held when the main power supply voltage drops.

Incidentally, such a predetermined voltage must be generated as a reference voltage. When this reference voltage is formed by using a backup power supply, a buffer amplifier for inputting a voltage from the backup power supply is provided. If the output voltage of the buffer amplifier is used as the reference voltage, the amplifier (which is constituted by MOS transistors and a voltage from a backup power supply is applied to the gate thereof) can be easily understood. However, since no current flows from the backup power supply and only the voltage is applied, the power of the backup power supply is hardly consumed.

The switch control circuit includes a first detecting means for detecting that the voltage of the main power supply falls below a predetermined voltage, and a second detecting means for detecting that the voltage of the main power supply falls below a predetermined voltage. Receiving the output of the first detecting means and the voltage from the terminal, and the output of the first detecting means and the voltage from the terminal are each at a predetermined voltage. A logic circuit that generates an output that turns off the first switch means and turns on the second switch means when the output is lower than the voltage is detected. By using transistors,
Even if the detection voltage varies, the second detection means can compensate for the inaccuracy of the detection.

[0016]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below with reference to the embodiments shown in the drawings. In FIG. 1 embodying the present invention, the same parts as those of the conventional example of FIG. 7 are denoted by the same reference numerals. In this embodiment, P-type MOS transistors P1 and P2 are used as switch means connected between the main power supply 1 and the output terminal 3 and between the backup power supply 2 and the output terminal 3, respectively. 5 is a control voltage for switching these MOS transistors P1 and P2.
1, a switch control circuit applied to the gate of P2.

When operating the SRAM 4, the switch control circuit 5 applies a low-level voltage to the gate of the MOS transistor P1 to turn on the MOS transistor P1, and applies a high-level voltage to the gate of the MOS transistor P2 to apply the high-level voltage. MOS transistor P2 is turned off
Make F. When the SRAM 4 is in the backup state, the switch control circuit 5 applies a high-level voltage to the gate of the MOS transistor P1 and a low-level voltage to the gate of the MOS transistor P2 to turn off the MOS transistor P1 and turn on the MOS transistor P2. Eggplant

[0018] Since the MOS transistors are used P1, P2 as a switch means for switching the main power supply 1 and the backup power supply 2 in the present embodiment, the voltage loss is almost zero, the minimum as V _CC to SRAM4 4.
5V, becomes (if considering the effect of shaking and noise voltage 4.5V, slightly to higher than 2V) minimum 2V to be spread tolerance as V _BAT. Therefore, for example, when a battery is used as the backup power supply 2, the usable life of the battery is extended as compared with the conventional example.

FIG. 2 shows the details of the switch control circuit 5. The switch control circuit 5 is compared with the reference voltage Vref and the voltage of the mains voltage obtained by dividing by V _CC resistors R1, R2 (a) point by a comparator 6, lower than the potential of the reference voltage Vref (a) point Then, the output of the comparator 6 changes from the high level to the low level.

This output is inverted by the first inverter G1 and applied as a high-level voltage to the gate of the MOS transistor P1, turning off the MOS transistor P1. Further, the output of the first inverter G1 is further inverted by the second inverter G2, so that the MOS transistor P2
At a low level to turn on the MOS transistor P2. As a result, the backup voltage V _BAT is derived from the output terminal 3. The above switching must be performed before the SRAM 4 connected to the output terminal 3 loses data due to the decrease in the main power supply V _CC . Therefore, the reference voltage Vref is selected to be a value at which the data in the SRAM 4 does not disappear.

In this way, when the main switch of the device is turned off and the main power supply voltage V _CC falls, while the V _CC is a voltage value at which data in the SRAM 4 is not erased, the voltage V Switching is performed so as to output _BAT to output terminal 3.

[0022] reference the voltage configuration of the reference voltage source 7 give Vref are various, for example as a power supply voltage V _CC as shown in FIG. 3 as a single structure, resistors R4, R5 and the R5
And a capacitor C1 in parallel with the capacitor C1, and using the voltage of C1 as a reference voltage.

The reference power supply 7 shown in FIG. 3 uses the main power supply voltage V _CC , but FIG. 4 shows the reference voltage Vref obtained from the backup power supply 2. In FIG. 4, the voltage of the backup power supply 2 (backup power supply voltage) V _BAT is applied to the buffer amplifier 8. _Assuming that the backup power supply voltage V _BAT is 3 V, the output of the buffer amplifier 8 also becomes 3 V. This voltage is divided by the resistors R6 and R7, and the voltage at the point (b) is applied to the (-) terminal of the comparator 6. In this case, the buffer amplifier 8 is
When a transistor is used, only the voltage is applied from the backup power supply 2 to the gate, and no current flows, so that the advantage that the power of the backup power supply 2 is not consumed can be enjoyed.

FIG. 5 relates to the switch control circuit 5 and adopts another configuration. That is, here, the output of the comparator 6a for comparing the main power supply voltage V _CC with the reference voltage Vref is used as the input of the NOR gate 9, and the other input of the NOR gate 9 is obtained from the terminal 10. Both the line 11 and the terminal 10 are connected to the ground potential via the resistors R8 and R9. The output of NOR gate 9 is applied to the gate of MOS transistor P1 and to the gate of MOS transistor P2 via inverter G2.

The terminal 10 can be connected other comparator 6b to be compared with the reference voltage Vref main power V _CC as an external circuit. Now, the comparator 6a is the same IC as the NOR gate 9, the inverter G2 and the like by using MOS transistors.
When formed on a chip, the characteristics of the comparator 6a composed of this MOS transistor tend to vary, and the comparator 6a cannot accurately detect a decrease in V _CC (therefore, when the main power supply voltage V _CC exceeds the data holding range of the SRAM 4). Operation when it is lowered).

To avoid such a problem, the main power supply voltage V _CC
In order to ensure that the power supply is switched when the voltage drops to a predetermined voltage, a highly accurate comparator 6b having, for example, a bipolar transistor as an active element is connected to the terminal 10, and both of the comparators 6a and 6b detect the voltage. It is preferable to operate so that the switching of the power supply is performed when their outputs become low level.
Note that the outputs of these comparators 6a and 6b are high-level voltages in a state where the above-described detection of the decrease in V _CC is not performed.

In this way, accurate power supply switching can be realized. However, when the detection point of the comparator 6a (accordingly, the reference voltage) is set high beforehand (the margin is narrowed by that amount), the above variation is absorbed. Does not need to connect the comparator 6b to the terminal 10, but even if the comparator 6b is not connected in this way, since the terminal 10 is connected to the ground point via the resistor R9, the NOR gate 9 is connected to the comparator 6a. It can respond to operation alone.

Finally, FIG. 6 shows a specific application example of the power supply switching circuit according to the present invention. In FIG.
Is an IC chip, which includes a terminal 21 for inputting a main power supply voltage V _CC , a terminal 22 for inputting a backup power supply voltage, a power supply voltage output terminal 23, a signal input terminal 25, and a signal output terminal 24.

Reference numeral 26 denotes a decoder for decoding a signal input from the input terminal 25, and reference numeral 27 denotes the decoder 26.
This is a buffer circuit which receives output data from and supplies it to the output terminal 24. On the other hand, 28 is a detection circuit and 29 is a gate circuit. The detection circuit 28 and the gate circuit 29 constitute the switch control circuit 5 described above.

Here, it is assumed that the decoder 26 and the detection circuit 28 use the main power supply voltage V _CC as the operation voltage, and the buffer circuit 27 and the gate circuit 29 use the output voltage V _O as the operation voltage. The SRAMs 4 are connected to the terminals 23 and 24.

In FIG. 6, when the main power supply voltage V _CC is being led to the output terminal 23 and the V _CC drops, the detection circuit 28 and the gate circuit 29 cause the MOS circuit to operate.
The transistor P1 is turned off, the MOS transistor P2 is turned on, and V _BAT is output to the output terminal 23.
Not only provided to the RAM 4 but also to the buffer circuit 27 and the gate circuit 29. Therefore, even if V _CC falls to the inoperable potential of the decoder 26 and the detection circuit 28, P1 is turned off, P2 is turned on, and the output terminal 23 is supplied because V _BAT is supplied to the buffer circuit 27 and the gate circuit 29.
Can maintain the output state.

The inability of the SRAM 4 to hold data not only causes the power supply voltage applied to the SRAM 4 to decrease beyond a predetermined value, but also causes the read /
Although the data may be erased by the voltage drop of the write signal, the circuit of FIG. 6 is designed to hold the data with respect to both the power supply voltage and the signal.

[0033]

As described above, according to the present invention, the power supply switching circuit is provided with the MO connected between the main power supply and the output terminal.
A first switch comprising an S transistor; a second switch comprising a MOS transistor connected between a backup power supply and the output terminal; and a switching voltage applied to each of the MOS transistors constituting the first and second switch. When the switch control means is provided, the first and second switch means are constituted by MOS transistors, so that no voltage loss occurs due to the switch means. Becomes wider (margin).

The switch control circuit turns off the first switch means and turns on the second switch means by detecting that the main power supply falls below a predetermined voltage by the detecting means.
With this configuration, the power supply is switched to the backup power supply before the main power supply voltage falls below the predetermined voltage. Therefore, for example, when the load circuit is an SRAM, data can be reliably held.

Incidentally, such a predetermined voltage must be created as a reference voltage. When this reference voltage is formed by using a backup power supply, a buffer amplifier for inputting a voltage from the backup power supply is provided. When the output voltage of the buffer amplifier is configured to be the reference voltage, the amplifier (the amplifier is formed of a MOS transistor and a voltage from a backup power supply is applied to the gate thereof)
To) no current flows from the backup power source to, since only a voltage is applied, it is not necessary to almost consumed power of the backup power supply.

The switch control circuit comprises a first detecting means for detecting that the voltage of the main power supply falls below a predetermined voltage, and a second detecting means for detecting that the voltage of the main power supply falls below a predetermined voltage. Receiving the output of the first detecting means and the voltage from the terminal, and the output of the first detecting means and the voltage from the terminal are each at a predetermined voltage. A logic circuit that generates an output that turns off the first switch means and turns on the second switch means when the output is lower than the voltage is detected. By using transistors,
Even if the detection voltage varies, the second detection means can compensate for the inaccuracy of the detection.

[Brief description of the drawings]

FIG. 1 is a circuit diagram showing a power supply switching circuit embodying the present invention.

FIG. 2 is a diagram showing an example of a switch control circuit of a power supply switching circuit embodying the present invention.

FIG. 3 is a diagram showing a reference voltage source shown in FIG. 2;

FIG. 4 is a diagram showing another switch control circuit example of the power supply switching circuit embodying the present invention.

FIG. 5 is a diagram showing still another switch control circuit example of the power supply switching circuit embodying the present invention.

FIG. 6 is a diagram showing a specific application example of the present invention.

FIG. 7 is a diagram showing a conventional power supply switching circuit.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 Main power supply 2 Backup power supply 3 Output terminal 4 SRAM 5 Switch control circuit 6 Comparator 7 Reference voltage source 8 Buffer amplifier 9 NOR gate 10 Terminal 21 Main power supply voltage input terminal 22 Backup power supply voltage input terminal 23 Power supply voltage output terminal 24 Signal output terminal 25 signal input terminal 26 decoder 27 buffer circuit 28 detection circuit 29 gate circuit P1, P2 MOS transistor V _CC main power supply voltage V _BAT backup power supply voltage V _O output voltage G1, G2 inverter

Claims (4)

(57) [Claims] A first switch means comprising a MOS transistor connected between a main power supply and an output terminal for switching and supplying a main power supply and a backup power supply to a load circuit;
MOS connected between backup power supply and the output terminal
A second switch means comprising a transistor;
Each MOS transistor constituting the second switch means, respectively a switch control means for providing a switching voltage
The main power supply voltage is equal to or lower than a reference voltage.
Detecting means for detecting a downward movement;
The output of the means is low when the mains voltage falls below the reference voltage.
When the bottom is detected, the first switch means is turned off,
It works to turn on two switch means.
In the power supply switching circuit, the detecting means connects the comparator and the voltage of the main power supply to the control circuit.
Means for applying to the comparator and a reference to the comparator
A reference voltage circuit for applying a voltage, wherein the reference voltage circuit is a capacitor charged by the main power supply.
The output of the capacitor is
A power supply switching circuit, comprising: 2. A main power supply and a backup power supply are turned off to a load circuit.
Connected between the main power supply and output terminals
First switch means comprising a MOS transistor;
MOS connected between backup power supply and the output terminal
A second switch means comprising a transistor;
Each MOS transistor constituting the second switch means
Switch control means for applying a switching voltage to the
The main power supply voltage is equal to or lower than a reference voltage.
Detecting means for detecting a downward movement;
The output of the means is low when the mains voltage falls below the reference voltage.
When the bottom is detected, the first switch means is turned off,
It works to turn on two switch means.
In the power supply switching circuit, the detecting means connects the comparator and the voltage of the main power supply to the control circuit.
Means for applying to the comparator and a reference to the comparator
A reference voltage circuit for applying a voltage, the reference voltage circuit receiving a voltage from the backup power supply.
Including MOS transistor buffer amplifier
The output voltage of this buffer amplifier is used as the reference voltage.
A power supply switching circuit. 3. The switch control means according to claim 1 , further comprising:
First detecting that the pressure falls below a predetermined voltage a predetermined
Detecting means for detecting that the voltage of the main power supply is lower than a predetermined voltage;
Terminal to which second detecting means for detecting the falling of
And an output of the first detecting means and a voltage from the terminal.
And the output of the first detecting means and the terminal
Voltage of the main power supply is lower than a predetermined voltage.
The output of the first switch
Output that turns off the means and turns on the second switch means.
And the first detecting means is an MO circuit.
The comparator is formed by the S transistor, and the second detection is performed.
The means are bipolar transistors and the comparator is formed
3. The method according to claim 1 or 2, wherein
Power supply switching circuit. 4. The voltage at the output terminal is not limited to a load circuit.
And the load applied to the switch control means.
It is also provided to the signal supply circuit for driving the circuit.
The power supply switching circuit according to claim 1 or 2, wherein