JP3182295B2 - Power amplifier - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a power amplifier suitable for an output stage of an audio amplifier and the like.

[0002]

2. Description of the Related Art Conventionally, a power amplifying device has been used, for example, in an output stage of an audio power amplifier for supplying power to a load such as a speaker.

In such a power amplifying device, it is required to supply as much output power as possible to a load, and a configuration is known in which a boosting type switching power supply is provided to boost the power supply voltage. .

A conventional power amplifier will be described with reference to FIG.

FIG. 10 shows a SEPP (Single Ended Push-
1 shows a power amplifying device having an output stage of the (Pull) type.

In FIG. 1, an AC input signal supplied from a signal source 16 is supplied to an amplifier 10 via an input terminal IN, and an output signal amplified by the amplifier 10 is supplied to a load RL via an output terminal OUT. Is output to The load RL is, for example, a speaker, and a sound can be generated when a predetermined current based on an output signal flows through the load RL.

The amplifier 10 is, for example, a class B amplifier, and includes an NPN output transistor Q20 whose collector is connected to + Vcc and a PNP output transistor Q21 whose collector is connected to -Vcc.

[0008] The step-up switching power supply section 20 includes a coil L1, a diode D1, a capacitor C1 and a switch S.
This is a so-called switching regulator composed of W1 and generating an upper (positive) voltage + Vcc based on the power supply voltage VB and supplying it to the amplifier 10. Further, the step-up switching power supply unit (inverted step-up switching power supply unit) 22 whose polarity is inverted is composed of a coil L2, a diode D2, a capacitor C2, and a switch SW2. Nature) voltage -Vcc
Is a switching regulator that generates and supplies the same to the amplifier 10.

On the upper (positive) power supply side of the amplifier 10,
A first power supply control unit 80 is provided. One input terminal of the first power supply controller 80 is connected to a reference power supply (Vref), and the other input terminal is connected to an upper power supply (+ Vcc).

[0010] The first power supply control unit 80 has a reference voltage Vref.
And the upper power supply voltage + Vcc. Then, a predetermined comparison output corresponding to the difference between the two is output to the switch SW1 as a control signal for controlling on / off of the switch SW1 of the step-up switching power supply unit 20.

Here, the control signal is a signal for changing the on / off ratio (duty ratio) of the switch SW1. When the switch SW1 is turned on and off, a back electromotive force is generated in the coil L1. As a result, it is possible to generate an upper switching voltage + Vcc which is higher than the power supply voltage + VB by a predetermined amount.

On the other hand, on the lower (negative) power supply side of the amplifier 10, a second power supply controller 84 is provided. This second
The power supply controller 84 has one input terminal connected to the reference power supply (−
Vref), and the other input terminal is connected to the lower power supply (−V
cc).

The second power supply control section 84 has a reference voltage -Vref
And the lower power supply voltage −Vcc. Then, similarly to the first power supply control unit 80, a control signal for controlling on / off of the switch SW2 of the inverting step-up switching power supply unit 22 is output to the switch SW2.

In the inverting step-up switching power supply section 22, duty control of the on / off of the switch SW2 is also performed.
By using the back electromotive force generated in the coil L2,
Lower power supply voltage that has been boosted by a predetermined amount from power supply voltage + VB−
VCC is occurring.

[0015]

However, FIG.
In the conventional power amplifier shown in FIG. 1, since the power supply voltages + Vcc and -Vcc supplied to the amplifier 10 are determined irrespective of the voltage level of the output signal,
There is a problem that the power loss in the output transistors Q20 and Q21 is large.

That is, as shown in FIG. 11, the collectors of the output transistors Q20 and Q21 are constantly connected to the power supply voltage +.
Vcc and -Vcc are supplied. On the other hand, output signals of a predetermined voltage are output from the emitters of the output transistors Q20 and Q21 in accordance with the input signal applied to the base.

Therefore, output transistors Q20 and Q2
The power supply voltage + Vcc, -V
A voltage obtained by subtracting the output signal voltage from cc is applied. The power of the value obtained by multiplying the voltage VCE between the collector and the emitter by the output current is equivalent to the power loss of the output transistor.

Therefore, the collector-emitter voltage VCE
Varies in accordance with the output voltage of the output signal. In particular, when VCE is large, that is, when the output voltage is small, the power loss in the output transistors Q20 and Q21 becomes extremely large,
This has reduced the efficiency of power amplification.

Further, since the output transistors Q20 and Q21 generate heat due to power loss, an expensive transistor or a cooling means capable of withstanding the heat generation is required.

Further, since the power supply voltages + Vcc and -Vcc are supplied to the collectors of the output transistors Q20 and Q21, there is a problem that the withstand voltage between the collector and the emitter of each transistor is required to be 2 Vcc or more.

The present invention has been made to solve these problems, and an object of the present invention is to realize a power amplifier capable of efficiently performing power amplification by minimizing power loss in an output transistor of an amplifier. And

[0022]

To achieve the above object, a power amplifying apparatus according to the present invention has the following features.

[0023]

[0024]

[0025]

[0026]

That is, a step-up switching power supply unit that generates a power supply voltage by boosting an output voltage of a power supply in response to a predetermined control signal, and a second switching power supply unit that amplifies input signals of opposite phases using the power supply voltage as an operating voltage. A first and a second amplifier;
An addition circuit for adding the output signal of the second amplifier, a first input to which the output terminal of the switching power supply is connected, and a second input to which the output terminal of the addition circuit is connected via a reference voltage. A power control unit for comparing the signals applied to the first and second inputs and applying an output signal corresponding to the difference as the control signal to the switching power supply unit; a pair of input terminals; A first differential amplifier having a pair of differential output terminals connected to the inputs of the first and second amplifiers, a common input terminal for determining a DC level of the pair of differential output terminals, a linear adder, and a clamp; And adding the output voltages of the first and second amplifiers,
If the absolute value of the difference between the output voltages is within a predetermined value, the line
The result of addition by the shape adder is output, and when the absolute value of the output voltage is equal to or greater than a predetermined value, the addition is performed by the clamp
Characterized in that it comprises a non-linear adder result is output, compares the output signal with a reference voltage of said non-linear adder circuit, and a comparator circuit for applying an output signal corresponding to the difference to the common input terminal, the And

[0028]

The step-up switching power supply includes a coil having one end connected to the power supply, and a current connected in series to the other end of the coil and having a forward current flowing from the power supply toward the first and second amplifiers. And a capacitor connected to the output side of the diode, one end is connected to a connection point between the coil and the diode,
A switch whose other end is grounded, the switch being turned on / off in response to a control signal from the first power supply control unit.

[0030]

In the power amplifying apparatus according to the present invention, a boosting type switching power supply section is provided to boost the power supply voltage, amplify the input signal and output it to the output terminal, and invert and amplify the input signal. By providing a second amplifier for outputting to the output terminal, an alternating-current output signal of opposite phase is generated at both ends of the load RL, and BTL (Balanced Transformerless) drive is possible. In the present invention, the power supply
Boost type switching power supply according to the output signal generated by the
Since the level of the voltage generated by the source section is adjusted, the amplifier
Output transistor collector-emitter voltage VCE
It is always kept almost constant. This allows the collector
Output trough generated due to large inter-mitter voltage VCE
Power loss inside the transistor
The efficiency of amplification can be dramatically improved. Ma
In addition, the use of a step-up switching power supply
Control the operation of the output transistor of the amplifier.
Becomes easier. In addition, the load can be changed without changing the power supply.
On the other hand, large power can be supplied very efficiently
A power amplifying device with low power consumption is obtained.

[0031]

[0032]

[0033]

Therefore, even with a single power supply, the maximum power can be increased, and on the other hand, the power consumption of the power amplifier can be reduced, which is extremely advantageous for downsizing the device.

Further, a differential amplifier which automatically adjusts the DC level at the output terminal and outputs predetermined signals whose polarities are inverted to each other to the first amplifier and the second amplifier, and a nonlinear addition circuit are provided. Then, the DC level of the output of the differential amplifier is automatically adjusted according to the result of the nonlinear addition processing. Thus, the DC level of the output can be changed by following the change in the output. Then, the DC voltage at the output terminals on both sides of the load can be clamped by the non-linear addition circuit so as not to be lower than a predetermined voltage value, and crossover distortion of the output signal can be reduced.

The half-wave driving requires only one signal path in the device, and the power supply voltage can be steadily boosted with only a single boost switching power supply. Therefore, power consumption is further reduced, and highly efficient power amplification can be realized.

[0037]

EXAMPLES Related Art FIG 1 is a diagram showing a circuit configuration of a power amplifying apparatus according to the related art of the present invention. In FIG. 1 and the drawings described below, the same portions as those already described are denoted by the same reference numerals, and description thereof will be omitted.

An AC input signal supplied from the signal source 16 is supplied to the amplifier 10 via the input terminal IN. The output signal amplified by the amplifier 10 is output to the load RL via the output terminal OUT.

On the upper (positive) power supply side of the amplifier 10,
A first power supply controller 12 is provided. One input terminal of the first power supply controller 12 is connected to a reference power supply (VX).
It is connected to the output terminal OUT side. The other input terminal is connected to the output side of the step-up switching power supply unit 20.

The first power supply controller 12 calculates a value obtained by adding the reference voltage VX to the output voltage and the upper (switching) power supply voltage + V
Compare with BA. The switching voltage + VBA supplied to the amplifier 10 is always VX with respect to the output signal voltage.
A control signal is output to raise the value only. The control signal is, for example, a pulse signal that performs duty control on and off of the switch SW1 of the step-up switching power supply unit 20. The control signal also controls the boost amount of the upper switching voltage + VBA with respect to the power supply voltage VB.

On the other hand, on the lower (negative) power supply side of the amplifier 10, a second power supply controller 14 is provided. This second
One input terminal of the power supply controller 14 is connected to a reference power supply (VX).
Is connected to the output terminal OUT side. Also,
The other input terminal is an inverting step-up switching power supply unit 22.
Is connected to the output side.

The second power supply controller 14 compares a voltage obtained by adding the reference voltage VX to the output voltage with a lower power supply voltage -VBB. Then, a control signal for always lowering the power supply voltage -VBB supplied to the amplifier 10 with respect to the output signal voltage by VX is output to the switch SW2 of the inverting boosting switching power supply unit 22. The control signal is, for example, the on / off of the switch SW2 of the inverting step-up switching power supply unit 22,
This is a pulse signal for duty control, and the control signal also controls the boost amount of the switching voltage -VBB with respect to the power supply voltage -VB.

With the above configuration, as shown in FIG. 2, the switching voltages + VBA and -VBB which are always higher than the voltage level of the output signal by ± VX are supplied to the collectors of the output transistors Q20 and Q21. Will be done.

Accordingly, the voltage VCE between the collector and the emitter, which is indicated by oblique lines in the figure, is constantly substantially constant. The power loss of the output transistor corresponding to the area of the hatched area in the figure can be made extremely smaller than that of the conventional power amplifying device, as is apparent from the area of the hatched display area in FIG. Becomes This makes it possible to dramatically improve the efficiency of power amplification.

Further, by raising the power supply voltage, the operation control of the output transistor of the amplifier becomes easy. Further, even if the power supply is not changed, a large power can be supplied to the load very efficiently, and a power amplifier with low power consumption can be obtained.

Since the device can be downsized and low power consumption can be realized, the power amplifying device according to the related art can be used for portable audio equipment and the like.

(Embodiment ) In FIG. 3, a first differential amplifier 40 has an input terminal IN1.
And the (inverted) input terminal IN2, the first amplifier 30 and the second
It has two differential output terminals connected to the amplifier 32, respectively, and a common input terminal C for determining the DC level of the two differential output terminals.

An input signal from the signal source 16 is supplied between the input terminal IN1 and the inverted input terminal IN2. The first differential amplifier 40 amplifies the input signal with a gain determined by the ratio of the resistance R1 to the resistance R2, and outputs differential output signals having phases opposite to each other from two differential output terminals. The output differential output signals having opposite phases are output to the first amplifier 30 and the second amplifier 32 constituting the BTL amplifier.

Output terminals OUT1 and OUT2 are connected to the output sides of the first and second amplifiers 30 and 32, respectively. The first and second amplifiers 30, 32 are connected to a load RL.
Are driven by BTL.

A non-linear addition circuit 44, which will be described later,
Is output from the first and second amplifiers 30 and 32 to the output terminal OU.
The two output signals respectively output to T1 and OUT2 are substantially added, and the fluctuation of the two output signals is clamped to a predetermined value or less.

The second differential amplifier 36 includes a nonlinear addition circuit 4
4 and outputs a comparison output signal corresponding to the difference between the output signal from the non-linear addition circuit 44 and the reference voltage VBC to the common input terminal C of the first differential amplifier 40.

The addition circuit 42 has two output terminals OUT
The two output signals respectively output to OUT1 and OUT2 are added, and a predetermined added signal is supplied to one input terminal of the power supply control unit 34 via the reference voltage VX.

The other input terminal of the power supply control section 34 is connected to the output side of the step-up switching power supply section 24.

The power supply control section 34 outputs a voltage obtained by adding the reference voltage VX to the output voltage of the adding circuit 42 and a switching voltage + V
Compare with BA. Then, it outputs a control signal for constantly increasing the switching voltage + VBA supplied to the amplifiers 30 and 32 by VX with respect to the output signal voltage. The control signal is, for example, a pulse signal for duty-controlling the on / off of the switch SW1 of the step-up switching power supply unit 24. The control signal also controls the amount of boosting of the switching voltage + VBA with respect to the power supply voltage VB.

The circuit configuration of the step-up switching power supply unit 24 is the same as that of the circuit of the step-up switching power supply unit 20 shown in FIG. 1, and includes a coil L3, a capacitor C3, and a switch SW3.

Next, a specific circuit configuration example of the first differential amplifier 40, the first amplifier 30 and the second amplifier 32 will be described with reference to FIG.

The first differential amplifier 40 has two input terminals I
It has PNP transistors Q1 and Q2 whose bases are connected to N1 and IN2, respectively, and a variable constant current source I1. Here, the emitters of the transistors Q1 and Q2 are connected to each other, and a connection point thereof is connected to a variable constant current source I1 and a constant current source I2 having one end connected to a switching power supply (+ VBA). Also, the transistor Q
The first amplifier 30 and the second amplifier 32 are connected to the collectors of the first and the second Q2.

The first and second amplifiers 30 and 32 respectively include driving circuits 50 and 54 and a first SEPP circuit (single
ended push-pull) 52 and a second SEPP circuit 56. And, in particular, the first and second SEPP
BTL for driving load RL by circuits 52 and 56
An amplifier is configured.

The driving circuits 50 and 54 are respectively composed of a constant current source I3, one end of which is connected to a switching power supply (+ VBA).
I4, two diodes and an NPN transistor Q
3 and Q4 are connected in series in this order. The bases of the transistors Q3 and Q4 are connected to the collectors of the transistors Q1 and Q2, respectively, and the differential output signal from the first differential amplifier 40 is supplied.

The first SEPP circuit 52 has an NPN base connected to a connection point between the constant current source I3 and the diode.
Type output transistor Q5 and a PNP whose base is connected to the junction between the diode and the collector of transistor Q3
And an output transistor Q6.

The collector of the output transistor Q5 is connected to a switching power supply (+ VBA), and the emitter of the output transistor Q5 is connected to the emitter of the output transistor Q6. And the output transistor Q5
One end of a load RL is connected to a connection point between the output transistor Q6 and the output transistor Q6 via an output terminal OUT1. Note that the emitter of the output transistor Q6 is grounded.

The second SEPP circuit 56 has a configuration similar to that of the first SEPP circuit 52, and includes an NPN output transistor Q7 and a PNP output transistor Q8.
It is connected to a drive circuit (bias circuit) 54. A load R is connected to a connection point between the output transistor Q7 and the emitter of the output transistor Q8 via the output terminal OUT2.
The other end of L is connected.

The operation of the circuit configuration shown in FIG. 4 will be described below.

First, when an input signal from the signal source 16 shown in FIG. 3 is supplied to the inverting input terminal IN2, it is amplified according to the input signal, and differential output signals having mutually opposite phases are output from the transistors Q1 and Q2. Output from the collector side.

The transistors Q3 and Q4 operate according to the differential output signal output to their bases, and the first and second transistors
A signal corresponding to the differential output signal is applied to the SEPP circuits 52 and 56.

In the first and second SEPP circuits 52 and 56, when both the PNP output transistor Q6 and the NPN output transistor Q7 are on, the NPN output transistor Q5 and the PNP output transistor Q8
And is off.

Conversely, when both the output transistor Q6 and the output transistor Q7 are off, the output transistor Q5 and the output transistor Q8 are on.

Then, a predetermined alternating current is supplied to the load RL.

As described above, in this embodiment, the load RL is changed to B
By performing the TL drive, a large power can be output with a single power supply, and the power consumption of the power amplifying device can be reduced, which is extremely advantageous for downsizing the device.

Next, the nonlinear addition circuit 44 shown in FIG.
The configuration of the differential amplifier 36 will be described with reference to FIG.

In the nonlinear addition circuit 44, the output terminal OUT
1 and OUT2, the resistors R10 and R1 having the same value.
1 are connected in series.

A diode D10 and a diode D11 are further connected in series between the output terminals OUT1 and OUT2. The anodes of the diodes D10 and D11 are connected to the output terminals OUT2 and OUT1, respectively.
The cathode side of the diode D10 and the cathode side of the diode D11 are connected. Further, a connection point PR between the resistors R10 and R11 and a connection point PD between the diodes D10 and D11 are connected to each other.

One input terminal of the second differential amplifier 36 is
It is connected to the connection point PD of the diodes D10 and D11. The other input terminal of the second differential amplifier 36 is connected to a reference power supply (VBC).

The non-linear addition circuit 44 has an output terminal OUT
When the absolute value of the difference (V01-V02) between the output voltages at OUT1 and OUT2 is equal to or smaller than 2VF (VF = forward voltage of the diode), an adding operation is performed. That is, in the section of 2 VF or less, as shown in FIG.
Then, by the action of the resistors R10 and R11, VC = (V01 +
V02) / 2. The action of the diodes D10 and D11 prevents the absolute value of (V01-V02) from falling below VF. Also, 2
When the voltage exceeds VF, the diodes D10 and D11
Is turned on, and this non-linear addition circuit 44 operates as a circuit for clamping the lower voltage.

The two input terminals of the second differential amplifier 36 are imaginary shorts, and the voltage levels of the two input terminals are compared. Then, the current amount of the variable constant current source I1 in FIG. 4 is adjusted so that the two voltage levels are equal (that is, the voltage VD at the connection point PD of the diodes D10 and D11 is equal to the reference voltage VBC). Control.

When the amount of current in the variable constant current source I1 of FIG. 4 changes, the transistors Q1 and Q2 of the first differential amplifier
, The amount of current between the emitter and the collector of the transistor Q changes.
3, the base voltage of Q4 changes.

As a result, the base voltages of the output transistors Q5 and Q6 and the output transistors Q7 and Q8 change, and the amount of change in the DC voltage at the output terminals OUT1 and OUT2 is controlled equally.

Here, it is assumed that a voltage V01 having a level as shown in FIG. 7A is generated at the output terminal OUT2 and a voltage V02 having a level as shown in FIG. 7B is generated at the output terminal OUT1. An example will be described.

First, in the period of t1, the first of FIG.
This shows a state where the output transistor Q6 of the amplifier and the output transistor Q7 of the second amplifier are on. The voltage V01 level at the output terminal OUT2 rises from the reference voltage VBC, as shown in FIG.

When V01 rises and the absolute value of (V01-V02) exceeds 2VF, the above-described nonlinear addition circuit 44 performs the clamping operation. Therefore, the level of the voltage V02 at the output terminal OUT1 is fixed at a voltage level lower than VBC by VF, and does not drop below (VBC-V02).

In the next period t2, the output transistor Q5 of the first amplifier and the output transistor Q8 of the second amplifier are on. Then, contrary to the period t1, the voltage V02 level at the output terminal OUT1 is equal to the reference voltage V2.
Ascend from BC. On the other hand, the level of the voltage V01 at the output terminal OUT2 is fixed at a voltage level lower than VBC by VF, and does not drop below (VBC-V01).

Then, as described above, the second differential amplifier 36
Thus, the voltage VD at the connection point PD between the diodes D10 and D11 is controlled to be equal to the reference voltage VBC.

Next, an example of the configuration of the adder circuit 42 in FIG. 3 will be described with reference to FIG.

The bases of the NPN transistors Q11 and Q12 are connected to both ends of the load RL of FIG. 3 via input terminals 60 and 62, respectively. The transistor Q11,
The collectors of Q12 are both connected to a predetermined power supply + V. The emitter is connected to a predetermined current source CS,
An output terminal 64 is provided at a connection point between the emitters of the two transistors Q11 and Q12 and the current source CS.
An output signal obtained by adding the two output signals is output from the output terminal 64, and supplied to the input terminal of the power supply control unit 34 via a predetermined reference power supply (VX) shown in FIG. ing.

The power supply control unit 34 shown in FIG. 3 always makes the voltage higher by the reference voltage VX than the voltage level of the output signal supplied to the load RL equal to the switching voltage + VBA boosted by the switching power supply unit 24. Next, the switching power supply unit 24 is controlled.

According to this embodiment, as shown in FIGS. 7A and 7B, the level + VBA of the switching voltage supplied to the first and second amplifiers can be adjusted according to the output signal. . As a result, the collector-emitter voltage VCE of the output transistors of the first and second amplifiers can always be kept substantially constant. Therefore, power loss inside the output transistor can be reduced, and highly efficient power amplification can be realized. Furthermore, since the power supply voltage has been boosted,
Operation control of the output transistor is facilitated.

As described above, in this embodiment, the lower voltage is clamped by using the non-linear addition circuit 44 and the second differential amplifier 36, so that the load RL is connected to the ground with respect to the ground. In this case, an AC signal as shown in FIG. 7C is applied, and the load RL is driven normally.

Therefore, even with a single power supply (VB), the dynamic range can be extremely widened to a maximum of 2 VCC (VCC is the maximum voltage that can be boosted). Then, the power supply voltage can be boosted by only a single boosting switching power supply.

Therefore, power consumption is small and high-efficiency power amplification can be realized, which is advantageous for miniaturization of the apparatus. In addition, as in the related art , since the device can be reduced in size and power consumption can be reduced, the power amplifying device of the present embodiment can be used for portable audio equipment and the like.

The method of driving the load RL is as follows.
A configuration shown in FIG. 9 may be used instead of the BTL driving described above. This will be described below.

The bases of NPN transistors Q13 and Q14 are connected to the two input terminals 66 and 68, respectively. The collectors of the transistors Q13 and Q14 are both connected to a switching power supply (+ VBA). On the other hand, the switch SW10 is connected to the emitter of the transistor Q13, and the switch SW14 is connected to the emitter of the transistor Q14. The emitters of the transistors Q13 and Q14 are respectively connected to the load RL.

When a positive half-wave signal is supplied to the input terminal 66, the switch SW10 is turned off and the switch SW11 is turned on. Then, a current flows from the emitter of the transistor Q13 to the switch SW11. on the other hand,
When the positive half-wave signal is supplied to the input terminal 68, the switch SW10 is turned on and the switch SW11 is turned off. As a result, a current flows from the emitter of the transistor Q14 to the switch SW10.

As described above, even when the load RL is driven by a half-wave signal, the power supply voltage can be constantly raised with only a single boosting type switching power supply, as described above. It is possible to realize a power amplifier with high power efficiency.

[0094]

As described above, in the power amplifying apparatus according to the present invention, the boosting switching power supply section is provided to boost the power supply voltage , amplify the input signal and output the amplified signal to the output terminal.
A first amplifier for outputting, and an output terminal for inverting and amplifying the input signal
And a second amplifier for output to the load
Configuration capable of BTL drive for generating phase AC output signal
And

[0095]

[0096]

With this configuration, it is possible to widen the dynamic range, increase the power that can be supplied by a single power supply, and reduce the power loss of the power amplifying device. This is advantageous.

Further, in addition to the BTL drive, a differential amplifier for outputting predetermined signals having inverted polarities to each other and a nonlinear addition circuit are provided for the first amplifier and the second amplifier. The output signal of one of the first and second amplifiers is clamped according to the result of the non-linear addition process.

Thus, only one signal path in the device is required,
With only a single step-up switching power supply, the power supply voltage can be constantly raised. Therefore, power consumption is further reduced, and highly efficient power amplification can be realized.

[Brief description of the drawings]

FIG. 1 is a schematic circuit configuration diagram of a power amplifying device according to a related art of the present invention.

FIG. 2 is a diagram illustrating an output state when the power amplifying device of FIG. 1 is used.

FIG. 3 is a schematic circuit configuration diagram of a power amplifier according to an embodiment of the present invention.

4 is a schematic circuit configuration diagram of a first differential amplifier 40, a first amplifier 30, and a second amplifier 32 of FIG.

FIG. 5 shows a non-linear addition circuit 44 and a second differential amplifier 3 shown in FIG.
6 is a schematic circuit configuration diagram of FIG.

FIG. 6 is a diagram illustrating the operation of the non-linear addition circuit 44 in FIG. 5;

FIG. 7 is a diagram illustrating an output state when the power amplifying device of the embodiment is used.

8 is a diagram illustrating a circuit configuration example of an adding circuit 42 in FIG. 3;

FIG. 9 is a diagram illustrating a circuit configuration of a power amplifying device having a configuration different from that of FIG. 3;

FIG. 10 is a schematic circuit configuration diagram of a conventional power amplifier.

11 is a diagram illustrating an output state when the power amplifying device of FIG. 10 is used.

[Explanation of symbols]

 Reference Signs List 10 amplifier 12, 14, 34 power supply control unit 16 signal source 20, 24 step-up switching power supply unit 22 inverting step-up switching power supply unit 30 first amplifier 32 second amplifier 36 second differential amplifier 40 first differential amplifier 42 addition Circuit 44 Non-linear addition circuit

──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int. Cl. ⁷ , DB name) H03F 1/00-3/72 H02M 3/00-3/44

Claims (2)

(57) [Claims] A step-up switching power supply unit for generating a power supply voltage by boosting an output voltage of a power supply in response to a predetermined control signal; A first and a second amplifier, an addition circuit for adding the output signals of the first and second amplifiers, a first input to which an output terminal of the switching power supply is connected, and an output terminal of the addition circuit for setting a reference voltage. And a second input connected to the switching power supply unit by comparing the signals applied to the first and second inputs and applying an output signal corresponding to the difference to the switching power supply unit as the control signal A first input terminal having a pair of input terminals, a pair of differential output terminals connected to the inputs of the first and second amplifiers, and a common input terminal for determining a DC level of the pair of differential output terminals. a differential amplifier, linear And a calculation part and the clamp part, as well as adding the output voltage of the first and second amplifier, in case the absolute value of the difference of the output voltage is within a predetermined value pressurized by the linear addition unit
The calculation result is output, and the absolute value of the output voltage is equal to or greater than a predetermined value.
And comparison of non <br/> linear addition circuit adding result is output by the clamp portion when the output signal and the reference voltage of said non-linear adder circuit,
And a comparison circuit for applying an output signal corresponding to the difference to the common input terminal. 2. The power amplifying device according to claim 1, wherein the step-up switching power supply unit includes: a coil having one end connected to a power supply; and a first power supply connected in series to the other end of the coil. A diode that allows a forward current to flow toward the second amplifier; a capacitor connected to the output side of the diode; and a switch having one end connected to a connection point between the coil and the diode and the other end grounded. And a switch that is turned on / off in response to a control signal from the power supply control unit.