JP3174438B2 - Plasma CVD method - Google Patents
Plasma CVD methodInfo
- Publication number
- JP3174438B2 JP3174438B2 JP19221593A JP19221593A JP3174438B2 JP 3174438 B2 JP3174438 B2 JP 3174438B2 JP 19221593 A JP19221593 A JP 19221593A JP 19221593 A JP19221593 A JP 19221593A JP 3174438 B2 JP3174438 B2 JP 3174438B2
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- Prior art keywords
- frequency power
- film
- mounting table
- reaction chamber
- plasma discharge
- Prior art date
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Description
【０００１】[0001]
【産業上の利用分野】本発明は、半導体装置の層間絶縁
膜や保護膜等の形成に適したプラズマＣＶＤ方法に関す
るものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a plasma CVD method suitable for forming an interlayer insulating film and a protective film of a semiconductor device.
【０００２】[0002]
【従来の技術】半導体装置の層間絶縁膜や保護膜の形成
に、プラズマＣＶＤ法を適用することが多い。層間絶縁
膜や保護膜の素材としては、Ｓi Ｎ（窒化珪素）や、Ｓ
i Ｏ2（酸化珪素）や、Ｓi ＯＮ（オキシ窒化珪素）等
が用いられる。とくに多層配線における層間絶縁膜には
平坦性が要求されるので、有機シランガスを用いたＳi
Ｏ2 膜が多用されている。2. Description of the Related Art In many cases, a plasma CVD method is applied to formation of an interlayer insulating film and a protective film of a semiconductor device. Materials for the interlayer insulating film and the protective film include SiN (silicon nitride) and S
i O 2 (silicon oxide) or, Si ON (silicon oxynitride), or the like is used. In particular, since the interlayer insulating film in the multilayer wiring is required to have flatness, Si using an organic silane gas is used.
O 2 films are frequently used.
【０００３】従来のプラズマＣＶＤ装置の構成を示す図
３において、反応室１は反応ガス導入口２および排気口
３を有し、かつ、接地されている。発振周波数１３．５
６ＭＨz の高周波発振器４からマッチングチューナ５、
フィルタおよび高周波電力供給部６を通じてプラズマ放
電用電極７に高周波電力が供給される。反応ガス導入口
２に連通した反応ガス導入管８を通じて供給された反応
ガスは、電極７に設けられた多数のガス噴出孔９から反
応室１内にシャワー状に分散して噴出する。[0003] In FIG. 3 showing the configuration of a conventional plasma CVD apparatus, a reaction chamber 1 has a reaction gas inlet 2 and an exhaust port 3 and is grounded. Oscillation frequency 13.5
6MHz high frequency oscillator 4 to matching tuner 5,
High frequency power is supplied to the plasma discharge electrode 7 through the filter and the high frequency power supply unit 6. The reaction gas supplied through the reaction gas introduction pipe 8 communicating with the reaction gas introduction port 2 is dispersed and ejected into the reaction chamber 1 from a number of gas ejection holes 9 provided in the electrode 7.
【０００４】反応室１と電極７とはアルミナ製絶縁リン
グ１０で絶縁されており、反応ガス導入管８と電極７と
はアルミナ製絶縁管１１で絶縁されている。被加工物半
導体たる基板１２は基板載置台１３上に載置されてお
り、基板載置台１３および基板１２を加熱するヒータブ
ロック１４には、ヒータおよび熱電対（図示せず）が埋
入されている。ヒータブロック１４と反応室１との間に
は、熱的絶縁のためのアルミナ製絶縁リング１５が設け
られている。The reaction chamber 1 and the electrode 7 are insulated by an insulating ring 10 made of alumina, and the reaction gas introduction pipe 8 and the electrode 7 are insulated by an insulating pipe 11 made of alumina. A substrate 12, which is a semiconductor to be processed, is mounted on a substrate mounting table 13. A heater and a thermocouple (not shown) are embedded in the substrate mounting table 13 and a heater block 14 for heating the substrate 12. I have. An alumina insulating ring 15 for thermal insulation is provided between the heater block 14 and the reaction chamber 1.
【０００５】発振周波数４５０ＫＨz の低周波発振器１
６からマッチングチューナ１７、フィルタおよび低周波
電力供給部１８を通じて基板載置台１３に低周波電力が
供給される。アルミナ製絶縁リング１９が０リングとと
もに反応室１を気密に保持しており、電極７、絶縁リン
グ１０およびヒータブロック１４の各積層部にも気密用
の０リングシール（図示せず）が組み込まれている。２
０は０リングが高温となるのを抑制するために設けられ
た冷却水流通用溝を示す。基板１２と電極７との間隔は
２０mmである。A low frequency oscillator 1 having an oscillation frequency of 450 KHz
From 6, low frequency power is supplied to the substrate mounting table 13 through a matching tuner 17, a filter and a low frequency power supply unit 18. An alumina insulating ring 19 holds the reaction chamber 1 airtight together with the O-ring, and an airtight O-ring seal (not shown) is incorporated in each laminated portion of the electrode 7, the insulating ring 10 and the heater block 14. ing. 2
Reference numeral 0 denotes a groove for cooling water circulation provided for suppressing the temperature of the O-ring from becoming high. The distance between the substrate 12 and the electrode 7 is 20 mm.
【０００６】このように構成されたプラズマＣＶＤ装置
を用いてＴＥＯＳ（Ｔetra ＥthylＯrtho Ｓilicate
）ガスを使用したＳi Ｏ2 膜を形成する場合、まず、
基板１２をヒータブロック１４によって約４００℃の温
度に加熱する。つぎに、反応ガス導入管８からガス噴出
孔９を通じてＴＥＯＳガスを１００ＳＣＣＭ、そして、
Ｏ2 （酸素）ガスを２００ＳＣＣＭ噴出させる。この状
態での反応室１内の圧力は約０．８Ｔorr である。[0006] A TEOS (Tetra Ethyl Ortho Silicate) is manufactured by using the plasma CVD apparatus configured as described above.
) When forming a SiO 2 film using a gas, first,
The substrate 12 is heated to a temperature of about 400 ° C. by the heater block 14. Next, TEOS gas is supplied at a rate of 100 SCCM from the reaction gas introduction pipe 8 through the gas ejection hole 9, and
O 2 (oxygen) gas is ejected at 200 SCCM. The pressure in the reaction chamber 1 in this state is about 0.8 Torr.
【０００７】高周波電力供給部６を通じてプラズマ放電
用電極７に１３．５６ＭＨz の高周波電力（２Ｗ／ｃ
m2）を供給する一方、基板載置台１３に対して４５０Ｋ
Ｈz の低周波電力（１Ｗ／ｃm2）を供給する。高周波電
力および低周波電力をともに供給することによってプラ
ズマ放電が起こり、ＴＥＯＳガスおよびＯ2 ガスはプラ
ズマのエネルギによって分解され、ＴＥＯＳ分子の中間
体および活性酸素が生成される。この活性酸素はＴＥＯ
Ｓ分子の中間体に分解するための触媒的役割りを果た
し、中間体は基板１２上に到達し、プラズマからのイオ
ン衝撃およびヒータブロック１４から供給される熱エネ
ルギによって分解・脱離反応が起こり、基板１２上にＳ
i Ｏ2 膜が堆積される。A high frequency power of 13.56 MHz (2 W / c) is applied to the plasma discharge electrode 7 through the high frequency power supply unit 6.
m 2 ) while supplying 450 K to the substrate mounting table 13.
Provides low frequency power of 1 Hz (1 W / cm 2 ). By supplying both high-frequency power and low-frequency power, plasma discharge occurs, and TEOS gas and O 2 gas are decomposed by the energy of the plasma to generate an intermediate of TEOS molecules and active oxygen. This active oxygen is TEO
The catalyst plays a catalytic role for decomposing the S molecule into an intermediate, and the intermediate reaches the substrate 12, and a decomposition / desorption reaction occurs by ion bombardment from the plasma and heat energy supplied from the heater block 14. , S on the substrate 12
i O 2 film is deposited.
【０００８】[0008]
【発明が解決しようとする課題】しかし、このような堆
積によって配線の表面上に形成されたＴＥＯＳ膜は、配
線の線幅および線間隔がそれぞれ例えば０．６μｍの場
合、段差被覆率は約４５％と低い値を示す。ここで段差
被覆率とは、図４に示すように配線２１を覆う膜２２の
うち、配線２１の上面上の膜厚をａ、配線２１の側面上
の膜厚をｂとするとき、ｂ／ａ×１００（％）の式で表
される値である。However, the TEOS film formed on the surface of the wiring by such deposition has a step coverage of about 45 when the line width and the line interval of the wiring are each 0.6 μm, for example. % Shows a low value. Here, the step coverage is defined as b / b when the film thickness on the upper surface of the wiring 21 and the film thickness on the side surface of the wiring 21 in the film 22 covering the wiring 21 as shown in FIG. It is a value represented by the formula of a × 100 (%).
【０００９】多層配線における層間絶縁膜には平坦性が
要求されるので、ＴＥＯＳ膜を堆積形成したのち、バイ
アススパッタによるエッチバックや、レジスト膜塗布に
よるエッチバックなどの、さまざまな平坦化方法が試み
られている。しかし、平坦化のための処理工程は繁雑で
あるし、また、微細な配線上に堆積形成される膜は、配
線間にボイド（空隙）を生じやすい。Since a flatness is required for an interlayer insulating film in a multilayer wiring, various flattening methods such as etch back by bias sputtering and etch back by coating a resist film after forming a TEOS film are attempted. Have been. However, processing steps for planarization are complicated, and a film deposited and formed on a fine wiring is likely to generate voids (voids) between the wirings.
【００１０】したがって本発明の目的は、段差被覆率の
高い平坦な膜を堆積形成することのできるプラズマＣＶ
Ｄ方法を提供することにある。Accordingly, an object of the present invention is to provide a plasma CV capable of depositing and forming a flat film having a high step coverage.
D method.
【００１１】[0011]
【課題を解決するための手段】本発明は上述した目的を
達成するために、基板載置台とプラズマ放電用電極との
間隔をＨ1 、反応室内の圧力をＰ1 にそれぞれ設定し、
プラズマ放電用電極に高周波電力を供給すると共に基板
載置台に２００ＫＨｚ〜１ＭＨｚの低周波電力を供給す
る第１段階と、基板載置台とプラズマ放電用電極との間
隔をＨ2 、反応室内の圧力をＰ2 にそれぞれ設定し、プ
ラズマ放電用電極に電力を供給せず、基板載置台のみに
２００ＫＨｚ〜１ＭＨｚの低周波電力を供給する第２段
階とを備え、第１および第２段階を組み合わせて基板上
に膜を堆積させ、かつ前記Ｈ2 を１１ｍｍ以上、Ｐ1 を
３〜１０Ｔｏｒｒ、Ｐ2 を０．７Ｔｏｒｒ以下に設定す
ると共に、前記Ｈ1 をＨ2 より小の比較的小さい値に設
定したことを特徴とする。In order to achieve the above-mentioned object, the present invention sets the distance between the substrate mounting table and the electrode for plasma discharge to H 1 and the pressure in the reaction chamber to P 1 .
The first step of supplying high-frequency power to the electrode for plasma discharge and supplying low-frequency power of 200 KHz to 1 MHz to the substrate mounting table, the interval between the substrate mounting table and the electrode for plasma discharge being H 2 , and the pressure in the reaction chamber being reduced. respectively set to P 2, without supplying power to the plasma discharge electrode, only the substrate mounting table and a second step of supplying a low frequency power of 200kHz to 1MHz, by combining the first and second stage substrate depositing a film on, and the H 2 11 mm or more, it sets the P 1 3~10Torr, the P 2 below 0.7 Torr, the H 1 with the set H 2 to a relatively small value of the small It is characterized by the following.
【００１２】前記Ｈ1 が４〜６ｍｍであると好適であ
る。It is preferable that the H 1 is 4 to 6 mm.
【００１３】高周波電力はパルス波であってもよく、そ
の場合、デューティサイクルを０．３〜０．６に設定す
ることができる。The high frequency power may be a pulse wave, in which case the duty cycle can be set between 0.3 and 0.6.
【００１４】[0014]
【作用】本発明のプズマＣＶＤ方法においては、高周波
電力および低周波電力を併せ供給する第１段階での基板
載置台とプラズマ放電用電極との間隔Ｈ1 を例えば４〜
６mmと比較的小さい値に設定し、かつ、反応室内の圧力
Ｐ1 を例えば３〜１０Ｔorr と比較的大きい値に設定す
るので、プラズマが閉じこもり、密度の高いプラズマを
生成させることができる。また、低周波電力（２００Ｋ
Ｈz 〜１ＭＨz ）の周波数帯では、イオンは振動して基
板を叩くので、基板上に堆積された膜がバイアススパッ
タされる。したがって、高周波電力および低周波電力を
ともに供給する第１段階のほかに、低周波電力のみを供
給する第２段階を設けたことにより、イオンによってバ
イアススパッタされる度合が高まり、配線を覆う堆積膜
の段差被覆率を高めることができる。なお、配線の上面
上に堆積された膜は垂直に入射したイオンによってスパ
ッタされるが、配線の側面上に堆積された膜は垂直に入
射したイオンによってスパッタされにくい。In Puzuma CVD method of the present invention, the distance H 1 e.g. 4 to the substrate mounting table and a plasma discharge electrode in the first stage is supplied together RF power and low-frequency power
It was set to a relatively small value and 6 mm, and, since the set pressure P 1 in the reaction chamber for example to a relatively large value and 3～10Torr, plasma housebound, can be produced with a high density plasma. In addition, low frequency power (200K
In the frequency band (Hz to 1 MHz), the ions vibrate and strike the substrate, so that the film deposited on the substrate is bias-sputtered. Therefore, by providing the second stage for supplying only low-frequency power in addition to the first stage for supplying both high-frequency power and low-frequency power, the degree of bias sputtering by ions is increased, and the deposited film covering the wiring is provided. Can be increased. Note that the film deposited on the upper surface of the wiring is sputtered by vertically incident ions, but the film deposited on the side surface of the wiring is less likely to be sputtered by vertically incident ions.
【００１５】低周波電力のみによって膜を堆積する第２
段階において、反応室内の圧力Ｐ2を前記圧力Ｐ1 より
小の圧力Ｐ2 例えば０．７Ｔorr 以下に設定すると、基
板へのイオンの照射効果がより一層高まる。また、基板
載置台とプラズマ放電用電極との間隔Ｈ2 を前記間隔Ｈ
1 より大、例えば１１mm以上とすると、異常放電をひき
起こす危険を防止することができる。A second method of depositing a film using only low frequency power
In step, by setting the pressure P 2 in the reaction chamber below the small than the pressure P 1 pressure P 2 for example 0.7 Torr, even more enhanced irradiation effect of ions into the substrate. Further, the distance H 2 between the substrate mounting table and the electrode for plasma discharge is set to the distance H.
If it is larger than 1 , for example, 11 mm or more, it is possible to prevent a risk of causing abnormal discharge.
【００１６】さらに、高周波電力にパルス波を用いるこ
とによっては、低周波電力によるスパッタ効果が一層高
まるので、段差被覆率のより一層高い堆積膜を得ること
ができる。Further, by using a pulse wave for the high-frequency power, the sputtering effect by the low-frequency power is further enhanced, so that a deposited film having a higher step coverage can be obtained.
【００１７】[0017]
【参考例・実施例】つぎに、本発明の参考例を図面の参
照により説明する。Next, a reference example of the present invention will be described with reference to the drawings.
【００１８】図１に示すように、反応室１は反応ガス導
入口２および排気口３を有し、かつ、接地されている。
発振周波数１３．５６ＭＨz の高周波発振器４からマッ
チングチューナ５、フィルタおよび高周波電力供給部６
を通じてプラズマ放電用電極７に高周波電力が供給され
る。反応ガス導入口２に連通した反応ガス導入管８を通
じて供給された反応ガスは、プラズマ放電用電極７に設
けられた多数のガス噴出孔９から反応室１内に分散して
シャワー状に噴出する。反応室１と電極７とがアルミナ
製絶縁リング１０で絶縁され、反応ガス導入管８と電極
７とがアルミナ製絶縁管１１によって絶縁されている。As shown in FIG. 1, a reaction chamber 1 has a reaction gas inlet 2 and an exhaust port 3 and is grounded.
A high-frequency oscillator 4 having an oscillation frequency of 13.56 MHz, a matching tuner 5, a filter and a high-frequency power supply 6
High-frequency power is supplied to the electrode for plasma discharge 7 through the electrode. The reaction gas supplied through the reaction gas introduction pipe 8 communicating with the reaction gas introduction port 2 is dispersed into the reaction chamber 1 from a number of gas ejection holes 9 provided in the plasma discharge electrode 7 and ejected in the form of a shower. . The reaction chamber 1 and the electrode 7 are insulated by an alumina insulating ring 10, and the reaction gas introduction pipe 8 and the electrode 7 are insulated by an alumina insulating pipe 11.
【００１９】被加工物半導体たる基板１２を加熱するヒ
ータブロック１４に、ヒータおよび熱電対（図示せず）
が埋入されている。ヒータブロック１４と反応室１との
間に熱的絶縁のためのアルミナ製絶縁リング１５が設け
られている。また、発振周波数４５０ＫＨz の低周波発
振器１６からマッチングチューナ１７、フィルタおよび
低周波電力供給部１８を通じて基板載置台１３に低周波
電力が供給される。アルミナ製絶縁リング１９がＯリン
グとともに反応室１を気密に保持し、電極７および絶縁
リング１０の各積層部にも気密用の０リングシール（図
示せず）が組み込まれている。２０は０リングが高温と
なるのを抑制するために設けられた冷却水流通用溝を示
す。A heater and a thermocouple (not shown) are provided on a heater block 14 for heating a substrate 12 as a workpiece semiconductor.
Is embedded. An alumina insulating ring 15 is provided between the heater block 14 and the reaction chamber 1 for thermal insulation. Further, low frequency power is supplied from the low frequency oscillator 16 having an oscillation frequency of 450 KHz to the substrate mounting table 13 through the matching tuner 17, the filter and the low frequency power supply unit 18. An alumina insulating ring 19 keeps the reaction chamber 1 airtight together with the O-ring, and an airtight O-ring seal (not shown) is also incorporated in each laminated portion of the electrode 7 and the insulating ring 10. Reference numeral 20 denotes a cooling water circulation groove provided to suppress the temperature of the O-ring from becoming high.
【００２０】以上の構成は図３に示した従来の構成と同
様である。ただ、プラズマ放電用電極７を昇降自在に支
持する伸縮性筒状のベローズ２３が反応室１内に、Ｏリ
ングを用いて気密に設けられている。このため、基板載
置台１３とプラズマ放電用電極７との間隔を反応室１外
から調整することができる。図示を省略したが、反応ガ
ス導入管８と反応室１の外壁との間に支持具が設けら
れ、この支持具によってプラズマ放電用電極７と基板載
置台１３との間隔が所定値に保持されるようになってい
る。The above configuration is the same as the conventional configuration shown in FIG. However, an elastic tubular bellows 23 that supports the plasma discharge electrode 7 so as to be able to move up and down is provided in the reaction chamber 1 in an airtight manner using an O-ring. Therefore, the distance between the substrate mounting table 13 and the plasma discharge electrode 7 can be adjusted from outside the reaction chamber 1. Although not shown, a support is provided between the reaction gas introducing pipe 8 and the outer wall of the reaction chamber 1, and the distance between the plasma discharge electrode 7 and the substrate mounting table 13 is maintained at a predetermined value by the support. It has become so.
【００２１】このように構成されたプラズマＣＶＤ装置
を用いてＴＥＯＳ−ＳｉＯ2 膜を堆積形成する場合、基
板１２をヒータブロック１４によって約４００℃の温度
に加熱する。そして、ガス噴出孔９から反応室１内にＴ
ＥＯＳガスを１００ＳＣＣＭ、Ｏ2 ガスを２００ＳＣＣ
Ｍ噴出させる。この状態での反応室１内の圧力は６Ｔor
r に保たれる。When depositing and forming a TEOS-SiO 2 film by using the plasma CVD apparatus configured as described above, the substrate 12 is heated to a temperature of about 400 ° C. by the heater block 14. Then, T is introduced into the reaction chamber 1 from the gas ejection hole 9.
EOS gas 100 SCCM, O 2 gas 200 SCC
M erupt. In this state, the pressure in the reaction chamber 1 is 6 Torr.
r is kept.
【００２２】高周波電力供給部６を通じてプラズマ放電
用電極７に１３．５６ＭＨz の高周波電力（２Ｗ／ｃ
m2）を、そして、基板載置台１３に４５０ＫＨz の低周
波電力（１Ｗ／ｃm2）をそれぞれ供給し、プラズマ放電
を起こさせる。ＴＥＯＳガスおよびＯ2 ガスがプラズマ
のエネルギによって分散され、ＴＥＯＳ分子の中間体お
よび活性酸素が生成される。この活性酸素はＴＥＯＳ分
子の中間体に分解するための触媒的役割りを果たし、中
間体は基板１２上に到達し、プラズマからのイオン衝撃
および基板載置台１３からの熱エネルギによって分解・
脱離反応が起こり、基板１２上にＳｉＯ2 膜が堆積され
る。The high frequency power of 13.56 MHz (2 W / c) is applied to the plasma discharge electrode 7 through the high frequency power supply unit 6.
m 2 ), and a low frequency power (1 W / cm 2 ) of 450 KHz is supplied to the substrate mounting table 13 to cause plasma discharge. TEOS gas and O 2 gas are dispersed by the energy of the plasma, and an intermediate of TEOS molecules and active oxygen are generated. This active oxygen plays a catalytic role for decomposing into an intermediate of the TEOS molecule. The intermediate reaches the substrate 12 and is decomposed and decomposed by ion bombardment from the plasma and heat energy from the substrate mounting table 13.
A desorption reaction occurs, and an SiO 2 film is deposited on the substrate 12.
【００２３】図２は反応室１内の圧力を６Ｔorr に設定
し、プラズマ放電用電極７と基板載置台１３との間隔を
変化させたときの段差被覆率を示すもので、前記間隔が
狭いほど段差被覆率が高くなる。ただし、前記間隔が４
mm未満であると異常放電を起こしやすくなる。FIG. 2 shows the step coverage when the pressure in the reaction chamber 1 is set to 6 Torr and the distance between the plasma discharge electrode 7 and the substrate mounting table 13 is changed. The step coverage increases. However, the interval is 4
If it is less than mm, abnormal discharge is likely to occur.
【００２４】プラズマ放電用電極７と基板載置台１３と
の間隔を５mmに設定し、プラズマ放電用電極７に１３．
５６ＭＨz の高周波電力を、そして、基板載置台１３に
４５０ＫＨz の低周波電力をそれぞれ供給し、所望膜厚
の約半分に相当する厚さに膜を堆積形成し、その後、低
周波電力のみの供給に切り替えて残余膜厚相当分の膜を
堆積形成したところ、全堆積膜の段差被覆率が約６６％
となった。この値は、高周波電力および低周波電力をと
もに供給して全堆積膜を形成した従来の段差被覆率の約
４５％に比べ格段に高いことがわかる。The distance between the plasma discharge electrode 7 and the substrate mounting table 13 is set to 5 mm.
A high-frequency power of 56 MHz and a low-frequency power of 450 KHz are supplied to the substrate mounting table 13, respectively, to deposit a film to a thickness corresponding to about half of the desired film thickness, and then to supply only the low-frequency power. When a film equivalent to the remaining film thickness was deposited and formed by switching, the step coverage of all deposited films was about 66%.
It became. It can be seen that this value is much higher than the conventional step coverage of about 45%, in which both high-frequency power and low-frequency power are supplied to form the entire deposited film.
【００２５】このように本参考例では、プラズマ放電用
電極７と基板載置台１３との間隔を５mmに、そして、反
応室１内の圧力を６Ｔorr にそれぞれ設定し、プラズマ
放電用電極７に高周波電力を、そして、基板載置台１３
に低周波電力をそれぞれ供給して堆積膜を形成したの
ち、低周波電力のみの供給に切り替えて堆積膜を形成し
たことにより、配線を覆う堆積膜の段差被覆率を格段に
高めることができた。As described above, in this embodiment, the distance between the plasma discharge electrode 7 and the substrate mounting table 13 is set to 5 mm, the pressure in the reaction chamber 1 is set to 6 Torr, and the high frequency is applied to the plasma discharge electrode 7. Power and the substrate platform 13
After supplying a low-frequency power to each of the layers to form a deposited film, the supply of the low-frequency power alone was switched to form a deposited film, thereby significantly increasing the step coverage of the deposited film covering the wiring. .
【００２６】この参考例では、反応室１内の圧力を６Ｔ
orr としたが、３〜１０Ｔorr の範囲内であれば異常放
電を起こすことなく上述と同様の効果を得ることができ
る。電極７と基板載置１３との間隔は４〜６mmの範囲内
で選択し得ることも実験の結果判明した。In this reference example, the pressure in the reaction chamber 1 is set to 6T
However, if it is within the range of 3 to 10 Torr, the same effect as described above can be obtained without causing abnormal discharge. Experiments have also revealed that the distance between the electrode 7 and the substrate mounting 13 can be selected within the range of 4 to 6 mm.
【００２７】つぎに、本発明の第１の実施例を説明す
る。ここで使用したプラズマＣＶＤ装置は図１に示した
構成のものと同じである。参考例と異なるところは、低
周波電力のみを供給して堆積膜を形成する第２段階での
反応室１内圧力を０．５Ｔorrに、そして、プラズマ放
電用電極７と基板載置台１３との間隔を２０mmにそれぞ
れ設定した点のみである。Next, a first embodiment of the present invention will be described. The plasma CVD apparatus used here is the same as that of the configuration shown in FIG. The difference from the reference example is that the pressure in the reaction chamber 1 in the second stage of forming a deposited film by supplying only low-frequency power is 0.5 Torr, and the pressure between the plasma discharge electrode 7 and the substrate mounting table 13 is reduced. The only difference is that the interval was set to 20 mm.
【００２８】基板載置台１３をヒータブロック１４によ
って約４００℃の温度に加熱し、ガス噴出孔９を通じて
反応室１内にＴＥＯＳガスを１００ＳＣＣＭ、Ｏ2 ガス
を２００ＳＣＣＭ噴出させる。高周波電力供給部６を通
じてプラズマ放電用電極７に１３．５６ＭＨz の高周波
電力（２Ｗ／ｃm2）を供給する一方、基板載置台１３に
４５０ＫＨz の低周波電力（１Ｗ／ｃm2）を供給する。
この段階では、基板載置台１３とプラズマ放電用電極７
との間隔を５mmに、そして、反応室１内の圧力を６Ｔor
r にそれぞれ設定し、所望膜厚の約半分に相当する厚さ
の堆積膜を形成した。また、残余の膜厚相当分の厚さの
膜を形成する第２段階では、基板載置台１３とプラズマ
放電用電極７との間隔を２０mmに、そして、反応室１内
の圧力を０．５Ｔorr にそれぞれ設定して低周波電力の
みを供給した。両段階によって得られた全堆積膜の段差
被覆率は約７０％と非常に高い値を示した。The substrate mounting table 13 is heated to a temperature of about 400 ° C. by the heater block 14, and 100 SCCM of TEOS gas and 200 SCCM of O 2 gas are injected into the reaction chamber 1 through the gas injection holes 9. A high frequency power (2 W / cm 2 ) of 13.56 MHz is supplied to the plasma discharge electrode 7 through the high frequency power supply unit 6, and a low frequency power (1 W / cm 2 ) of 450 kHz is supplied to the substrate mounting table 13.
At this stage, the substrate mounting table 13 and the plasma discharge electrode 7
5 mm, and the pressure in the reaction chamber 1 is 6 Torr.
r, and a deposited film having a thickness corresponding to about half of the desired film thickness was formed. In the second step of forming a film having a thickness corresponding to the remaining film thickness, the distance between the substrate mounting table 13 and the plasma discharge electrode 7 is set to 20 mm, and the pressure in the reaction chamber 1 is set to 0.5 Torr. And only low frequency power was supplied. The step coverage of all the deposited films obtained by both steps showed a very high value of about 70%.
【００２９】この実施例では、低周波電力のみを供給す
る段階での反応室内圧力を０．５Ｔorr としたが、０．
２〜０．７Ｔorr の範囲内であれば同様の効果を得るこ
とができる。また、プラズマ放電用電極７と基板載置台
１３との間隔は２０mmに限定されず、１１mm以上であれ
ば上述と同様の効果を得ることができる。In this embodiment, the pressure in the reaction chamber at the stage of supplying only low-frequency power is set to 0.5 Torr.
A similar effect can be obtained within the range of 2 to 0.7 Torr. Further, the distance between the plasma discharge electrode 7 and the substrate mounting table 13 is not limited to 20 mm, and the same effect as described above can be obtained if the distance is 11 mm or more.
【００３０】上述した実施例では、低周波電力の周波数
を４５０ＫＨz としたが、イオンが振動を起こし得る周
波数（２００ＫＨz 〜１ＭＨz ）から選択できる。ま
た、高周波電力および低周波電力を供給する第１段階
と、低周波電力のみを供給する第２段階とはそれぞれ１
回に限定されるものでなく、処理条件を変えるなどして
適数回に組み合わせることができる。In the above-described embodiment, the frequency of the low-frequency power is 450 KHz. However, the frequency can be selected from frequencies (200 KHz to 1 MHz) at which ions can vibrate. The first stage for supplying high-frequency power and low-frequency power and the second stage for supplying only low-frequency power are each 1
The combination is not limited to the number of times, and can be combined into an appropriate number of times by changing the processing conditions.
【００３１】本発明の第２の実施例においては、プラズ
マ放電用電極７に供給する１３．５６ＭＨz の高周波電
力にパルス波のものを用いる。使用したプラズマＣＶＤ
装置は図１に示したものと同様である。この場合、基板
１２をヒータブロック１４によって約４００℃の温度に
加熱し、ガス噴出孔９を通じて反応室１内にＴＥＯＳガ
スを１００ＳＣＣＭ、Ｏ2 ガスを２００ＳＣＣＭ噴出さ
せる。プラズマ放電用電極７に１３．５６ＭＨz のパル
ス波高周波電力（２Ｗ／ｃm2）を供給する。この高周波
電力のデューティサイクル（オン時間／（オン時間＋オ
フ時間））は０．５とした。基板載置台１３には４５０
ＫＨz の低周波電力（１Ｗ／ｃm2）を供給する。In the second embodiment of the present invention, a 13.56 MHz high frequency power supplied to the plasma discharge electrode 7 has a pulse wave. Plasma CVD used
The device is similar to that shown in FIG. In this case, the substrate 12 is heated to a temperature of about 400 ° C. by the heater block 14, and 100 SCCM of TEOS gas and 200 SCCM of O 2 gas are ejected into the reaction chamber 1 through the gas ejection holes 9. 13.56 MHz pulse wave high frequency power (2 W / cm 2 ) is supplied to the plasma discharge electrode 7. The duty cycle (on time / (on time + off time)) of the high frequency power was set to 0.5. 450 on the substrate mounting table 13
Provides KHz low frequency power (1 W / cm 2 ).
【００３２】第１段階での基板載置台１３とプラズマ放
電用電極７との間隔は５mmに、そして、反応室１内の圧
力は６Ｔorr にそれぞれ設定した。１３．５６ＭＨz の
パルス波高周波電力および４５０ＫＨz の低周波電力を
ともに供給して、所望膜厚の約半分に相当する厚さの膜
を堆積形成した。第２段階では、残余の膜厚相当分の厚
さの膜を、低周波電力のみを供給して堆積形成した。得
られた膜の段差被覆率は７２％に達した。In the first stage, the distance between the substrate mounting table 13 and the plasma discharge electrode 7 was set to 5 mm, and the pressure in the reaction chamber 1 was set to 6 Torr. A pulse wave high frequency power of 13.56 MHz and a low frequency power of 450 KHz were both supplied to deposit a film having a thickness corresponding to about half of the desired film thickness. In the second stage, a film having a thickness equivalent to the remaining film thickness was deposited by supplying only low-frequency power. The step coverage of the obtained film reached 72%.
【００３３】このように、ブラズマ放電用電極７に供給
する高周波電力をパルス波にすることによって、配線を
覆う堆積膜の段差被覆率をさらに高め得ることがわか
る。Thus, it can be seen that the step coverage of the deposited film covering the wiring can be further increased by making the high frequency power supplied to the plasma discharge electrode 7 a pulse wave.
【００３４】高周波電力のパルス波のデューティサイク
ルは０．５に限定されず、０．３〜０．６の範囲から選
択することができる。The duty cycle of the high-frequency power pulse wave is not limited to 0.5, but may be selected from a range of 0.3 to 0.6.
【００３５】[0035]
【発明の効果】以上のように本発明によると、堆積膜に
対するイオン照射効果を高めるものであり、複雑な処理
工程を設けることなく段差被覆率の高い堆積膜を形成す
ることができる。As described above, according to the present invention, the ion irradiation effect on the deposited film is enhanced, and a deposited film having a high step coverage can be formed without providing a complicated processing step.
【図１】プラズマＣＶＤ装置の構成を示す側断面図。FIG. 1 is a side sectional view showing a configuration of a plasma CVD apparatus.
【図２】段差被覆率特性図。FIG. 2 is a step coverage characteristic diagram.
【図３】従来のプラズマＣＶＤ装置の構成を示す側断面
図。FIG. 3 is a side sectional view showing a configuration of a conventional plasma CVD apparatus.
【図４】段差被覆率の説明図。FIG. 4 is an explanatory diagram of a step coverage.
１ 反応室 ７ プラズマ放電用電極 １３ 基板載置台 １４ ヒータプロック １８ 低周波電力供給部 ２２ ベローズ Reference Signs List 1 reaction chamber 7 electrode for plasma discharge 13 substrate mounting table 14 heater block 18 low frequency power supply section 22 bellows
───────────────────────────────────────────────────── フロントページの続き (72)発明者 宝珍 隆三 大阪府門真市大字門真1006番地 松下電 器産業株式会社内 (56)参考文献 特開 平１−216532（ＪＰ，Ａ) 特開 昭54−59878（ＪＰ，Ａ) 特開 平４−49620（ＪＰ，Ａ) 特開 平２−130924（ＪＰ，Ａ) 特開 平３−259512（ＪＰ，Ａ) 実開 昭59−2132（ＪＰ，Ｕ) (58)調査した分野(Int.Cl.7，ＤＢ名) H01L 21/205 H01L 21/31 H01L 21/3205 ────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Ryuzo Hojin 1006 Kazuma, Kadoma, Osaka Prefecture Inside Matsushita Electric Industrial Co., Ltd. (56) References JP-A-1-216532 (JP, A) JP-A-59878 (JP, A) JP-A-4-49620 (JP, A) JP-A-2-130924 (JP, A) JP-A-3-259512 (JP, A) Japanese Utility Model Laid-Open No. 59-2132 (JP, U) (58) Fields surveyed (Int. Cl. 7 , DB name) H01L 21/205 H01L 21/31 H01L 21/3205
Claims (4)
隔をＨ1 、反応室内の圧力をＰ1 にそれぞれ設定し、プ
ラズマ放電用電極に高周波電力を供給すると共に基板載
置台に２００ＫＨｚ〜１ＭＨｚの低周波電力を供給する
第１段階と、基板載置台とプラズマ放電用電極との間隔
をＨ 2 、反応室内の圧力をＰ 2 にそれぞれ設定し、プラ
ズマ放電用電極に電力を供給せず、基板載置台のみに２
００ＫＨｚ〜１ＭＨｚの低周波電力を供給する第２段階
とを備え、第１および第２段階を組み合わせて基板上に
膜を堆積させ、かつ前記Ｈ 2 を１１ｍｍ以上、Ｐ 1 を３
〜１０Ｔｏｒｒ、Ｐ 2 を０．７Ｔｏｒｒ以下に設定する
と共に、前記Ｈ 1 をＨ 2 より小の比較的小さい値に設定
したことを特徴とするプラズマＣＶＤ方法。1. An interval between a substrate mounting table and a plasma discharge electrode is set to H 1 , a pressure in a reaction chamber is set to P 1 , high frequency power is supplied to the plasma discharge electrode, and 200 KHz to 1 MHz is applied to the substrate mounting table. First stage for supplying low-frequency power, and the distance between the substrate mounting table and the electrode for plasma discharge
Is set to H 2 , and the pressure in the reaction chamber is set to P 2 , and power is not supplied to the electrode for plasma discharge.
A second step of supplying a low-frequency power of 00 KHz to 1 MHz, depositing a film on a substrate by combining the first and second steps , and setting H 2 to 11 mm or more and P 1 to 3
~10Torr, to set the P 2 below 0.7Torr
Together, setting the H 1 to a relatively small value of less than H 2
Plasma CVD method characterized by the.
プラズマＣＶＤ方法。2. The plasma CVD method according to claim 1 , wherein H 1 is 4 to 6 mm .
とする請求項１または２記載のプラズマＣＶＤ方法。3. The plasma CVD method according to claim 1, wherein the high frequency power is a pulse wave.
３〜０．６であることを特徴とする請求項３記載のプラ
ズマＣＶＤ方法。4. A high frequency power duty cycle of 0.
4. The plasma CVD method according to claim 3, wherein the ratio is 3 to 0.6.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP19221593A JP3174438B2 (en) | 1993-08-03 | 1993-08-03 | Plasma CVD method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP19221593A JP3174438B2 (en) | 1993-08-03 | 1993-08-03 | Plasma CVD method |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0745542A JPH0745542A (en) | 1995-02-14 |
| JP3174438B2 true JP3174438B2 (en) | 2001-06-11 |
Family
ID=16287581
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP19221593A Expired - Fee Related JP3174438B2 (en) | 1993-08-03 | 1993-08-03 | Plasma CVD method |
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| Country | Link |
|---|---|
| JP (1) | JP3174438B2 (en) |
Families Citing this family (19)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5900103A (en) | 1994-04-20 | 1999-05-04 | Tokyo Electron Limited | Plasma treatment method and apparatus |
| JPH0955376A (en) * | 1995-08-15 | 1997-02-25 | Sony Corp | Plasma cvd method |
| WO1998033362A1 (en) * | 1997-01-29 | 1998-07-30 | Tadahiro Ohmi | Plasma device |
| US6024044A (en) * | 1997-10-09 | 2000-02-15 | Applied Komatsu Technology, Inc. | Dual frequency excitation of plasma for film deposition |
| US7223676B2 (en) * | 2002-06-05 | 2007-05-29 | Applied Materials, Inc. | Very low temperature CVD process with independently variable conformality, stress and composition of the CVD layer |
| US7294563B2 (en) | 2000-08-10 | 2007-11-13 | Applied Materials, Inc. | Semiconductor on insulator vertical transistor fabrication and doping process |
| US7292428B2 (en) | 2005-04-26 | 2007-11-06 | Applied Materials, Inc. | Electrostatic chuck with smart lift-pin mechanism for a plasma reactor |
| US8673080B2 (en) | 2007-10-16 | 2014-03-18 | Novellus Systems, Inc. | Temperature controlled showerhead |
| US20090260571A1 (en) * | 2008-04-16 | 2009-10-22 | Novellus Systems, Inc. | Showerhead for chemical vapor deposition |
| US8382941B2 (en) * | 2008-09-15 | 2013-02-26 | Micron Technology, Inc. | Plasma reactor with adjustable plasma electrodes and associated methods |
| JP5543116B2 (en) * | 2009-01-29 | 2014-07-09 | 株式会社半導体エネルギー研究所 | Semiconductor device |
| JP5643528B2 (en) * | 2009-03-30 | 2014-12-17 | 東京エレクトロン株式会社 | Substrate processing equipment |
| US9034142B2 (en) | 2009-12-18 | 2015-05-19 | Novellus Systems, Inc. | Temperature controlled showerhead for high temperature operations |
| KR101246170B1 (en) * | 2011-01-13 | 2013-03-25 | 국제엘렉트릭코리아 주식회사 | Injection member used in manufacturing semiconductor device and plasma processing apparatus having the same |
| KR101937115B1 (en) | 2011-03-04 | 2019-01-09 | 노벨러스 시스템즈, 인코포레이티드 | Hybrid ceramic showerhead |
| US10741365B2 (en) | 2014-05-05 | 2020-08-11 | Lam Research Corporation | Low volume showerhead with porous baffle |
| US10378107B2 (en) | 2015-05-22 | 2019-08-13 | Lam Research Corporation | Low volume showerhead with faceplate holes for improved flow uniformity |
| US10023959B2 (en) | 2015-05-26 | 2018-07-17 | Lam Research Corporation | Anti-transient showerhead |
| US10533251B2 (en) | 2015-12-31 | 2020-01-14 | Lam Research Corporation | Actuator to dynamically adjust showerhead tilt in a semiconductor processing apparatus |
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1993
- 1993-08-03 JP JP19221593A patent/JP3174438B2/en not_active Expired - Fee Related
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| JPH0745542A (en) | 1995-02-14 |
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