JP3173466B2 - Logic simulation waveform display system - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a logic simulation, particularly an HDL simulation using a hardware description language such as VHDL or Verilog-HDL. The present invention relates to a logic simulation waveform display system capable of displaying waveforms in various display formats such as scatter display.

[0002]

2. Description of the Related Art A conventional logic circuit simulation waveform display device is disclosed in, for example, Japanese Utility Model Laid-Open No. 03-35487.
In this publication, the change information of the output signal obtained by the simulation operation means for simulating the logic circuit is stored in the simulation result holding means, and the stored change information is converted into a waveform to be displayed in a step by the simulation result waveform display means. It is disclosed that the time is displayed on a device and the time of the change point of each displayed signal waveform is displayed by a change point time display means. Further, Japanese Patent Application Laid-Open No. H03-758
In Japanese Patent Publication No. 74, if an output signal having an undefined value is specified,
It is disclosed that an element in a logic circuit is automatically followed in sequence from an output side and an occurrence source is pursued.

However, most of the waveform display in the conventional logic simulator generally displays a logic waveform or a numerical value of "low" or "high" level as it is. Some models, such as ModelSim, an HDL simulator from Model Technology, can display numerical values as multi-level waveforms.

[0004]

However, the conventional logic simulator and its waveform display function have the following problems. A first problem is that in design verification of a logic LSI, a multi-bit signal interfacing with a D / A converter or a value of a signal processing circuit such as an integrating circuit takes an intended numerical value, and the circuit is functionally correct. That is, it cannot be visually determined whether or not there is. To determine whether the function of the circuit under test is correct, it is necessary to analyze the output multi-bit logic waveform or the numerical value itself. This is because there is no versatile waveform display function such as an oscilloscope that repeatedly displays a signal like an eye pattern or a scatter display, or that displays two signals on an XY plane.

A second problem is that the display style of the waveform, for example, the display range of the voltage and time, the switching between the eye pattern display and the scatter display, and the like cannot be freely set during the waveform display. The reason is that the multi-level level waveform display is the same as the display screen of the logic waveform or the numerical value, and the waveform display screen has few menus for setting items.

Further, a third problem is that since the waveform display function depends on a specific simulator, when the simulator changes, the image of the waveform display and the setting items change. The setting of the screen update time and the trigger cycle are also unique to the simulator. The reason is that the waveform display function is made exclusively for the simulator and is not intended to interface with various simulators. Digital signal processing system design / verification tools such as Synopsys' COSSAP have waveform display functions such as eye patterns and scatter displays, but they are dedicated to individual design / verification tools. And does not perform waveform display for a logic simulator. Therefore, this does not solve the third problem.

SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned conventional problems.
As in the case of evaluating the SI and its peripheral circuits, it is possible to visually verify the actual circuit even in the logic design of the LSI, thereby improving the design quality of the LSI and preventing remakes. It is an object of the present invention to provide a logic simulation waveform display system capable of displaying a multi-level signal waveform that does not depend on the waveform.

[0008]

In order to achieve the above object, a logic simulation waveform display system according to the present invention comprises a storage device, a logic simulator, a display device, an input device, a recording medium, and a data processing device. Wherein the storage device is configured to register a circuit to be verified and a test pattern for verification, and the logic simulator performs a simulation based on the circuit to be verified and the test pattern for verification registered in the storage device. The display device is configured to output data of a simulation result in response to the execution of the simulation, and the display device is configured to display a waveform based on the data of the simulation result and to display a setting screen for performing setting related to the waveform display. A setting item for setting the waveform display; The recording medium is configured to store a processing program to be executed by the data processing device, and the data processing device executes the processing program to store the processing program in the storage device. The registered circuit to be verified and the test pattern for verification are compiled for a simulator and given to the logic simulator to start up the logic simulator, and the setting screen is displayed on the display device from the input unit. After analyzing the input setting items and reflecting the waveform display,
The display device is configured to display a waveform based on the data of the simulation result input from the logic simulator, and the data processing device includes a simulation interface, a display setting unit, a data processing unit, and a data processing unit. Output means, wherein the simulation interface is configured to transmit and receive data to and from the logic simulator to receive signal values and timing information constituting data of the simulation result, that is, display data, and the display setting means includes Analyzing the setting items input from the input means and generating data of the waveform display setting to perform the setting relating to the waveform display, wherein the data processing means outputs the data from the display setting means; The waveform table The data output unit is configured to calculate data for displaying a waveform on the display device based on the setting data and the display data output from the simulation interface, and the data output unit calculates the data by the data processing unit. The display device is configured to transfer data for displaying a waveform to the display device to the display device, and the circuit to be verified and the test pattern for verification are described by a timing signal for transferring drawing data to the logic simulator. It is characterized by having been done. Also, a logic simulation waveform display system according to the present invention includes a storage device, a logic simulator, a display device, an input unit, a recording medium, and a data processing device, wherein the storage device includes a circuit to be verified and a The logic simulator is configured to register a test pattern, the logic simulator performs a simulation based on the circuit under test registered in the storage device and the test pattern for verification, and outputs data of a simulation result. The display device is configured to perform a waveform display based on the data of the simulation result and to display a setting screen for performing a setting related to the waveform display, and the input unit includes a display for setting the waveform display. The recording medium is configured to input a setting item, The data processing device is configured to store a processing program to be executed by the data processing device, and the data processing device executes the processing program so that the verification target circuit and the verification test pattern registered in the storage device can be stored in the simulator. The logic simulator is activated by compiling for use and giving it to the logic simulator, and the setting items input from the input means are analyzed with the setting screen displayed on the display device, and the waveform display is performed. After performing the reflecting process, the display device is configured to display a waveform based on the simulation result data input from the logic simulator, and the data processing device includes a simulation interface, a display setting unit, And data processing means;
Data output means, wherein the simulation interface is configured to exchange data with the logic simulator and receive signal values and timing information constituting data of the simulation result, that is, display data, and the display setting means Is configured to perform the setting related to the waveform display by analyzing the setting item input from the input unit and generating data of the waveform display setting, and the data processing unit includes: The data output unit is configured to calculate data for displaying a waveform on the display device based on the output data of the waveform display setting and the display data output from the simulation interface, Calculated by the data processing means, Data for displaying a waveform on a display device is transferred to the display device, and the circuit to be verified and the test pattern for verification are signals for clearing a waveform on a waveform display screen of the display device. Is described. Also, a logic simulation waveform display system according to the present invention includes a storage device, a logic simulator, a display device, an input unit, a recording medium, and a data processing device, wherein the storage device includes a circuit to be verified and a The logic simulator is configured to register a test pattern, the logic simulator performs a simulation based on the circuit under test registered in the storage device and the test pattern for verification, and outputs data of a simulation result. The display device is configured to perform a waveform display based on the data of the simulation result and to display a setting screen for performing a setting related to the waveform display, and the input unit includes a display for setting the waveform display. The recording medium is configured to input a setting item, The data processing device is configured to store a processing program to be executed by the data processing device, and the data processing device executes the processing program so that the verification target circuit and the verification test pattern registered in the storage device can be stored in the simulator. The logic simulator is activated by compiling for use and giving it to the logic simulator, and the setting items input from the input means are analyzed with the setting screen displayed on the display device, and the waveform display is performed. After performing the reflecting process, the display device is configured to display a waveform based on the simulation result data input from the logic simulator, and the data processing device includes a simulation interface, a display setting unit, And data processing means and data The simulation interface is configured to send and receive data to and from the logic simulator and receive signal values and timing information constituting data of the simulation result, that is, display data, and the display setting means comprises Analyzing the setting items input from the input means and generating data of the waveform display setting to perform the setting relating to the waveform display, wherein the data processing means outputs the data from the display setting means; The data output unit is configured to calculate data for displaying a waveform on the display device based on the data of the waveform display setting to be performed and the display data output from the simulation interface. Calculated by the data processing means, Data for displaying a waveform on a ray device is transferred to the display device, and the circuit to be verified and the test pattern for verification describe a trigger signal for displaying an eye pattern. It is characterized by. Also, a logic simulation waveform display system according to the present invention includes a storage device, a logic simulator, a display device, an input unit, a recording medium, and a data processing device, wherein the storage device includes a circuit to be verified and a Configured to register test patterns,
The logic simulator is configured to perform a simulation based on the circuit to be verified registered in the storage device and the test pattern for verification and output data of a simulation result, and the display device includes:
The display device is configured to display a waveform based on the data of the simulation result and to display a setting screen for setting the waveform display, and the input unit inputs a setting item for setting the waveform display. The recording medium is configured to store a processing program executed by the data processing device, and the data processing device is registered in the storage device by executing the processing program. By compiling the circuit to be verified and the test pattern for verification for a simulator and giving the same to the logic simulator, the logic simulator is started up, and the setting is displayed from the input means while the setting screen is displayed on the display device. After performing the process of analyzing the setting items and reflecting the results on the waveform display, The display device is configured to display a waveform based on the data of the simulation result input from the logic simulator, and the data processing device includes a simulation interface, a display setting unit, a data processing unit, Output means, wherein the simulation interface is configured to transmit and receive data to and from the logic simulator to receive signal values and timing information constituting data of the simulation result, that is, display data, and the display setting means includes Analyzing the setting items input from the input means and generating data of the waveform display setting to perform the setting relating to the waveform display, wherein the data processing means outputs the data from the display setting means; Said waveform Data for displaying a waveform on the display device based on the display setting data and the display data output from the simulation interface, and the data output means includes: The calculated and transferred data for displaying a waveform on the display device is transferred to the display device. It is performed between the simulator interface.

According to the present invention, the data processing device compiles a circuit to be verified and a test pattern for verification registered in the storage device for a simulator and activates the logic simulator. Further, the data processing device analyzes the setting items input from the input means while the setting screen is displayed on the display device and performs a process of reflecting the setting items on the waveform display. The display device displays a waveform based on the simulation result data input from the display device.

Therefore, according to the present invention, it is possible to visually verify a practical circuit in the logic design of an LSI, thereby improving the design quality of the LSI, preventing remakes, and displaying a waveform independent of a simulator. It becomes possible.

[0011]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, an embodiment of a logic simulation waveform display system according to the present invention will be described with reference to the drawings. FIG. 1 is a block diagram showing the configuration of the first embodiment according to the present invention. In FIG. 1, a waveform display screen is displayed on the display device 2 by the waveform display means 10 when the logic simulator 15 in the data processing device 1 is activated. By performing various settings for displaying a waveform on the display screen of the display device 2 and executing a simulation, a waveform of a target signal is displayed as the simulation proceeds.

The logic simulator 15 has a logic L
This is a general logic simulator used for logic design verification of SI. The waveform display means 10 constitutes a characteristic part of the first embodiment, and includes a simulator interface 11, a display setting means 12, and a data processing means 1.
3 and data output means 14.

The data processing apparatus 1 is connected to a recording medium 3 for storing a processing program of the data processing apparatus 1 and to input means A including a keyboard 5, a mouse 6, and the like. Further, a storage device 4 that stores a circuit to be verified and a test pattern for verification 16 is connected to the data processing device 1.

The simulator interface 11 in the waveform display means 10 is a means for exchanging data with the logic simulator 15 and receives a signal value to be displayed and timing information. The display setting means 12 operates a logic simulator by operating input means A such as a keyboard 5 and a mouse 6 with respect to various settings for displaying a waveform, for example, a display range of voltage and time, and switching between an eye pattern and a scatter display. 1
5 is set on the waveform display screen displayed at the start of the operation.

The data processing means 13 includes a display setting means 12
The calculation for displaying the waveform is performed based on the waveform display setting from the PC and the display data from the simulator interface 11. The data for display is passed to the display device 2 through the data output means 14, and the waveform is displayed on the screen of the display device 2. The data output means 14 is for outputting data passed from the data processing means 13 to the display device 2.

In this way, even if the logic simulator 15 is different, the waveform display of the multi-level signal can be easily performed by exchanging the simulator interface 11 without changing the display setting or changing the test pattern 16 for verification. Enable. When the logic simulator 15 is changed, the simulation is replaced by replacing the simulator interface 11 with the simulation.

Next, the operation of the first embodiment will be described in detail with reference to the flowchart of FIG. 2 and the waveform display / setting screen of FIG. 3 when the HDL simulator is used. First, a circuit to be verified and a test pattern for verification 16 are registered on the storage device 4 of FIG. 1 by the data processing device 1. The circuit under test and the test pattern for verification 16 include an HDL description for transferring data to and from the waveform display means 10, a timing signal for transferring drawing data, a display device 2, for example.
A signal for clearing the waveform on the waveform display screen, a trigger signal for performing eye pattern display, and the like are also described (step A1).

The actual data transfer is performed with the simulator interface 11 through the C language interface of the HDL simulator. Next, the data processing apparatus 1 executes the circuit to be verified and the test pattern 1 for verification.
Compile 6 for the simulator (Step A2)
The logic simulator 15 is started (step A3).

Next, when the waveform display means 10 is activated,
Since a waveform display / setting screen as shown in FIG. 3 is displayed on the display device 2, settings for displaying a waveform are performed (step A4). The waveform display / setting screen 30 of FIG.
For example, the screen 31 includes a screen 31 for displaying set conditions, a simulation time, and a waveform amplitude, a screen 32 for setting for waveform display, and a screen 33 for sequentially displaying waveforms obtained by simulation.

The settings for waveform display here include, for example, time-amplitude waveform display or XY scatter display, the number of display samples on the time axis (horizontal axis) and the amplitude axis (vertical axis).
Is to be displayed, the signal to be displayed is either two channels, or both, and the display style is sampled or filtered. The display setting unit 12 analyzes a setting item input from the keyboard 5 or the mouse 6 and performs processing for reflecting the setting item on the waveform display. After completing the waveform display setting, a simulation is executed (step A5).

With the execution of the simulation, the waveforms are sequentially drawn on the screen 33 for sequentially displaying the waveforms in FIG. 3 (step 6). The drawing of the waveform is stopped when the execution of the simulation is stopped. The setting of the waveform display can be changed during or after the simulation by saving the display data. For the circuit verification, the waveform displayed on the display device 2 by the waveform display means 10 and the display screen of the logic waveform of the logic simulator 15 are used. If the verification result is not preferable, the circuit to be verified and the test pattern for verification are used. The verification flow is continued by, for example, making 16 corrections, and if the result is as expected, the verification is terminated (step 7).

According to the first embodiment, after performing setting for displaying a waveform by the waveform display means, a simulation is performed, and a waveform is displayed on the display. Since various waveform displays such as display can be performed and their settings can be easily changed during the waveform display, the actual LS is displayed using an oscilloscope.
As in the case of evaluating I and its peripheral circuits, it is possible to visually verify a practical circuit even in the logic design of an LSI.

Accordingly, VHDL and Verilog-HDL
In an HDL simulation using a hardware description language such as, a multi-valued language can be displayed in various display formats such as an eye pattern display and a scatter display in addition to a binary logic waveform display. Therefore, it is possible to improve the design quality of the LSI and prevent remake. Also, since the interface with the logic simulator is separated on the program and the interface part is changed so that it can support multiple simulators,
A waveform display of a multi-level signal independent of a logic simulator can be performed.

Furthermore, since the waveform display means 10 does not depend on the HDL simulator, the waveform display means 10 displays a waveform such as a set trigger or a screen clear in a test bench which is an HDL description for setting a test vector for performing a simulation. A waveform display of a multi-level signal can be performed in various simulators without largely changing settings.

Next, a second embodiment according to the present invention will be described. FIG. 4 is a block diagram showing the configuration of the second embodiment according to the present invention. As is clear from comparison of FIG. 4 with FIG. 1, in the second embodiment shown in FIG.
The configuration on the block diagram of the data processing device 1 is the same as that of FIG. 1, and is constituted by the logic simulator 15 and the waveform display means 10. This waveform display means 10 corresponds to FIG.
As in the case of (1), a simulator interface 11 for interfacing with the logic simulator 15, display setting means 12 for performing various settings for waveform display, and data for performing arithmetic processing for waveform display based on the set conditions. It includes a processing means 13 and a data output means 14 for outputting data for causing the display device 2 to display a waveform.

The simulator interface 11 writes and reads waveform display data not only with respect to data input / output with the logic simulator 15 but also with waveform image data 17 stored in a file of the storage device 4. ing. Other configurations are the same as those of the first embodiment shown in FIG. As described above, in the second embodiment, the waveform image data 1
Since 7 is stored in the file for the waveform image data 17, arbitrary waveform data can be read and the waveform can be displayed by activating the waveform display means 10.

[0027]

As described above, according to the present invention, the data processing device compiles a circuit to be verified and a test pattern for verification registered in the storage device for a simulator and activates the logic simulator. I do. Further, the data processing device analyzes the setting items input from the input means while the setting screen is displayed on the display device and performs a process of reflecting the setting items on the waveform display. Since the display device performs waveform display based on the simulation result data input from the
It is possible to visually verify the actual circuit of the logic design of I, improve the design quality of the LSI, prevent remakes, and perform waveform display independent of the logic simulator.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a configuration of a first embodiment of a logic simulator waveform display system according to the present invention.

FIG. 2 is a flowchart showing an operation flow of the logic simulator waveform display system shown in FIG.

FIG. 3 is an explanatory diagram showing a screen displayed on a display device in the logic simulator waveform display system shown in FIG. 1;

FIG. 4 is a block diagram showing a configuration of a second embodiment of the logic simulator waveform display system according to the present invention.

[Explanation of symbols]

1. Data processing device 2. Display device 3.
Recording medium, 4 ... Storage device, 5 ... Keyboard, 6 ...
Mouse, 10 ... waveform display means, 11 ... simulator interface, 12 ... display setting means, 13 ... data processing means, 14 ... data output means, 15 ... logic simulator, 16 ... circuit under test and verification Test pattern 17, waveform image data A, input means.

────────────────────────────────────────────────── ─── Continuation of the front page (56) References JP-A-7-287721 (JP, A) JP-A-7-334533 (JP, A) JP-A-1-281559 (JP, A) 266793 (JP, A) JP-A-6-231195 (JP, A) JP-A-3-67370 (JP, A) JP-A-2-153441 (JP, A) JP-A-2-81162 (JP, A) JP-A-2-32266 (JP, A) (58) Fields investigated (Int. Cl. ⁷ , DB name) G06F 17/50 672

Claims (13)

(57) [Claims] 1. A storage device, a logic simulator , a display device, an input unit, a recording medium, and a data processing device, wherein the storage device registers a circuit to be verified and a test pattern for verification. The logic simulator is configured to perform a stain based on the circuit to be verified registered in the storage device and the test pattern for verification.
The display device is configured to perform a simulation and output data of a simulation result, and the display device displays a waveform based on the data of the simulation result and displays a setting screen for performing setting related to the waveform display. The input means is configured to input setting items for setting the waveform display, and the recording medium is configured to store a processing program executed by the data processing device, The data processing device activates the logic simulator by executing the processing program, compiling the circuit to be verified and the test pattern for verification registered in the storage device for a simulator, and providing the same to the logic simulator . And the setting screen is displayed on the display device. After performing a process of analyzing the setting items input from the input means in the state shown and reflecting the setting items on the waveform display, the display device is displayed based on the simulation result data input from the logic simulator. It is configured to perform waveform display, the data processing device, the simulation interface
, Display setting means, data processing means, and data output
Means, said simulation interface
Before sending and receiving data with the logic simulator
The signal values and data constituting the simulation result data
And receive timing information, that is, display data.
And the display setting means is input from the input means.
Analysis of the setting items to be input
Generates data to set the waveform display
And the data processing means is configured to
The data of the waveform display setting output from the setting means and the previous
Output from the simulation interface
The waveform of the waveform is displayed on the display device based on the display data.
Configured to calculate data for displaying,
The data output means is calculated by the data processing means.
For displaying a waveform on the display device.
Configured to transfer data to the display device.
The circuit to be verified and the test pattern for verification are
Signal for transferring data to the logic simulator
Logic simulation waveform display system characterized There has been described, it. 2. A storage device, a logic simulator, and a
Spray device, input means, recording medium, and data processing
Device, wherein the storage device is a circuit to be verified and a test pattern for verification.
And the logic simulator is configured to register the registered object in the storage device.
Verification circuit and stain based on the test pattern for verification
Data from simulation results
And the display device outputs the simulation result.
Waveform display based on data and settings related to the waveform display
To display a setting screen for performing
And the input means is provided for setting the waveform display.
The recording medium is configured to input a fixed item, and the recording medium stores a processing program to be executed by the data processing device.
And the data processing device executes the processing program.
By doing so, the circuit to be verified and the
And the verification test pattern for simulator
By pile and giving to the logic simulator,
Activate the logic simulator and bring the display device
Input from the input means while the setting screen is displayed.
Analyze the setting items to be reflected in the waveform display
After processing, the input from the logic simulator
Said de based on the data of the simulation results that
The display device is configured to display a waveform.
And the data processing device has a simulation interface.
, Display setting means, data processing means, and data output
Means, said simulation interface
Before sending and receiving data with the logic simulator
The signal values and data constituting the simulation result data
And receive timing information, that is, display data.
And the display setting means is input from the input means.
Analysis of the setting items to be input
Generates data to set the waveform display
And the data processing means is configured to
The data of the waveform display setting output from the setting means and the previous
Output from the simulation interface
The waveform of the waveform is displayed on the display device based on the display data.
Configured to calculate data for displaying,
The data output means is calculated by the data processing means.
For displaying a waveform on the display device.
Configured to transfer data to the display device.
The circuit to be verified and the test pattern for verification are
Clear the waveform on the waveform display screen of the display device.
A logic simulation waveform display system, characterized in that a signal for the simulation is described . 3. A storage device, a logic simulator, and a storage device.
Spray device, input means, recording medium, and data processing
Device, wherein the storage device is a circuit to be verified and a test pattern for verification.
And the logic simulator is configured to register the registered object in the storage device.
Verification circuit and stain based on the test pattern for verification
Data from simulation results
And the display device outputs the simulation result.
Waveform display based on data and settings related to the waveform display
To display a setting screen for performing
And the input means is provided for setting the waveform display.
The recording medium is configured to input a fixed item,
I save the program is urchin configuration, the data processing apparatus executes the processing program
By doing so, the circuit to be verified and the
And the verification test pattern for simulator
By pile and giving to the logic simulator,
Activate the logic simulator and bring the display device
Input from the input means while the setting screen is displayed.
Analyze the setting items to be reflected in the waveform display
After processing, the input from the logic simulator
Based on the simulation result data
The display device is configured to display a waveform.
And the data processing device has a simulation interface.
, Display setting means, data processing means, data
Output means, and the simulation interface
Exchanges data with the logic simulator.
Signal values constituting data of the simulation result
And receive timing information, ie, display data
The display setting means is configured to be the input means.
Analyze the setting items input from the
Settings related to the waveform display by generating constant data
And the data processing means comprises:
Data of the waveform display setting output from the display setting means
And output from the simulation interface
A wave is displayed on the display device based on the display data.
Configured to calculate data for shape display
Wherein the data output means is calculated by the data processing means.
To display a waveform on the display device.
Configured to transfer the data to the display device.
The circuit to be verified and the test pattern for verification are
A trigger signal is described to perform pattern display.
That, logic simulation waveform display system characterized by. 4. A storage device, a logic simulator, and a
Spray device, input means, recording medium, and data processing
Device, wherein the storage device is a circuit to be verified and a test pattern for verification.
And the logic simulator is configured to register the registered object in the storage device.
Verification circuit and stain based on the test pattern for verification
Data from simulation results
And the display device outputs the simulation result.
Waveform display based on data and settings related to the waveform display
To display a setting screen for performing
And the input means is provided for setting the waveform display.
The recording medium is configured to input a fixed item,
And the data processing device executes the processing program.
By doing so, the circuit to be verified and the
And the verification test pattern for simulator
By pile and giving to the logic simulator,
Activate the logic simulator and bring the display device
Input from the input means while the setting screen is displayed.
Analyze the setting items to be reflected in the waveform display
After processing, the input from the logic simulator
Based on the simulation result data
The display device is configured to display a waveform.
And the data processing device has a simulation interface.
, Display setting means, data processing means, and data output
Means, said simulation interface
Before sending and receiving data with the logic simulator
The signal values and data constituting the simulation result data
And receive timing information, that is, display data.
And the display setting means is input from the input means.
Analysis of the setting items to be input
Generates data to set the waveform display
And the data processing means is configured to
The data of the waveform display setting output from the setting means and the previous
Output from the simulation interface
The waveform of the waveform is displayed on the display device based on the display data.
Configured to calculate data for displaying,
The data output means is calculated by the data processing means.
For displaying a waveform on the display device.
Configured to transfer data to the display device.
Of the data of the circuit to be verified and the test pattern for verification.
The exchange is based on the C language interface of the HDL simulator.
Performed between the simulator interface through
That, logic simulation waveform display system characterized by. Wherein said input means, logic simulation waveform display system according to any one of the claims 1 to 4, characterized in that a keyboard. Wherein said input means, logic simulation waveform display system according to any one of the claims 1 to 4, characterized in that a mouse. Wherein said display setting unit, according to claim 1, wherein the setting the display range of the voltage to be displayed along with activation of the logic simulator waveform display screen of the display device by operation of said input means Any one
A logic simulation waveform display system according to the item . Wherein said display setting unit, according to claim 1, wherein the setting the display time range to be displayed along with activation of the logic simulator waveform display screen of the display device by operation of said input means Any one
A logic simulation waveform display system according to the item . Wherein said display setting unit, logic simulation waveform display system according to any one of the claims 1 to 4, characterized in that for setting the eye pattern displayed by the operation of said input means. Wherein said display setting unit, logic simulation waveform display system according to any one of the claims 1 to 4, characterized in that for setting scatter displayed by operation of said input means. Wherein said circuit to be verified and the verification test pattern, HDL for transmitting and receiving the data, i.e. either to claim 1 to 4, characterized in that the hardware description language is described 1 A logic simulation waveform display system according to the item . 12. The storage device according to claim 1, wherein registering the waveform image data in addition to said circuit to be verified and the verification test pattern file
10. The logic simulation waveform display system according to claim 1. 13. The simulator interface,
13. The logic simulation according to claim 12 , wherein writing and reading of waveform display data are performed between the waveform image data and the verified circuit and the test pattern registered in the pre-storage device. Waveform display system.