JP3154801B2 - Video signal level monitoring circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a video signal level monitoring circuit for monitoring the level of a video signal.

[0002]

2. Description of the Related Art Generally, in the transmission of a video signal, the level of the video signal may decrease due to an abnormality in a transmission device or a transmission path. Therefore, when the level decrease is so large that normal operation of the transmission system becomes impossible, it is necessary to notify the user of the apparatus that the video signal level is abnormal.

When detecting an abnormality in the video signal level,
During operation of the transmission device, it is impossible to transmit a white level signal for signal level measurement and measure the level of a video signal. For this reason, during operation of the transmission device,
Abnormalities in the amplitude of the synchronization signal portion of the video signal are monitored.

FIG. 7 shows a conventional video signal level monitoring circuit. As shown in the figure, in the conventional video signal level monitoring circuit, the sync separation unit 102 of the clamp circuit 101
Then, the synchronous portion is separated from the video signal, and the clamp pulse generating section 103 generates a clamp pulse. Clamp section 10
No. 4 reproduces the DC component of the pedestal section using the clamp pulse in a horizontal synchronization cycle.

A comparator 202 of the level comparison circuit 201 compares the potential of the bottom portion of the video signal with a reference potential 203 which is a threshold value for judging an abnormal level of the video signal. Is higher, the video signal level is determined to be abnormal. F
F (flip-flop) 301 is a level comparison circuit 201
In order to extract only the horizontal synchronizing signal portion from the output.

[0006]

In this conventional video signal level monitoring circuit, the level of a small level signal is not monitored so that the clamp circuit 101 starts malfunctioning.
Therefore, when trying to monitor the small-level video signal using this circuit, even when the video signal level is smaller than the threshold value for the level determination, a state in which the video signal level is not determined to be abnormal due to malfunction of the clamp circuit 101 may occur. Occurs.

In general, the sync separation unit 102 fixes the potential of the bottom part of the video signal to a constant value and performs synchronization separation using the fixed bottom part potential at about 70 mV as a threshold value. If the potential difference between the video signal and the pedestal is smaller than 70 mV, the sync separation unit 102 separates the video signal from the luminance portion of the video signal (hereinafter, this operation is referred to as “low-level operation”).

FIG. 6 is a time chart showing signal waveforms and timings in the video signal level monitoring circuit shown in FIG. In FIG. 6, a signal during normal operation of the sync separation unit (when an abnormal video signal level occurs) is shown on the left side of the central vertical broken line, and a signal during low-level operation is shown on the right side. In FIG. 6, (A) shows a video signal, (B) and (G) show a horizontal synchronization signal output from the synchronization separation unit 102,
(C) and (H) show clamp pulses output from the clamp pulse generator 103, and (D) and (I) show F
The image signal level abnormal output signal output from F301 is shown.

As shown in FIG. 6, in the clamp pulse generator 103, the horizontal synchronizing signals (B),
Since the clamp pulses (C) and (H) are generated by delaying the rise of (G) by a certain time, when the video signal level is sufficiently large and the sync separation unit 102 operates normally, the clamp pulse is generated. Is as shown in (C), and the pulse position is the pedestal position of the video signal (A).

However, when the level of the video signal (A) decreases (shrinks up and down in the figure), the synchronization separation unit 102 performs a low-level operation and separates from the luminance portion of the video signal (A). As a result, a horizontal synchronization signal as shown in FIG. As described above, the clamp pulse is generated by delaying the rise of the horizontal synchronization signal output from the synchronization separation unit 102.
(H). At this time, since the clamp pulse (H) is located in the luminance portion of the video signal (A), the potential of the luminance signal is reduced to the pedestal potential by the clamp circuit 101. become. This is a malfunction of the clamp circuit 101.

As described above, when a small level signal is input such that the clamp circuit 101 malfunctions, the potential of the bottom portion of the video signal (A) is lower than the potential of the clamp circuit 101 during normal operation. The potential of the bottom portion of the signal (A) becomes lower than the reference potential 203, which causes a problem that the level abnormality of the video signal (A) cannot be determined even though the level of the video signal (A) is actually small.

The present invention has been made in view of such a point, and an abnormal video signal level can be detected even when the sync separation unit performs a low-level operation when the video signal level is smaller than a threshold value. It is an object of the present invention to provide a video signal level monitoring circuit that can be detected.

[0013]

In order to achieve the above object, according to the present invention, the pulse width of a horizontal synchronizing signal separated by synchronization is monitored, and the pulse width of the horizontal synchronizing signal is controlled by a low level operation of the synchronization separating section. When the number becomes wide, a level abnormality is forcibly issued.

That is, the present invention provides a synchronizing separator 1 for separating a horizontal synchronizing signal from a video signal, a clamp pulse generator 2 for generating a clamp pulse based on the separated horizontal synchronizing signal, and a generated clamp pulse. Clamp unit 3 that clamps video signals at the pedestal level
And a level comparison circuit 7 that compares the video signal output from the clamp circuit 4 with a reference potential 5 and outputs an abnormal video signal level signal when the level of the video signal is abnormal as a result of the comparison. A protection circuit 8 that monitors the pulse width of the horizontal synchronization signal separated by the synchronization separation unit 1 of the clamp circuit 4 and outputs a signal indicating an abnormal video signal level when the width is wider than a predetermined width. It is a level monitoring circuit.

In the above description, the protection circuit 8 includes a horizontal synchronization signal width monitoring section 9 for monitoring the pulse width of the horizontal synchronization signal separated by the synchronization separation section 1 of the clamp circuit 4, and a horizontal synchronization signal width monitoring section 9 for controlling the horizontal synchronization signal width. A comparison signal masking unit for forcibly replacing an output signal from the level comparison circuit with an abnormal video signal level signal when it is determined that the pulse width of the synchronization signal is wider than a predetermined width. .

The protection circuit 8 also includes a horizontal synchronization signal width monitoring unit 9 for monitoring the pulse width of the horizontal synchronization signal separated by the synchronization separation unit 1 of the clamp circuit 4, and a horizontal synchronization signal width monitoring unit 9 for controlling the horizontal synchronization signal width. And a clamp output mask section 11 that cuts off the output signal from the clamp circuit 4 when it is determined that the pulse width of the signal is wider than the predetermined width.

[0017]

According to the present invention, the protection circuit 8 monitors the pulse width of the horizontal synchronization signal output from the synchronization separation unit 1 of the clamp circuit 4, and when the pulse width becomes larger than a predetermined width, the protection circuit 8 monitors the pulse width. Output a signal indicating an abnormal video signal level.

That is, as shown in FIG. 6, when the level of the video signal decreases and the sync separation unit 1 operates at a low level, the waveform of the horizontal sync signal output from the sync separation unit 1 becomes (G). . Therefore, the protection circuit 8 detects that the pulse width of the horizontal synchronizing signal is widened and outputs a signal indicating an abnormal video signal level, thereby preventing a malfunction of the video signal level monitoring circuit.

[0019]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below in detail with reference to the embodiments shown in the drawings. Note that the present invention is not limited by this.

FIG. 1 is a circuit block diagram showing a configuration of an embodiment of a video signal level monitoring circuit according to the present invention. In FIG. 1, reference numeral 1 denotes a synchronization separation unit for separating a horizontal synchronization signal from a video signal, 2 denotes a clamp pulse generation unit that generates a clamp pulse based on the horizontal synchronization signal separated by the synchronization separation unit 1, and 3 denotes a clamp pulse generation A clamp unit for clamping a video signal at a pedestal level by a clamp pulse generated by the unit 2. The synchronous separation unit 1, the clamp pulse generation unit 2 and the clamp unit 3
Is configured.

Reference numeral 6 denotes a comparator which compares the video signal output from the clamp circuit 4 with a reference potential 5 and outputs a signal indicating an abnormal video signal level when the level of the video signal is abnormal as a result of the comparison. 5 and a comparator 6 constitute a level comparison circuit 7.

Reference numeral 8 denotes a protection circuit that monitors the pulse width of the horizontal synchronization signal separated by the synchronization separation section 1 of the clamp circuit 4, and outputs a signal indicating an abnormal video signal level when the pulse width is wider than a predetermined width. is there. Reference numeral 20 denotes an FF (flip-flop), which is provided to extract only a horizontal synchronization signal portion from the output of the level comparison circuit 7.

FIG. 2 is a circuit block diagram showing another embodiment of the video signal level monitoring circuit of the present invention. In the figure, the same components as those of the previous embodiment shown in FIG. 1 are denoted by the same reference numerals, and description thereof will be omitted.

In this embodiment, the basic configuration is the same as that of the above-mentioned embodiment, but the protection circuit 8 comprises a horizontal synchronization signal width monitoring unit 9 and a comparison signal masking unit 10. In this circuit, the horizontal synchronizing signal width monitoring section 9 monitors the pulse width of the horizontal synchronizing signal separated by the synchronization separating section 1 of the clamp circuit 4. When the horizontal synchronization signal width monitoring unit 9 determines that the pulse width of the horizontal synchronization signal is wider than a predetermined width, the comparison signal masking unit 10 forcibly converts the output signal from the level comparison circuit 7 into a video signal level abnormal signal. It is configured to be replaced.

FIG. 3 is a circuit block diagram showing still another embodiment of the video signal level monitoring circuit of the present invention. In the figure,
The same components as those in the previous embodiment shown in FIGS. 1 and 2 are denoted by the same reference numerals, and description thereof will be omitted.

In this embodiment, the basic configuration is the same as that of the embodiment shown in FIG. 2, but the protection circuit 8 is provided between the clamp circuit 4 and the level comparison circuit 7. Horizontal sync signal width monitor 9 and clamp output mask 1
1 is comprised. In this circuit, the horizontal synchronizing signal width monitoring section 9 monitors the pulse width of the horizontal synchronizing signal separated by the synchronization separating section 1 of the clamp circuit 4. The clamp output mask unit 11 is configured to cut off an output signal from the clamp circuit 4 when the horizontal synchronization signal width monitoring unit 9 determines that the pulse width of the horizontal synchronization signal is wider than a predetermined width.

FIG. 4 is a circuit block diagram showing an application example of the video signal level monitoring circuit, and shows a video signal level measurement circuit. In the figure, the same components as those in the previous embodiment shown in FIGS. 1 to 3 are denoted by the same reference numerals, and description thereof will be omitted.

In FIG. 4, reference numeral 21 denotes a clamp level potential which determines a DC value reproduced by the clamp circuit 4, 2
Reference numeral 2 denotes a level measuring unit for measuring the video signal level of the video signal synchronizing unit. Reference numeral 23 denotes a display unit which normally displays the video signal level and displays a level abnormality alarm when the video signal level decreases.

In this application example, for example, when a video signal level -6 dB input to the clamp circuit 4 for a normal video signal level of 1 V _pp is used as a video signal level abnormality detection threshold, the clamp level potential 21 is set to Assuming that the reference potential 5 is 0 V, the reference potential 5 is the normal video signal level (pedestal 0).
V) of the video signal bottom potential. At this time, when the video signal level input to the clamp circuit 4 is within -6 dB from the normal video signal level, the level of the video signal is displayed on the display unit 23, and when the video signal level is lower than the normal video signal level by 6 dB or more. Is the display unit 2
3 displays a warning of a video signal level abnormality.

In this application example, the level comparing circuit 7 and the level measuring section 22 are constituted by analog circuits. However, after the clamp circuit 4, the video signal is converted into a digital signal.
A / D converter may be provided, and the level comparison circuit 7 and the level measurement unit 22 may be constituted by digital circuits. Further, the protection circuit 8 may be located between the clamp circuit 4 and the level comparison circuit 7 or between the level comparison circuit 7 and the FF 20.

FIG. 5 is a circuit block diagram showing another application example of the video signal level monitoring circuit, and shows an image display terminal device. In the figure, the same components as those in the previous embodiment shown in FIGS. 1 to 4 are denoted by the same reference numerals, and description thereof will be omitted.

In FIG. 5, reference numeral 31 denotes a video signal level monitoring circuit of the present invention; 32, an image pattern storage unit for storing an image pattern such as a blue screen in advance; 33, a switch; and 34, an image display unit.

In this circuit, the switch 33 operates according to the output of the video signal level monitoring circuit 31 to control the image display unit 3.
4. The signal to be displayed is switched. That is, if the video signal level is larger than a preset value,
If the size is smaller, each is switched to an image pattern.
Thereby, the user of the image display terminal device can know from the image pattern that the video signal level has become smaller than the preset value.

[0034]

As described above, according to the present invention, the pulse width of the horizontal synchronizing signal is monitored, and if the video signal level is smaller than a preset threshold value, the video signal level must be monitored. Since an abnormal alarm is output,
It is possible to prevent a small-level video signal level from being erroneously determined to be a large level, prevent a malfunction of the video signal level measuring circuit, and greatly contribute to discovering an abnormality in a device that handles video signals in general.

[Brief description of the drawings]

FIG. 1 is a circuit block diagram showing a configuration of an embodiment of a video signal level monitoring circuit of the present invention.

FIG. 2 is a circuit block diagram showing another embodiment of the video signal level monitoring circuit of the present invention.

FIG. 3 is a circuit block diagram showing still another embodiment of the video signal level monitoring circuit of the present invention.

FIG. 4 is a circuit block diagram illustrating an application example of a video signal level monitoring circuit.

FIG. 5 is a circuit block diagram showing another application example of the video signal level monitoring circuit.

FIG. 6 is a time chart showing signal waveforms and timings in the video signal level monitoring circuit.

FIG. 7 is a circuit block diagram showing a conventional video signal level monitoring circuit.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Synchronization separation part 2 Clamp pulse generation part 3 Clamp part 4 Clamp circuit 5 Reference potential 6 Comparator 7 Level comparison circuit 8 Protection circuit 9 Horizontal synchronization signal width monitoring part 10 Comparison signal mask part 11 Clamp output mask part 20 FF (flip-flop) Reference Signs List 21 clamp level potential 22 level measurement unit 23 display unit 31 video signal level monitoring circuit 32 image pattern storage unit 33 switch 34 image display unit

Continuing from the front page (72) Inventor Ken Okazaki 1015 Uedanaka, Nakahara-ku, Kawasaki-shi, Kanagawa Prefecture Inside Fujitsu Limited (72) Inventor Keizo Kato 1-1-6 Uchisaiwaicho, Chiyoda-ku, Tokyo Nippon Telegraph and Telephone Corporation (56) References JP-A-62-295580 (JP, A) (58) Fields investigated (Int. Cl. ⁷ , DB name) H04N 17/00-17/06

Claims (3)

(57) [Claims] A synchronization separation unit configured to separate a horizontal synchronization signal from a video signal; a clamp pulse generation unit configured to generate a clamp pulse based on the separated horizontal synchronization signal;
And a clamp circuit (4) including a clamp unit (3) for clamping a video signal at a pedestal level by the generated clamp pulse, and a video signal output from the clamp circuit (4) being compared with a reference potential (5). When the level of the video signal is abnormal as a result of the comparison, a level comparison circuit (7) that outputs a signal indicating an abnormal video signal level, and a pulse of the horizontal synchronization signal separated by the synchronization separation unit (1) of the clamp circuit (4) A protection circuit that monitors the width and outputs a signal indicating an abnormal video signal level when the width is wider than a predetermined width (8)
And a video signal level monitoring circuit comprising: 2. The protection circuit according to claim 1, wherein the protection circuit comprises a clamp circuit.
The horizontal synchronization signal width monitoring section (9) monitors the pulse width of the horizontal synchronization signal separated by the synchronization separation section (1), and the horizontal synchronization signal width monitoring section (9) controls the pulse width of the horizontal synchronization signal to a predetermined value. 2. A video signal level monitor according to claim 1, further comprising: a comparison signal masking unit for forcibly replacing an output signal from the level comparison circuit with a video signal level abnormal signal when it is determined that the output signal is wider than the width. circuit. 3. The protection circuit (8) comprises a clamp circuit (4).
The horizontal synchronization signal width monitoring section (9) monitors the pulse width of the horizontal synchronization signal separated by the synchronization separation section (1), and the horizontal synchronization signal width monitoring section (9) controls the pulse width of the horizontal synchronization signal to a predetermined value. 2. The video signal level monitoring circuit according to claim 1, further comprising: a clamp output mask section for cutting off an output signal from the clamp circuit when it is determined that the width is wider than the width.