JP3146518B2 - Image processing device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image processing apparatus provided with a restoration circuit for restoring pseudo halftone binary image data into multi-gradation image data (hereinafter referred to as multi-value image data).

[0002]

2. Description of the Related Art In general, binary printers for recording binary image data are widely used. Recently, color laser printers for recording multivalued image data at high speed and high resolution have been put to practical use. Halftone data such as a photograph is originally represented by multi-value data of a plurality of bits per pixel. However, when storing multi-valued image data in a storage device, a large-capacity storage device is required. Therefore, at the time of communication (such as facsimile communication) or at the time of storage (such as filing), the multi-value data is once converted into pseudo halftone binary data,
A method has been proposed in which the amount of data is reduced and stored in a storage device by converting the data into value data, and at the time of image processing or recording, the binary image data is read from the storage device and then restored to multi-valued image data. I have.

By restoring such pseudo-halftoned binarized data into multi-valued image data again, there are the following advantages. That is, when the pseudo halftone binary data is output to the multi-level output system, the multi-level output of the output system can be utilized by restoring it to multi-level image data. The output system includes a printer (recording) and a display (display).

[0004] The second advantage is as follows. In other words, when pseudo halftone binary data is binary-outputted (recorded and displayed) at different pixel densities, mere scaling processing is not performed, and once restored to multi-valued data, scaling processing is performed. Thus, it is possible to prevent the occurrence of moire due to the periodicity of the original pseudo halftone binary data. The restored multi-value data is converted into pseudo halftone binary data and output to an output system. At this time, if the output system has a higher density than the original image data, the fact that the output system has a higher density can be utilized. Further, it is conceivable to combine the two advantages and output multi-values after scaling. This type of method and apparatus are disclosed in, for example, JP-A-62-1114378 and JP-A-6-114378.
It is disclosed in JP-A-2-107573.

In the former image processing method of the first conventional example, the performance of these devices can be sufficiently obtained by using a multi-value printer while using conventional binary image data, and the restored character image can be obtained. In order to improve the quality, a halftone image is restored from binary image data, and predetermined image processing such as enlargement / reduction processing or image enhancement processing is performed on the restored halftone image. In the method of the first conventional example, in order to restore binary image data to multivalued image data, a square window having a predetermined size is formed around a pixel to be restored (hereinafter referred to as a pixel of interest). And a smoothing process is performed within the window.

Further, the latter image processing apparatus of the second conventional example can prevent the image quality from deteriorating when a simple binary circuit such as a dither method is used, and can be constituted by a simple circuit. For the purpose, means for dividing the binarized image information into predetermined blocks, identification means for identifying the image tone for each block, and image information in the block according to the identification result of the identification means. And a conversion means for converting each pixel into a multi-valued level. In this device, the efficiency of display and editing of an image is improved by treating the image as binary image data at the time of image transmission and storage processing, and a multi-value expression similar to an analog image is performed at the time of image reproduction. Specifically, the identification means and the conversion means are each composed of an image tone determination ROM for performing image tone determination by pattern matching within a block corresponding to the size of the dither matrix, and a conversion ROM.

[0007]

In order to restore a multi-valued image from a pseudo-halftone binary image, a smooth component obtained from a smoothing window and an edge enhancement image for an image around a target pixel to be processed are obtained. It is conceivable to use a mixture with an edge enhancement component obtained from a window. Although a halftone image is originally an image of two pixels and a lower frequency than an image of one cycle, some pseudo halftone binarized images are originally straight lines with a width of one pixel. . If the width of the window for edge enhancement in the edge enhancement direction is larger than one pixel, they become a dashed line having a width of one pixel or more.
Since the density was dispersed, the edge emphasis component could not be obtained, and the original multi-valued image could not be accurately restored. When using a mixture of a smooth component and an edge component, a wider window is preferable in order to obtain a smoother image. On the other hand, the edge enhancement component is obtained from the difference between the two windows. However, in order to obtain the edge enhancement component of an image having a higher spatial frequency, a narrow window is required in the edge direction. However, when the size of the window for detecting a smooth component and the size of the window for detecting an edge component are different from each other, there is a problem that the influence of the larger window becomes larger. For example, when obtaining an edge enhancement amount in a certain edge enhancement direction, a pixel separated from the processing pixel by a maximum of N2 pixels is used, and when obtaining a smoothing amount, a pixel separated by a maximum of N1 pixels from the processing pixel is used. . If N1> N2, the smoothed component due to pixels distant from the processing pixel by N2 + 1 pixels or more will perform extra smoothing on the restored image.
The edge enhancement component of pixels separated by 1 + 1 pixel or more causes extra edge enhancement in the restored image, and there is no point in storing the edge component lost by the smoothing process. In particular, when the smoothing window is large, an extra smooth component is obtained, and the restored image tends to be blurred. Therefore, the original multi-valued image cannot be accurately restored.

A first object of the present invention is to convert binary image data binarized by pseudo halftone and binary image data binarized by non-halftone using a predetermined threshold value. An object of the present invention is to provide an image processing apparatus capable of restoring a fine line when restoring input binary image data including image data into multi-gradation image data. A second object of the present invention is to provide a pseudo-halftone with 2
Input binary image data including binary image data that has been binarized and binary image data that has been binarized in a non-halftone using a predetermined threshold value is restored to multi-gradation image data An object of the present invention is to provide an image processing apparatus which can restore multi-gradation image data without the influence of extra smoothing.

[0009]

An image processing apparatus according to the present invention is an image processing apparatus for restoring pseudo-halftone binarized binary image data into multi-valued data. A first operation unit that counts the number of black pixels in a window including the target pixel and pixels around the target pixel to obtain a smooth component amount; and a first direction including the target pixel in the binary image data, A first window consisting of a plurality of pixels continuous with the first window, a second window consisting of a plurality of pixels adjacent to the first window in a direction orthogonal to the first direction and continuous in the first direction, and A third window, which is adjacent to the one window on the opposite side of the second window and is composed of a plurality of pixels continuous in the first direction, wherein an edge component amount is detected from a count value of the number of black pixels in each window. Second operation Comprising stages and, and a restoring means for obtaining a multivalued restoration image using the obtained edge component amount by the first arithmetic smoothing component amount obtained by the means and the second computing means.
In the second arithmetic means, the width of each window in the adjacent direction is a width of one pixel.

[0010] Preferably, the second calculating means detects the edge component amount from a difference between a value based on the count value in the first window and the count values in the second and third windows.

[0011]

In order to restore a multi-valued image from a pseudo halftone binary image, a smooth component obtained from a smoothing window and an edge enhancement obtained from an edge enhancing window are obtained for an image around a pixel of interest to be processed. Utilize mixing with ingredients. Here, subtraction between windows having a width of n pixels or less with respect to the edge enhancement direction is necessary in order to obtain an edge enhancement component of an image in which (2 × N) pixels have one cycle. A halftone image is originally an image of two pixels and a lower frequency than an image of one cycle, but some of the pseudo-halftone binarized images are originally straight lines of one pixel width. is there.
When such thin lines are arranged for each pixel, a high-frequency image having a width of two pixels as one cycle is obtained. Therefore, in order to reproduce such a straight line, an edge enhancement component having a width of one pixel in the edge enhancement direction is extracted using a window having a width of one pixel in the edge enhancement direction.

Further, as for the window in the edge enhancement direction, windows in two directions (left and right) in the edge enhancement direction (for example, left and right) are combined as a pair (in the embodiment, the windows in FIGS. 23 to 26). An edge component in the same direction but in the opposite direction is obtained, and the sum of both edge components in the same direction is used as the edge enhancement amount in that direction. by this,
In the case of edge enhancement of a linear image having a width of one pixel, the spatial frequency characteristics do not change as compared with the case where two single windows are used (for example, the windows in FIGS. 27 and 28), but edge enhancement in the + direction is performed. Since the magnitude of the amount is twice the amount of edge enhancement in the negative direction, the image density is preserved.

[0013]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Referring to the accompanying drawings, a facsimile apparatus according to an embodiment of the present invention using a multi-tone laser beam printer as an output system will be described in the following order. In this facsimile apparatus, restoration from pseudo halftone binary data to multivalued data is performed.

(1) Features of this embodiment (2) Configuration and operation of facsimile apparatus (3) Image restoration processing unit (4) 9 × 9 matrix memory circuit (5) Halftone data restoration unit (5-1) Edge Enhancement window and smoothing window (5-2) Halftone data restoration unit (5-3) Configuration of each unit of halftone data restoration unit (5-3-1) Edge area detection calculation unit (5-3-2) Edge component 1 calculation unit (5-3-3) Edge component 2 calculation unit (5-3-4) Logic circuit B circuit, Logic circuit C circuit, Logic circuit D circuit, Logic circuit E circuit (5-3-5) 3 × 3 minority pixel detection unit (5-3-6) 7 × 7 black pixel counting unit

As shown in FIG. 2, the facsimile apparatus includes an image restoration processing section 62 for restoring received binary image data to multi-valued image data, and prints each pixel at multiple gradations. A laser printer 70, which is a multi-value printer, is provided. In the following description of the embodiment, the “halftone image” and “halftone region” are respectively defined by multi-valued image data of a halftone image such as a photograph by a binary halftone method such as a dither method. A non-halftone image and a non-halftone area mean a non-halftone image and a non-halftone image such as a character, for example.

(1) Features of this embodiment As shown in the block diagram of the image restoration processing section 62 in FIG.
Value image data and 2 in non-halftone using predetermined threshold
A predetermined edge enhancement amount and a smoothed value are calculated based on the received binary image data including the binarized binary image data, and the multi-value halftone data is restored by generating an edge determination signal. Halftone data restoration unit 101
And determining, for each pixel, whether it is a halftone area or a non-halftone area, based on the received binary image data, for a predetermined area centering on the pixel of interest, and generating an image area determination signal. An image area discrimination processing section 102 for outputting, and a smoothing processing section 103 for performing a smoothing process based on the received binary image data. Part 55
To the multi-level laser printer 70, and when the binary image data output from the processing unit 103 is determined to be a non-halftone area, the binary image data is applied to the white and black data in the multi-level expression. Similarly, it is characterized by outputting to the laser printer 70.

Here, in particular, the halftone data restoring unit 101
The halftone data restoration unit 101 generates (a) data of the maximum value of the absolute value of the edge discrimination amount indicating the edge discrimination index based on the input pixel data, And (b) smoothing pixel data in a predetermined region based on the input pixel data and the edge discrimination signal. A smoothing value calculating unit 112 for calculating a smoothing value obtained by
(C) an edge determination unit 113 that generates an edge determination signal based on the maximum value of the absolute value of the edge determination amount,
(D) A restored data calculation unit 114 for restoring multi-valued halftone image data based on the input edge enhancement amount and smoothing amount
And

(2) Configuration and Operation of Facsimile Machine FIG. 1 is a longitudinal sectional view of a mechanism of a facsimile machine according to an embodiment of the present invention. As shown in FIG. 1, the facsimile apparatus is roughly divided into a printer unit 1 and an image reading unit 20 installed above the printer unit 1. An operation panel 40 is provided on the printer unit 1, and A telephone 42 is provided on the side surface.

The printer section 1 is an electrophotographic laser beam printer having a configuration similar to that of a conventional apparatus, and its operation will be briefly described below. First, the photoconductor on the photoconductor drum 2 that is rotationally driven is uniformly charged by the charger 3. Next, the optical system 4 irradiates a laser beam according to the image data to form an electrostatic latent image on the photosensitive drum 2. The toner of the developing device 5 adheres to the electrostatic latent image. On the other hand, cut paper is placed in the paper feed cassette 11, and the cut paper is picked up one by one by the pickup roller 12, and then sent to the transfer portion of the photosensitive drum 2 by the paper feed roller 13. Photoconductor drum 2
Is transferred to the cut sheet by the transfer charger 6 and is fixed by the fixing device 12. The cut sheet after the fixing process is discharged to the discharge tray 13 through the discharge path 15 by the discharge rollers 14 and 16. The toner that has not adhered to the cut sheet is collected by the cleaner 8, and one printing operation is completed.

Next, the operation of the image reading section 20 will be described. Reading of the transmission original is performed in the same manner as in the conventional apparatus. That is, the originals placed on the original tray 21 are detected by the original sensor 22, and the originals are fed one by one to the position of the sensor 25 by the rollers 23. Next, the original is read by the contact linear image sensor 26 in synchronization with the rotation of the roller 24 by the motor (not shown) and the reading of the contact linear image sensor 26,
After being converted into digital image data, the original image is output to the buffer memory 59 shown in FIG. After the image reading is completed, the original is discharged by the discharge roller 27 to the discharge tray 2.
It is discharged to 8.

FIG. 2 is a block diagram showing the configuration of the signal processing section of the facsimile apparatus shown in FIG. In this facsimile apparatus, a microprocessor (MPU) 50 for controlling the whole of the facsimile apparatus;
HDLC analyzer 52, modem 53, and NCU 54, which perform facsimile signal processing and communication processing, respectively.
And an image compression image memory 51 for temporarily storing a facsimile image signal, a buffer memory 59 and a page memory 61, and a compression / decompression unit 60 and an image restoration processing unit 62 for processing predetermined image signals, respectively. Provided, and each of the processing units 20, 51, 52, 53, 54, 59,
60 and 61 are connected to the MPU 50 via the bus 63. Further, the operation panel 40 is directly connected to the MPU 50, and a printer control unit 55 for controlling the laser printer 70 in the printer unit 1 is connected to the MPU 50.

First, the receiving operation of the facsimile apparatus will be described. When there is an incoming call from the other party's facsimile machine via the telephone line, the incoming call signal is sent to the NCU 54 and the modem 53.
After the data is input to the MPU 50 and detected, a line connection process with the destination facsimile device is executed in accordance with a predetermined facsimile line connection procedure. After the line connection processing, the compressed image signal transmitted from the other party's facsimile apparatus is input to the modem 53 via the NCU 54 and demodulated, and the demodulated compressed image data is compressed from the HDLC frame by the HDLC analysis unit 52. After performing a predetermined HDLC reverse processing for extracting only image data, the image data is stored in the compression image memory 51. When the compressed image signals of all pages are received, a line disconnection process with the destination facsimile apparatus is executed in accordance with a predetermined facsimile line disconnection procedure.

The image data stored in the compression image memory 51 is decompressed by the compression / decompression unit 60 into actual image data using the page memory 61 for each page and expanded. The image data developed in the page memory 61 is
It is input to the image restoration processing unit 62. The MPU 50 sends a state signal to the image restoration processing unit 62. The image data is converted into high-density binary image data by a process described in detail later in the image restoration processing unit 62, and then output to the printer control unit 55. In synchronization with the transfer of the image data to the printer control unit 55, a recording start signal is output from the MPU 50 to the printer control unit 55, and the printer control unit 55 transmits the control signal and the image data to the laser printer 70, and Execute data recording.

Next, the transmission operation of the facsimile machine will be described. When all of the above image reading operations by the image reading unit 20 are completed, a line connection process with the facsimile machine of the other party is executed. After the completion of the line connection processing, the compressed image data stored in the compression image memory 51 is temporarily stored in the page memory 61 by the compression / expansion unit 60.
After that, recompression processing is executed in accordance with the capability of the facsimile machine of the other party, and is stored in the compression image memory 51. The stored image data is sent to the HDLC analysis unit 5
After a predetermined HDLC frame processing process is performed by the modem 2, the signal is modulated by the modem 53 into a predetermined facsimile signal. The facsimile signal modulated with the image data is transmitted to the destination facsimile apparatus via the NCU 54 and the telephone line. When the transmission of the image data is completed, a line disconnection process with the destination facsimile apparatus is executed according to a predetermined line disconnection procedure, and the transmission operation ends.

The MPU 50 performs predetermined processing based on an operator's command input using the operation panel 40, and outputs instruction information to the operator and status information of the facsimile apparatus to the operation panel 40. indicate.

(3) Image Restoration Processing Unit FIG. 3 is a block diagram of the image restoration processing unit 62 shown in FIG. The image restoration processing unit 62 includes a halftone data restoration unit 101 for restoring multi-value halftone data from the received binary image data. In this halftone image restoration process, when each pixel is output to a so-called multilevel printer that prints in multiple gradations, recording is performed using multilevel halftone data restored from pseudo halftone binary image data. Thereby, a multi-tone image can be formed.

The binary image data read serially from the page memory 61 is input to a 9 × 9 matrix memory circuit 100. 9 × 9 matrix memory circuit 1
00 generates data of each pixel in a 9 × 9 window centering on the target pixel,
Is output to the image area determination unit 102 and the smoothing processing unit 103. The 9 × 9 matrix memory circuit 100 will be described later in more detail.

The halftone data restoration unit 101 includes an edge enhancement component calculation unit 111, a smooth value calculation unit 112, an edge discrimination unit 113, and a restoration data calculation unit 114. The edge emphasis component calculation unit 111 generates data of the maximum value of the absolute value of the edge discrimination amount indicating the index of the edge discrimination based on the pixel data input from the 9 × 9 matrix memory circuit 100, In addition to outputting the data to the restored data calculation unit 114 and the data of the amount of edge enhancement used when performing edge enhancement in a predetermined area, the data is output to the restored data calculation unit 114. Also, the edge discriminating unit 1
13 outputs an edge discrimination signal to the edge enhancement component calculation unit 111 and the smoothed value calculation unit 112 based on the maximum value of the input absolute value of the edge discrimination amount. Further, the smoothed value calculator 112 calculates a smoothed value obtained by smoothing pixel data in a predetermined area based on the input pixel data and the edge discrimination signal, and outputs the smoothed value to the restored data calculator 114. . Further, the restoration data calculation unit 114 restores the multi-value halftone image data based on the input edge enhancement amount and smoothing amount, and outputs the restored halftone image data to the selector 106. The halftone data restoration unit 101 will be described later in more detail.

The image area discriminating section 102 includes the adjacent state detecting section 12
1 and a halftone discriminating unit 123. The adjacent state detection unit 121 determines the same type of pixels in a predetermined area in four main and sub scanning directions and the four oblique directions based on the pixel data input from the 9 × 9 matrix memory circuit 100. An adjacent discrimination value indicating an adjacent state is calculated and output to the halftone discriminating unit 123. Further, the halftone discriminating unit 12
Reference numeral 3 designates, for each pixel, a predetermined area centered on the pixel of interest based on the input adjacent determination value, and determines whether the pixel is a halftone area or a non-halftone area, and indicates an image area determination result indicating the determination result. A signal is generated and output to the selector 106. Here, when the predetermined area is determined to be a non-halftone area,
An H level image area determination signal is output. On the other hand, when it is determined that the area is a halftone area, an L level image area determination signal is output.

The smoothing processing unit 103 performs a predetermined smoothing process based on the broken line detection signal,
The processed binary image data is input to input terminal A of selector 106.
Output to

The selector 106 determines that the image area determination signal is H
Level, that is, in the non-halftone region,
The binary image data output from the processing unit 103 is selected and simply applied to black and white in a multi-valued expression, and then output to the printer control unit 55. On the other hand, when the image area determination signal is H
When it is at the level, that is, in the halftone area, halftone image restoration data output from the halftone data restoration unit 101 is selected and output to the printer control unit 55.

(4) 9 × 9 Matrix Memory Circuit As shown in FIG. 4, the 9 × 9 matrix memory circuit 100 is located at each position of the matrix in the 9 × 9 window W9 centered on the target pixel P44. The pixel data P00 to P88 are generated, and the halftone data restoring unit 101
Is output to the image area determination unit 102 and the smoothing processing unit 103. 4, the arrow MS indicates the main scanning direction,
Arrow SS indicates the sub-scanning direction. I is the window W
9 is a parameter indicating the position of the main scanning line, and j is a parameter indicating the position of the sub-scanning line. This 9x9
The matrix memory circuit 100 is a memory configured to refer to pixel data of four pixels before and after the processing pixel P44 in the main and sub-scanning directions. That is, the pixels P _ij (i = 0, 1,..., 8; j =
0, 1,..., 8). here,
Each pixel P _ij represents pixel data of 0 or 1, and i and j represent a main scanning direction and a sub scanning direction, respectively.

FIG. 5 shows a 9 × 9 matrix memory circuit 1.
It is a circuit diagram of 00. This memory circuit 100 mainly stores image data input based on a clock CLK2 having the same cycle as the transfer clock cycle of the binary image data input from the page memory 61, that is, one cycle of the image data. Eight FIFO memories DM for delaying by one horizontal period which is one scanning time in the scanning direction
1 to DM8 and 72 (9 columns × 8) D-pixels which output image data input in synchronization with the clock CLK2 with a delay of one cycle period of the clock CLK2.
Flip-flops D01 to D08, D11 to D18, D
21 to D28,. . . , D81 to D88. Here, each FIFO memory and each D-flip-flop store one pixel data, and the 9 ×
Nine pixel data are stored. The operation clock C
LK2 has the same frequency as the transfer clock of the video image data before restoration.

After the binary image data serially output from the page memory 61 is input to the flip-flop D01, the eight flip-flops D01 connected in cascade are connected.
To D08 and input to the FIFO memory DM1, and then connected in cascade to the eight FIFOs.
It is output via memories DM1 to DM8. The image data output from the FIFO memory DM1 is input to the flip-flop D11 and then output via the cascade-connected flip-flops D11 to D18. Also, FI
The image data output from the FO memory DM2 is input to the flip-flop D21 and then output via the cascade-connected flip-flops D21 to D28. Hereinafter, similarly, the image data output from each of the FIFO memories DM3 to DM8 is
Flip-flops D31-D38, D41-D4 cascaded after being input to 31-D81, respectively.
8,. . . , D81 to D88.

In the 9 × 9 matrix memory circuit 100 configured as described above, the one-dot pixel data first input to the circuit
88, the image data input at that time is output as pixel data P00, and each pixel on the main scanning line of i = 0 in a 9 × 9 window from each of the flip-flops D01 to D08. Data P0
1 to P08 are output from the FIFO memory DM1 and the respective flip-flops D11 to D18, and each pixel data P10 on the main scanning line of i = 1 in a 9 × 9 window.
To P18, and the respective pixel data P20 to P28 on the i = 2 main scanning line in the 9 × 9 window are output from the FIFO memory DM2 and the flip-flops D21 to D28, respectively. , And finally, the respective pixel data P30 to D30 from the FIFO memories DM3 to DM8 and the flip-flops D31 to D88.
P88 is output.

(5) Halftone Data Restoring Unit (5-1) Window for Edge Enhancement and Smoothing Window
In order to restore the multi-valued image data from the value image data, pixel data around the pixel of interest is added and a smoothing process is performed to calculate a smoothed value, and the multi-valued image data is restored based on the smoothed value. ing.

In order to restore multi-value data from pseudo halftone data, it is conceivable to add pixel data around the processing pixel. FIG. 6 is a diagram illustrating an example of a binary image obtained when a uniform image in which the area of a black pixel is 7/16 of the entire area is binarized using an error diffusion method. FIG. 3 is a diagram showing an example of a binary image obtained when the uniform image is binarized using a dither method. When restoring from pseudo-halftone binary image data to, for example, 5-gradation multi-valued image data in which white is 0 and black is 4, using a 2 × 2 window, for example, The data varies with values of 0 to 3 in the image of FIG. 6, while it varies with values of 1 to 3 in the image of FIG. From this, the following two problems are apparent.

(A) For example, when restoring to multi-valued image data of N or more gradations, the multi-valued image data must be restored based on N or more pixels, and a square window (both spatial filter and window) ), It is necessary to use a window having a size of one side equal to or larger than the square root of N. That is, in the case of N ≧ 3, it is necessary to use a window whose one side has a size of 2 dots or more.

(Equation 1)

(B) If the restoration process is not performed using a window having one side longer than the interval of the period of the original pseudo halftone binary image data, the restored halftone texture is applied to the restored image. (Moire, etc.) may occur.
For example, in the example of the restored image in FIG. 7, since there is a periodicity for every four dots, it is necessary to perform the restoration process using a window having one side of four dots or more. However, if the size of the window is increased, the image after restoration
May occur.

Therefore, it is necessary to use a window satisfying the following conditions in the smoothing process at the time of the restoration process.
The following three are called window size requirements. (A) It has a size equal to or greater than the number of tones of the restored image. (B) One side is larger than the interval of the cycle of the original pseudo halftone binary image data. (C) The size of one side is small so that “blur” does not occur in the restored image.

Next, FIGS. 8 to 32 show spatial filters used for multi-valued binary images.

(5-1-1) Smoothing Window The size of the spatial filter (window) used in the present embodiment is determined in consideration of the requirements for the size of the window, and the pseudo gradation of the binary image data of pseudo halftone. The number of pixels is larger than the number of pixels, and the number of pixels is larger than the number of gradations of the laser printer 70 (in the second embodiment, the number of pseudo gradations). To prevent this, the size of the window must not be increased unnecessarily. Further, in the technical field of a facsimile apparatus to which the halftone data restoration unit 101 is applied,
The number of pseudo gradations of the value image data is 16, 32 or 64, and a pseudo halftone binary image of 64 gradations or more appears to be hardly changed by human eyes as compared with that of 32 gradations.

Therefore, in the present embodiment, the image data of 50 tones can be restored by using a spatial filter using a 7 × 7 window W7 shown in FIG. 8 except for the edge region. The 7 × 7 window W centered on the pixel of interest P44 (indicated by *) is shown in FIG.
7 is a filter for performing a smoothing process. As will be described later, in the 7 × 7 black pixel counting unit 205 (see FIG. 39) of the halftone data restoration unit 101, the window W
7 to output a smooth component. The reason why the weighting in the spatial filter is uniform is that the pseudo halftone binarization method is the area gradation. Further, in this embodiment, the shape of the spatial filter is a square, but another shape such as a regular hexagon may be used.

(5-1-2) Window for Edge Enhancement By the way, an image originally contains various spatial frequency components. The purpose of using the above-mentioned smoothing filter is to remove a spatial frequency component of the pseudo halftone texture by a smoothing process. However, as a side effect thereof, high-frequency components other than texture are lost. For example, using the 7 × 7 window W7 in FIG.
2) Attenuation of high-frequency components equal to or higher than a spatial frequency component having one cycle of a pixel is provided. Therefore, in order to obtain a desired restored image, some means for storing high-frequency components is required. Conventionally, it has been proposed to reduce the smoothing window for an image having a large edge component, that is, a high-frequency component, and is also used in this embodiment. In the present embodiment, considering the preservation of high-frequency components by edge enhancement, a method for that purpose will be described below including a conventional example and a comparative example.

First, multi-valued image data for a certain pixel of interest is calculated using a 7 × 7 window W7, and the multi-valued image data for four adjacent pixels adjacent to the pixel of interest in the four main and sub-scanning directions are calculated. After calculating the value image data,
A description will be given of obtaining the edge enhancement amount based on the calculated multi-valued image data. FIG. 9 shows an example of a conventional Laplacian filter (secondary differential filter) used when performing edge enhancement on multi-valued image data. In the calculation using this Laplacian filter, FIG.
As shown in the numerical values in the figure, the value obtained by quadrupling the pixel data of the target pixel P44 is changed to the target pixel P44 by four in the main and sub-scanning directions.
Four adjacent pixels P34, P43, P4 adjacent in the direction
5 and P54 are subtracted to determine the edge enhancement amount.

Similar to the Laplacian filter of the prior art, the center of the target pixel P44 as shown in FIG.
The smoothed value in the 7 × 7 window W7a obtained by shifting the window W7 by one dot in the direction SS ′ opposite to the sub-scanning direction SS is subtracted from the smoothed value in the × 7 window W7. From the smoothed value in the 7 × 7 window W7, each smoothed value of a 7 × 7 window obtained by shifting the window W7 by one dot in the two directions MS and MS ′ in the sub-scanning direction SS and the main scanning direction is subtracted. After that, the respective values obtained by the subtraction are added to obtain the edge enhancement amount. FIG. 11 shows a method of obtaining the edge enhancement amount in the form of a spatial filter.

However, according to this method, as is apparent from FIG. 11, the central 5 × 5 pixels including the target pixel P44 are used.
Window is not calculated. Further, since the calculation of the high-frequency component in the image data is not performed, the edge of the high-frequency component cannot be emphasized for an image finer than seven dots. In addition, when the number of pixels to be processed is small, an erroneous edge enhancement amount is easily output.

Next, as shown in FIG. 12 and FIG.
From the smoothed value in the area AW3 of the 3 × 3 window W3 centered on the target pixel *, 5 × 5 centered on the target pixel *
A case will be described in which the smoothed value in the area AW35 excluding the area AW3 is subtracted from the area of the window W5 to obtain the edge enhancement amount. The difference between the above-described methods of FIG. 10 and FIG. 11 is that the pixel values around the target pixel are subjected to the calculation to emphasize the edges of the high-frequency components.

Now, as shown in FIG. 13, the image to be operated is an area Aw in which the left half is entirely white pixels and an area Ab in which the right half is all black pixels. When the target pixel * exists on the boundary between the pixel and the black pixel, the number of black pixels in the area AW3 is 6, and the number of black pixels in the area AW35 is 9. Therefore, the edge enhancement amount is given by the following equation in consideration of the ratio of the number of pixels.

[0050]

(Equation 2)

However, since the maximum value of the edge enhancement amount in this direction is 16, the edge enhancement amount obtained by the above calculation is considered to be too small. The problem with the edge emphasizing area of this comparative example (FIGS. 12 and 13) is that the edge emphasis amount output when the pixel of interest is at the center of the calculation target area and an edge exists near the pixel of interest is too small. Is that This indicates that it is impossible to obtain the edge enhancement amount in all directions from the difference in the number of black pixels between the two regions. Further, since the width of the window of the area AW3 is three pixels, only a thin line having three or more pixels can be edge-emphasized.

Therefore, it is conceivable to arrange the pixel of interest * on the boundary between two regions used when calculating the edge enhancement amount. Now, as shown in FIG. 14B, two windows (the area indicated by “1” and the area “1”) in which the target pixel (indicated by *) is located on the boundary between the areas Aw and Ab.
(A region indicated by -1 "), and a spatial filter for edge enhancement that calculates an edge enhancement amount is used.
The value of the pixel at the position indicated by "1" is added, and the value of the pixel at the position indicated by "-1" is subtracted to obtain the edge enhancement amount.
(A) as shown in FIG.
When the edge enhancement amount is calculated for an image in which the right half is an area Ab in which the right half is all black pixels, the absolute value of the edge component amount is calculated as shown in FIG. It becomes the maximum on the boundary between the two regions Aw and Ab.

However, in this method, since the sign of the edge component amount is not known, there is a problem that the method is directly used as the edge enhancement amount. Therefore, it is considered that the sign of the edge is correctly determined by placing the target pixel at the center of one of the regions.

From the above considerations, the following improvement is required assuming that the pixel of interest * is located at the center of one of the two regions used for calculating the edge enhancement amount. (D
1) An edge enhancement amount is obtained for each direction. Specifically, to obtain the edge enhancement amounts in the up, down, left, right, and oblique directions, for example, eight (four pairs) windows as shown in FIGS. 15 to 22 are required. An arithmetic circuit for obtaining an edge enhancement amount and an arithmetic circuit for obtaining an edge component which is the maximum edge enhancement amount are provided for each of a plurality of directions. (D2) With respect to one direction (for example, left and right), edge enhancement amounts in two directions (for example, left and right) are obtained.

As described above, the spatial filter is set to 2
This is because it is difficult to obtain the edge enhancement amounts in a plurality of directions at once if only the difference is obtained from the difference in the number of black pixels in one area. Therefore, it is necessary to obtain edge components in a plurality of directions, and then to obtain a final edge enhancement amount. In this embodiment, the one having the largest size in the process was selected. For the direction that originally needs edge enhancement, the edge component of the pseudo-halftone texture can be ignored,
For higher orientations, the value cannot be ignored. If the sum of the edge components in a plurality of directions is a simple sum, the sum of the edge components of the texture is used as the edge enhancement amount, and the value can be large. The present invention is not limited to this, and the sum of the edge components in a plurality of directions may be used as the final edge enhancement amount, or each set may include an edge component in a plurality of directions, and each set may include an edge component in a plurality of directions. May be calculated, and the largest sum of the edge components of each set may be used as the final edge enhancement amount.

In this embodiment, the processing of (d1) and (d2) is performed by the edge component 1 calculation unit 202.
Further, the following improvements are required. (D3) An edge enhancement amount is obtained for each spatial frequency to be enhanced. There are various spatial frequencies for which edge enhancement is desired, and there is a window size suitable for each spatial frequency. The size of this window is the width of the window in the direction of edge enhancement, as described later in detail. Originally, the larger the window size, the lower the probability of emphasizing the pseudo-halftone texture, but at the same time, the higher frequency components cannot be emphasized. Therefore, windows having a plurality of sizes are prepared, edge enhancement amounts of spatial frequency components suitable for the respective windows are obtained, and a final edge enhancement amount is obtained therefrom.

In this embodiment, in addition to the window having a width of 3 shown in FIGS. 15 to 22, as shown in FIGS.
Four second derivative windows are used to emphasize an image having only one pixel width in the edge direction. That is, these windows are used to emphasize higher frequency edges than the first derivative windows shown in FIGS. 15 to 22 described above. Here, the edge enhancement amount is obtained by doubling the number of black pixels at the position indicated by “2” in the figure,
This processing is performed by subtracting the number of black pixels at the position indicated by -1 ″.
03. The first-order differential filters shown in FIGS. 15 to 22 have the same spatial frequency characteristics as those of the second-order differential filters having a width of 3 and a shape similar to that of FIGS. The reason for using such a primary differential filter is that
This is because the influence of the above-described pseudo halftone texture is minimized. Further, the “window width” refers to the width in the edge enhancement direction of the two windows to be subtracted, and is, for example, 1 in FIG. 23 and 1 in FIGS. 24 and 27.

However, in place of the window shown in FIG. 24, it is not good to use a combination of the two primary differential windows shown in FIGS. 27 and 28 (to select the edge enhancement amount which is superior). The image shown in the upper part of FIG. 29 is shown in FIG.
4, the edge enhancement amount when scanning is performed in the scanning direction using the windows shown in FIGS. 27 and 28 and an edge component is obtained is shown in the lower part of FIG. If the combination of the windows shown in FIGS. 27 and 28 is to be performed, the edge enhancement amount becomes 7 at the main scanning position 0 and becomes -7 before and after that.
The whole concentration is not preserved. On the other hand, when the window shown in FIG. 24 is used, the edge enhancement amount becomes 14 at the main scanning position 0 and becomes -7 before and after that, so that the entire density is preserved. This is the reason for using the second derivative window shown in FIGS. Thus, it can be said that the secondary differential filter shown in FIG. 24 is excellent in density preservation. However, on the contrary, it can be said that it is easily affected by the texture of the pseudo halftone. To summarize the above, emphasis is placed on eliminating the influence of the pseudo-halftone texture included in the edge amount in the unnecessary direction for the window of width 3, and on the density retention of the window of width 1. It can be said that there is. This is because a window having a width of 1 is intended for an image that does not originally include a pseudo halftone texture such as a thin line image. (D4) A required edge enhancement amount is obtained from the plurality of edge enhancement amounts.

In order to correctly restore an image,
The following two conditions are required. (D5) The output range of the smoothing window and the reference range of the edge enhancement window are substantially the same. If the range of the edge enhancement is narrow, an unnecessary smooth component remains in a range where the edge enhancement is not performed. Conversely, if the range of the edge enhancement is wide, it is not effective in preserving the edge component lost by the smoothing process. However, it is effective in terms of mere edge enhancement. Therefore, using those N ₁ pixels as a smoothing window, when used as the N ₂ pixels as edge emphasizing window, and N ₁ ≧ N _2. (D6) Each of the edge emphasis windows of a plurality of frequency bands has an image of a frequency band to be emphasized, but in that band, the size is larger than the edge emphasis amounts of the windows having different sizes. There must be. That is, the width N
The edge amount by the window of the pixel must be larger than the edge amount of any other size window for an image having one cycle of (2 × N) pixels.

FIG. 30 shows that the thin line image shown on the upper side is 7 × 7
17 and FIG. 1 and FIG.
8, the edge enhancement amount when processing is performed in the window shown in FIG. Explaining the point d5, the smoothing amount is output in the range of -3 to 3 in the scanning direction, and the edge enhancement component is output in the range of -4 to 4. If the range of edge enhancement is narrow, unnecessary smooth components remain in a range where edge enhancement is not performed. Conversely, if the range of edge enhancement is wide, edge enhancement is performed to an extra range and unnecessary edge enhancement components remain. In the present embodiment, the range of the edge enhancement is too wide by one pixel, but a means for determining whether or not to perform edge enhancement is separately provided. In the range of performing edge enhancement, the edge enhancement component is more important. Therefore, it can be said that it is an allowable range. The d6th point will be described. In FIG. 30, in the range of -1 to 1 in the scanning direction,
It is necessary to convert the output value of the window of width 1 in FIG. 24 so that the absolute value is larger than the output value of the window of width 3 in FIGS. In a simple comparison, there is a possibility that the edge amount when a large window is used is selected depending on the difference in the area ratio of the windows. Therefore,
In this embodiment, the output of the edge component 2 calculation unit 203 is multiplied by a constant K1 by the multiplication circuit 207. Here, it can be said that the constant K1 needs to be a value larger than 1. Also, the smaller the window, the greater the error, so it can be said that a value smaller than the simple area ratio 3 should be selected. With respect to the edge enhancement direction, the edge enhancement amount obtained by using a window having a width of N pixels can detect an image of a lower frequency than an image having one cycle of (2 × N) pixels. From this, it can be said that the edge enhancement amount for an image having one cycle of the (2 × N) image should be obtained from a window having a width of N pixels. It can be said that the above setting satisfies this condition.

(5-1-3) Window for Detecting Edge Area On the other hand, in order to determine whether or not the area is an area to be edge-emphasized (edge area), it is necessary to set the processing pixel at the center of the window as described above. Not suitable. The size of the window for detecting the edge region needs to be large enough to include a pattern peculiar to the pseudo halftone. Therefore, if the pixel to be processed is set at the center of the window, and the windows of the same size are provided on both sides of the window in the edge detection direction, the memory required for that purpose increases.

Therefore, an edge area detection window is
A window as shown in FIG. 14B is used. This is because the edge area detection requires only the size of the edge amount. As in the case of the edge enhancement amount, a window is required for a plurality of directions and a plurality of frequency bands, and a means for obtaining an edge enhancement amount to be obtained from the plurality of edge enhancement amounts is required.

The six windows (3 pairs) shown in FIGS. 31 to 36 are pairs of windows for detecting an edge area used in this embodiment. These windows are up / down, left / right, left-up diagonal, right-up diagonal, up / down,
It detects whether there is an edge in the left or right direction. In the windows of FIGS. 35 and 36, higher-frequency edges are detected than the other four windows. The lack of diagonal windows in this high-frequency edge detection is due to the distributed dither,
This is because a pattern in an oblique direction may be erroneously detected due to error diffusion.

The reason why the processing pixels are included in the left window in FIG. 32 and in the right window in FIG. 36 is as follows. In the case of an edge detection window,
If the processing pixel is located at the boundary between two windows, there is always a point at which the image cannot be detected for an image in which black and white are switched at a high frequency, that is, at a cycle shorter than the width of the window in the scanning direction. For example, in FIG. 37, the edge enhancement amount when the windows shown in FIGS. 32, 36, and 38 are scanned in the direction of the arrow with respect to the thin line image having a width of two pixels shown on the upper side is shown on the lower side. It can be seen that there is a point where the edge enhancement amount cannot be detected. Therefore, two pairs of two windows for detecting an edge in a certain direction are prepared, and a processing pixel is arranged at a portion of one of the windows that is in contact with the other window, so that one pair of the windows is arranged. Assuming that there is a processing pixel in one window, the other window has a processing pixel on a different side. Thus, two pairs of windows in which the processing pixels are alternated may be used. In this embodiment,
Combinations of windows that detect edge components in the same direction, albeit with different window sizes (FIGS. 31 and 3
5, FIG. 32 and FIG. 36) are subjected to the above-described treatment. For example, in the pair of windows in FIG. 31, the processing pixel is in the lower window, and in the pair of windows in FIG. 35, the processing pixel is in the upper window. Further, as described above, in another pair, the processing pixels are included in the left window in FIG. 32 and are included in the right window in FIG. Further, the reason why windows of different sizes are combined into one pair as in the window of FIG. 31 and the window of FIG. 35 is to prevent erroneous detection even for different spatial frequencies.

(5-2) Configuration of Halftone Data Restoring Unit Next, the configuration and operation of each unit of the halftone data restoring unit 101 shown in FIG. 39 will be described. In the following drawings, the number of each data indicates the number of bits, and is “7 (S
1) "indicates that the data is 7-bit data including 1 bit. For detecting the edge area, the edge area detection component having the largest size obtained from the windows shown in FIGS. It is obtained by the calculation unit 201 and output to the comparator 206. If (edge area detection component) <J1, the comparator 206 regards the image as a uniform density image and does not perform edge enhancement processing. However, the edge area detection calculation unit 201 also detects a broken line, and if a broken line is detected, the above-described clear signal becomes:
Its execution is stopped by the logic gate 216.

Here, the necessity of the broken line detection will be described. Pseudo halftone 2 for thin line image or straight line image with low density
When the value is converted, the image obtained thereby becomes a broken-line image as shown in FIG. For example, consider the detection of the amount of edge enhancement of a dashed image as shown in FIG. 40 using the window shown in FIG. In this case, since the number of black pixels constituting the broken line is small, it is likely that the pixel is determined as a non-edge area. If determined to be a non-edge area, the restored image will be blurred.

Therefore, even if the edge area detection component does not reach the threshold value J1, if it is equal to or greater than the threshold value J3 smaller than J1 and if the number of black pixels in one of the windows is 0, the broken line It was determined to be present and included in the edge area. In this embodiment, only the black dashed line is targeted on a white background, but, of course, a white dashed line may be targeted on a black character.

In the edge component 1 calculation unit 202, FIG.
The maximum edge component obtained from the window shown in FIG. 22 is output.
The maximum edge component obtained from the window shown in FIG. 28 is output. The maximum here means that the size (absolute value) is the maximum. The magnitudes of the edge components 1 and 2 of the plurality of spatial frequencies are compared by the comparison selector 211, and the larger one is output as the final edge enhancement amount.

However, the edge component 2 is regarded as 0 under the following conditions. (E1) (the size of the edge component 2) <J2. (E2) There are no small number of pixels in a 3 × 3 window centered on the processing pixel. Since the edge component 2 uses a small window, erroneous determination of an edge is likely to occur by processing such as considering a pattern peculiar to the pseudo halftone as an edge. Therefore, when the magnitude is smaller than the threshold value J2 as in the condition (e1), it is regarded as an error and set to 0. The condition (e2) indicates that the width of the window has only a width of one pixel in the direction in which the window is emphasized, so that the emphasis under that condition is meaningless.

If the window shown in FIG. 24 is arranged at the position shown by the dotted line with respect to the image shown in FIG. The emphasis amount is + (black).
The image shown in FIG. 41 is vertically emphasized by the windows shown in FIGS. 15 and 16, and the amount of enhancement should be − (white). Therefore, the above-mentioned constraint (e2) is provided, and the emphasis amount by the window shown in FIG. 24 is set to 0.

In the halftone data restoring unit 101 shown in FIG. 39, the comparator 209 compares the absolute value of the edge component 2 generated by the absolute value circuit 208 with the threshold value J2. The output signal passes through the OR circuit 210 and clears the output of the multiplication circuit 207.

The 3 × 3 minority pixel detecting section 204 performs the above (e)
It is detected whether or not there is a small number of pixels in a 3 × 3 window centered on the processing pixel of 2).
07 output is cleared.

In this embodiment, the above (e1), (e)
Although the condition 2) is executed only for the edge component 2, it may be executed for the edge component 1. In this case, the value of J1 in (e1) and the size of the window in (e2) need to be appropriate for the size.

If the conditions (e1) and (e2) are not satisfied, the edge enhancement amount 2 is multiplied by the constant K1 (conversion constant for the edge enhancement amount). Is entered. The edge area detection calculation unit 201 also detects a broken line at the same time. That is, using a signal obtained from the logic circuit 4 in which all the pixels in the window are white, the condition is that one of the windows in the set is all white and the magnitude of the edge amount is larger than J3. It is assumed that a broken line is detected.

As will be described later, if it is determined that the image is a broken line, no edge enhancement amount is output. The edge component 2 output from the edge component 2 calculator 203 includes:
The two types of filters are adjusted by multiplying them by a predetermined conversion value. The 7 × 7 black pixel number counting unit 205 obtains a smooth component by counting the number of black pixels in the 7 × 7 smoothing window centering on the processing pixel, and inputs the smoothed component to the addition circuit 212. The value is compared with “24” by the comparator 213 to determine which of white and black is the smaller number of pixels.
Sent to The size of this smoothing window is
It may be changed depending on whether it is an edge region or not.

Finally, the addition circuit 212 mixes (adds) the edge enhancement amount obtained from the edge enhancement window and the smoothing amount obtained from the smoothing window, and rounds the desired gradation number by the scaling circuit 214. Thus, the pseudo halftone image multi-value data is restored to binary data.

(5-3) Configuration of Each Unit of Halftone Data Restoring Unit The configuration of each unit of the halftone data restoring unit 101 will be described below. Edge area detection calculation section 201 (FIGS. 42 and 4)
3), the edge component 1 calculator 202 (FIGS. 44 and 45) and the edge component 2 calculator 203 (FIG. 46) include a logic circuit B circuit (FIG. 47), a logic circuit C circuit (FIG. 48), and a logic circuit D Using a circuit (FIG. 49) or a logic circuit E circuit (FIG. 50), the number of black pixels in one of the windows is counted, and an edge component is obtained using a subtractor.

That is, the 21st spatial filter in FIG. 31 and the 22nd spatial filter in FIG. 32 are edge detecting spatial filters in the sub-scanning direction and the main scanning direction, respectively.
The twenty-first spatial filter obtains a value of 4 from the smoothed value of the 4 × 7 window W47 centered on the boundary center point between the pixels P54 and P64, based on the boundary center point between the pixels P14 and P24.
A spatial filter for performing a filtering process by subtracting a smoothed value of a × 7 window W47a;
The 22nd spatial filter calculates the 7 × 4 window W74a centered on the boundary center point between the pixels P46 and P47 from the smoothed value in the 7 × 4 window W74 centered on the boundary center point between the pixels P42 and P43. Is a spatial filter that performs a filtering process by subtracting the smoothed value of. That is, the logic circuits D1 and LD2 calculate the number of black pixels in the windows W47a and W47, respectively, and the subtractor calculates the difference between the two windows W47 and W47a. Arithmetic processing is similarly performed on the spatial filters of FIGS. When the maximum value of the obtained edge amounts is determined by the comparator 206 to be smaller than the threshold value J1, the edge enhancement amount is not output.

(5-3-1) Edge Area Detection and Calculation Unit First, the edge area detection and calculation unit 20 shown in FIG. 42 and FIG.
1 will be described. The edge region detection calculation unit 201
A circuit for calculating the maximum value of the amount of edge components for detecting an edge area, and includes eight logic circuit D circuits LD1 to LD for performing a predetermined logic operation (hereinafter, referred to as a logic circuit D operation).
8, four logic circuits C1 to LC4, six subtractors SU1 to SU6, and four comparison circuits C1 to C4
, Five comparison selectors CS1 to CS5, one absolute value circuit AB, four input OR circuit OR5, four OR circuits OR1 to OR4, and four AND gates AND1 to AN.
D4. Also, as already described, FIG.
36 to 21 show the 21st to 26th spatial filters used when calculating the edge amount for edge region discrimination.
Each of the pixels of interest in the 21st to 26th spatial filters is P44, and 9 × 9 for calculating the edge amount.
Is located at the center of one region.

Here, two logic circuits D circuits LD1, L
D2 and the subtractor SU1, the second signal shown in FIG.
One spatial filter and two logic circuits D circuit LD
3, the LD4 and the subtractor SU2 make up the 22nd spatial filter shown in FIG. The two logic circuit D circuits LD5 and LD6 and the subtractor SU3 form a twenty-third spatial filter shown in FIG. 33, and the two logic circuit D circuits LD7 and LD8 and the subtractor SU3.
4 constitutes the twenty-fourth spatial filter shown in FIG. Furthermore, two logic circuits C circuit LC
35, the 25th spatial filter shown in FIG. 35 is constituted by the LC1, LC2 and the subtractor SU5, and the 26th spatial filter shown in FIG. 36 is constituted by the two logic circuits C3, LC4 and the subtractor SU6. Make up the filter.

Here, each logic circuit D circuit LD1 to LD8
Performs the logic circuit D operation on the input 21-bit pixel data, and then outputs 5-bit data of the operation result. Further, each of the subtracters SU1 to SU6
Respectively subtracts 5-bit data input to the input terminal A from 5-bit data input to the input terminal B, and then outputs 7-bit data including a sign bit of the subtraction result. Further, each of the comparison selectors CS1 to CS5
Selects the data having the largest absolute value among the two pieces of input data, and outputs 7-bit data including the selected sign 1 bit.

More specifically, the 21-bit pixel data in the window W37a shown in FIG.
After being input to the circuit LD1, the logic circuit D circuit LD1
Is output to the input terminal A of the subtractor SU1. Also, after the 21-bit pixel data in the window W37 in FIG. 31 is input to the logic circuit D circuit LD2, the data output from the logic circuit D circuit LD2 is input to the input terminal B of the subtractor SU1. Then, the data output from the subtractor SU1 is input to the comparison selector CS1.

After the 21-bit pixel data in the window W37a in FIG. 32 is input to the logic circuit D circuit LD3, the data output from the logic circuit D circuit LD3 is input to the input terminal A of the subtractor SU2. . FIG. 32
After the 21-bit pixel data in the window W37 is input to the logic circuit D circuit LD4, the data output from the logic circuit D circuit LD4 is input to the input terminal B of the subtractor SU2. Then, the data output from the subtractor SU2 is input to the comparison selector CS1. Further, the data output from the comparison selector CS2 is further input to the comparison selector CS3.

After the 21-bit pixel data in the window W37a in FIG. 33 is input to the logic circuit D circuit LD5, the data output from the logic circuit D circuit LD5 is input to the input terminal A of the subtractor SU3. . FIG. 33
After the 21-bit pixel data in the window W37 is input to the logic circuit D circuit LD6, the data output from the logic circuit D circuit LD6 is input to the input terminal B of the subtractor SU3. Then, the data output from the subtractor SU3 is input to the comparison selector CS2.

After the 21-bit pixel data in the window W37a in FIG. 34 is input to the logic circuit D circuit LD7, the data output from the logic circuit D circuit LD7 is input to the input terminal A of the subtractor SU4. . FIG.
Is input to the logic circuit D circuit LD8, and then the data output from the logic circuit D circuit LD8 is input to the input terminal B of the subtractor SU4. Then, the data output from the subtractor SU4 is input to the comparison selector CS2. Further, the data output from the comparison selector CS2 is further input to the comparison selector CS3. The data output from the comparison selector CS3 is further input to the comparison selector CS5.

After the 21-bit pixel data in the window W37a of FIG. 35 is input to the logic circuit C circuit LD1, the data output from the logic circuit C circuit LC1 is input to the input terminal A of the subtractor SU5. . FIG.
Is input to the logic circuit C circuit LC2, and then data output from the logic circuit C circuit LD2 is input to the input terminal B of the subtractor SU5. Then, the data output from the subtractor SU5 is input to the comparison selector CS4.

After the 21-bit pixel data in the window W37a in FIG. 36 is input to the logic circuit C circuit LC3, the data output from the logic circuit D circuit LD7 is input to the input terminal A of the subtractor SU6. . FIG.
Is input to the logic circuit C circuit LC4, and then the data output from the logic circuit C circuit LC4 is input to the input terminal B of the subtractor SU4. Then, the data output from the subtractor SU6 is input to the comparison selector CS4. Further, the data output from the comparison selector CS4 is further input to the comparison selector CS5.

That is, the edge amount of each window output from each of the subtracters SU1 to SU6 is determined by the comparison selectors CS1 to CS
The maximum value is selected by S5. The maximum value is further converted into an absolute value by the absolute value circuit AB1, and output as an edge area detection component.

On the other hand, the edge area detection calculation unit 201 also detects a broken line. Each of the logic circuits D1 to LD8 ORs a signal in which all the pixels in the window are white.
AND circuits AND1 to AN via circuits OR1 to OR4
Output to D4. On the other hand, the comparison circuits C1 to C4 determine the edge amount output from the subtracters SU1 to SU4 as the threshold value J3.
Compare with The AND circuits AND1 to AND4 output the broken line detection signal to the four inputs O when one of the set of windows is all white and the magnitude of the edge amount is larger than J3.
Output through the R circuit OR5.

(5-3-2) Edge Component 1 Calculation Unit The edge component 1 calculation unit 202 shown in FIGS. 44 and 45 uses the window of width 3 shown in FIGS. An edge component 1 is calculated, and a comparison selector 2
11 is output. The edge component 1 calculation unit 202 performs a predetermined logical operation (hereinafter, referred to as a logical circuit E operation) 1.
Two logic circuit E circuits LE11 to LE112, eight subtractors SU11 to SU18, and seven comparison selectors CS1
1 to CS17. As already explained, FIG.
FIGS. 5 to 22 show windows for detecting edge component 1. FIG. Here, two logic circuit E circuits LE11 and LE12
And the subtractor SU11, the first spatial filter shown in FIG. 15 is formed, and two logic circuits E1
2, the LE 13 and the subtractor SU12 constitute the second spatial filter shown in FIG. Further, two logic circuits D14 and LE15 and a subtractor SU13
17 constitutes the third spatial filter shown in FIG. 17, and the two logic circuits E15 and LE16 and the subtractor SU14 constitute the fourth spatial filter shown in FIG. Further, the two logic circuits E17 and LE18 and the subtractor SU15 make the circuit shown in FIG.
20 constitutes the fifth spatial filter shown in FIG. 20 by the two logic circuit E circuits LE18 and LE19 and the subtractor SU16. Furthermore, two logic circuit E circuits LE20, LE2
1 and the subtractor SU17, the seventh signal shown in FIG.
And two logic circuits E2 and LE2
1, the LE22 and the subtractor SU18 constitute the eighth spatial filter shown in FIG.

The first spatial filter shown in FIG. 15 and the second spatial filter shown in FIG.
A spatial filter for detecting edge components in the sub-scanning direction that shares the × 7 window W37 and forms a pair with each other. The first spatial filter is a smoothed value within the 3 × 7 window W37 centered on the pixel of interest P44. Is a spatial filter that performs a filtering process by subtracting the smoothed value of the 3 × 7 window W37a centered on the pixel P14 from the pixel P14. The second spatial filter is based on the smoothed value in the window W37 centered on the pixel P74. This is a spatial filter that performs a filtering process by subtracting the smoothed value of the 3 × 7 window W37b. To calculate the edge component 1, the logic circuit E circuits LE1, LE2, and LE3 calculate the number of black pixels in the windows W37a, W37, and W37b, respectively, and the subtracters SU1 and SU2 calculate the number of black pixels in the two windows W37 and W37a. The difference, the difference between W37b and W37, is calculated. Arithmetic processing is similarly performed for the spatial filters of FIGS.

The outputs of the subtracters SU11 and SU12 are input to the comparison selector CS11, and the larger value is output. The outputs of the subtracters SU13 and SU14 are input to the comparison selector CS12, and the larger value is output.
The outputs of the comparison selectors CS11 and CS12 are input to the comparison selector CS15, and the larger value is output. Further, the outputs of the subtracters SU15 and SU16 are output from the comparison selector C
It is input to S13, and the larger value is output. Also,
Outputs of the subtracters SU17 and SU18 are output from a comparison selector CS1.
4 and the larger value is output. The outputs of the comparison selectors CS13 and CS14 are input to the comparison selector CS16, and the larger value is output. The outputs of the comparison selectors CS15 and CS16 are input to the comparison selector CS17, and the larger value is output as the edge component 1. Thus, the maximum edge component detected in each window is output.

(5-3-3) Edge Component 2 Calculator The edge component 2 calculator 203 shown in FIG. 46 calculates the edge component 2 using the window of width 1 shown in FIGS. The 7-bit data including the 1-bit sign bit whose absolute value is the largest of the edge component amounts is multiplied by a predetermined constant K1 via the scaling circuit 207 and output to the comparison selector 211. Absolute value circuit 208
Is output to the comparator 209 via the. The edge component 2 calculator 203 performs four logic circuit B circuits LB21 to LB2 for performing a predetermined logic operation (hereinafter, referred to as a logic circuit B operation).
4, four logic circuit C circuits LC21 to LC24,
Doubling circuits M21 to M24 and four subtracters SU
21 to SU24 and three comparison selectors CS21 to CS2
4 is provided. As already explained, FIGS.
Indicates the 11th to 16th spatial filters used when calculating the edge component 2 having a higher spatial frequency. Each of the pixels of interest in the 11th to 16th spatial filters is P44, and is located at the center of one 9 × 9 area for calculating the edge amount.

The twenty-first spatial filter shown in FIG. 23 is used for enhancing an image having only one pixel width in the edge direction, and corresponds to a combination of the two spatial filters shown in FIGS. 27 and 28. This operation is performed by the edge component 2 calculation unit 2
At 03, the operation is performed by the logic circuit B circuit LB1, the doubling circuit, the logic circuit C circuit LC1, and the subtractor SU1. That is, the logic circuit B circuit LB1 calculates the number of black pixels in the portion indicated by "2" in the window and calculates the number of black pixels in the portion indicated by "2" in the window. Logic circuit B1 circuit LB to adjust the difference
The output value of 1 is doubled. On the other hand, the logic circuit C circuit LC1
Calculates the number of black pixels in the portion indicated by "2" in the window. The subtractor SU1 calculates the difference between the two and outputs the result as an edge amount. That is, the logic circuit B circuit B21, the logic circuit C circuit LC21, the double multiplication circuit M21, and the subtractor SU
21 constitutes the twenty-first spatial filter shown in FIG. Here, the output of the logic circuit B circuit B21 is doubled by the double multiplier M21 and input to the subtractor SU21. Similarly, a logic circuit B circuit B22, a logic circuit C circuit LC22, a double multiplier M22, and a subtractor SU22
These form the 22nd spatial filter shown in FIG. Further, a logic circuit B circuit B23, a logic circuit C circuit LC23, a double multiplier M23, a subtractor SU23
To form a twenty-third spatial filter shown in FIG. 25, and a logic circuit B circuit B24 and a logic circuit C circuit LC2
The twenty-fourth spatial filter shown in FIG. 26 is configured by the fourth and double multiplying circuits M24 and the subtractor SU24. Arithmetic processing is similarly performed on the spatial filters of FIGS.

The outputs of the subtractors SU21 and SU22 are input to a comparison selector CS21, and the larger value is output. The outputs of the subtracters SU23 and SU24 are input to the comparison selector CS22, and the larger value is output.
The outputs of both comparison selectors CS21 and CS22 are input to comparison selector CS23, and the larger value is output as edge component 2. Thus, the maximum edge component detected in each window having a width of 1 is output.

(5-3-4) Logic Circuit B Circuit, Logic Circuit C Circuit, Logic Circuit D Circuit, Logic Circuit E Circuit FIG. 47 is a block diagram of the logic circuit B circuit LB shown in FIG. As shown in FIG. 47, the logic circuit B circuit L
B is a three-bit operation result indicating the number of "1" (black pixels) bits of the input 7-bit data after performing a predetermined logic circuit B operation on the input 7-bit data. Logic circuits outputting the data Q1, Q2, and Q3 of FIG. 3 and performing logic operations (hereinafter, referred to as logic A operations) represented by the following "Equation 3" and "Equation 4", respectively. It has A circuits LA1 and LA2 and one adder AD1.

[0097]

(Equation 3)

(Equation 4)

The least significant 3 bits of data P1 to P3 are input to the logic circuit A circuit LA31, and the data P1 to P3
3 bits of data P4 to P6 immediately higher than
The most significant 1-bit data P7 is input to the circuit LA32.
Is input to the carry-in terminal CI of the adder AD4. Each of the logic circuit A circuits LA31 and LA32 performs the above-described logic circuit A operation on the input 3-bit data, and then outputs the 2-bit data of the operation result. Output to the adder AD31. The adder AD31 adds the input two 2-bit data and outputs 3-bit data of the addition result.

FIG. 48 is a block diagram of the logic circuit C shown in FIG. 43. The logic circuit C is a logic circuit that counts the number of “1” (black pixels) bits in the input 14-bit data, and has two logic circuits B each having the configuration shown in FIG. Circuit LB41, L
B42 and one adder AD41. Each 7-bit data is stored in each logic circuit B circuit LB41, LB
The 3-bit data of the operation result indicating the number of bits of "1" (black pixel) of the 7-bit data output from the logic circuit B circuits LB41 and LB42 and input to the adder AD41
And outputs the addition result as 4-bit data.

FIG. 49 is a block diagram of logic circuit D circuit LD shown in FIG. The logic circuit D circuit LD counts the number of bits of “1” (black pixel) in the input 21-bit data, and includes four logic circuit B circuits LB51 to LB54 shown in FIG. And three adders AD51 to AD53 and one comparison circuit C51.
That is, each 7-bit data is stored in each logic circuit B.
"1" of the 7-bit data which is input to the circuits LB51 to LB54 and in each of the logic circuit B circuits LB51 to LB54.
Adders AD51 to AD53 add 3-bit data, which is the operation result indicating the number of bits of the (black pixel), and output the addition result (count value) as 5-bit binary data. 0 ”
When all are white, the comparison result is output.

FIG. 50 is a block diagram of the logic circuit E circuit LE shown in FIGS. 44 and 45. Logic circuit E circuit L
E represents three logic circuit B circuits LB61 to LB61 shown in FIG.
LB63 and two adders AD61 and AD62.
That is, each 7-bit data is stored in each logic circuit B.
"1" of the 7-bit data input to the circuits LB61 to LB64 in each of the logic circuit B circuits LB61 to LB63.
Adders AD61 and AD62 add 3-bit data, which is the calculation result indicating the number of bits of (black pixels), and output the addition result (count value) as 5-bit binary data.

(5-3-5) 3 × 3 Minority Pixel Detector FIG. 51 is a circuit diagram of the 3 × 3 minority pixel detector 204. The 3 × 3 minority image detection unit 204 receives the outputs from the 9 pixels of 3 × 3, AND circuit NOR71, NOR circuit NOR71, 2-input AND circuit AND72, AND7
3. An inverter INV71 and an OR circuit OR71. When all the pixels are black, the AND circuit AND71 sends a signal to the AND gate AND72. When the signal indicating that the number of black pixels is a small number of pixels is sent from the comparator 213, the AND gate AND72 sends the signal to the OR gate OR71.
And a signal indicating that there are no few pixels in 3 × 3
The signal is sent to the scaling circuit 207 via the R circuit 210. Similarly,
When all the pixels are white, the NOR circuit NOR71 sends a signal to the AND gate AND73. When a signal indicating that the number of white pixels is a small number of pixels is sent from the comparator 213, the OR circuit OR71. Then, a signal indicating that there is no small number of pixels in 3 × 3 is sent to the scaling circuit 207 via the OR circuit 210.

(5-3-6) 7 × 7 Black Pixel Counting Circuit FIG. 52 shows the 7 × 7 black pixel counting circuit 205 shown in FIG.
It is a block diagram of. As shown in FIG. 52, 7-bit pixel data P11 to P71 on the j = 1 sub-scanning line output from the 9 × 9 matrix memory circuit 100 are input to the logic circuit B circuit LB81, and j = 2 sub-scanning. 7 on the line
The bit pixel data P12 to P72 is a logic circuit B circuit L
B82, the 7-bit pixel data P13 to P73 on the j = 3 sub-scanning line are input to the logic circuit B circuit LB83, and the 7-bit pixel data P on the j = 4 sub-scanning line
14 to P74 are input to the logic circuit B circuit LB84. Each of the logic circuit B circuits LB83 to LB84 performs a predetermined logic circuit B operation on the input data.
The 3-bit data of the operation result is added to adders AD81 and AD8.
Output to 2. The 7-bit pixel data P15 to P75 on the sub-scanning line with j = 5 are input to the logic circuit B circuit LB85, and the 7-bit pixel data P16 to P76 on the sub-scanning line with j = 6 are converted into the logic circuit B circuit LB86. Is entered into
7-bit pixel data P17 to P on the sub-scanning line of j = 7
77 is input to the logic circuit B circuit LB87, each of the logic circuit B circuits LB-15 to LB-17 performs a predetermined logic circuit B operation on the input data, and then outputs a 3-bit operation result. The data is output to adders AD83 and AD85. The 3-bit data output from each of the logic circuit B circuits LB81 to LB87 is added to adders AD81 to AD81.
86, and the resulting 6-bit data is output to the selector 208 as a smoothed value.

In the above embodiments, the facsimile apparatus has been described, but the present invention is not limited to this, and can be applied to filing apparatuses, printer controllers, electronic sorters, and the like. Here, the electronic sorter stores a plurality of image data in a memory and has a sort function. If the restoration technique as in the present invention is used, it is possible to store in the form of binary image data and output it as multi-valued image data. A high-resolution display or a multi-gradation display can be connected as an output device.

Further, in the present embodiment, a description has been given of monochromatic image data. However, the present invention is not limited to this, and can be applied to image data of a plurality of colors. For example, the present invention is applicable to restoring binary image data of three colors of R, G, and B, or image data of only some colors.

In the present embodiment, the binary image data is restored to the multi-valued image data, but the present invention is not limited to this, and the natural number N-value image data is converted to the natural number M-value image data (N <M). This can be applied when restoring. That is, it is clear that the processing can be applied as it is to the image restoration processing units 62 and 62a, and the image area determination unit 102 can be configured to perform the same processing after binarizing the N-valued image data. it can.

[0107]

According to the image processing apparatus for restoring binary image data converted into pseudo halftone binary data into multivalued data, a thin line multivalued image can be restored from the pseudo halftone binary image. In order to restore a multi-valued image from a pseudo-halftone binary image, a smoothing component obtained from a smoothing window and an edge-enhancing component obtained from an edge-enhancing window for an image around a target pixel to be processed are used. Use a mixture of Here, the second arithmetic means for detecting the edge amount from the difference between the number of black pixels of the two windows with respect to the target pixel and the peripheral pixels of the binary image data, and the first arithmetic means are obtained. Restoring means for mixing the smooth component and the edge component obtained by the second calculating means to restore multi-value data;
The first arithmetic means for obtaining a smooth component by counting black pixels in a first window composed of a pixel of interest and its surrounding pixels in the binary image data provides a maximum of N1 pixels from the pixel of interest.
Second processing means for processing the pixel separated from the target pixel in the binary image data and detecting the edge amount from the difference between the number of black pixels of the two windows with respect to the target pixel and its surrounding pixels , N1 ≦ N2 in the restoration of the original multi-valued image when the pixels separated by N2 pixels from the
By doing so, extra smoothness can be avoided.

[Brief description of the drawings]

FIG. 1 is a longitudinal sectional view of a mechanism of a facsimile apparatus according to an embodiment of the present invention.

FIG. 2 is a block diagram of a signal processing unit of the facsimile apparatus shown in FIG.

FIG. 3 is a block diagram of an image restoration processing unit illustrated in FIG. 2;

FIG. 4 is a diagram of an arrangement of pixels in a 9 × 9 matrix.

FIG. 5 is a block diagram of the 9 × 9 matrix memory circuit shown in FIG. 3;

FIG. 6 shows that the area of a black pixel is 7/16 of the total area
FIG. 3 is a diagram illustrating an example of a binary image obtained when a uniform image is binarized using an error diffusion method.

FIG. 7 shows that the area of a black pixel is 7/16 of the total area
FIG. 3 is a diagram illustrating an example of a binary image obtained when a uniform image is binarized using a dither method.

FIG. 8 is a diagram showing a 7 × 7 window and a spatial filter having the window.

FIG. 9 is a diagram illustrating an example of a Laplacian filter for performing edge enhancement.

FIG. 10 shows two 7 × used to perform edge enhancement.
7 is a diagram illustrating an example of a window 7; FIG.

FIG. 11 is a diagram illustrating an example of a spatial filter that performs edge enhancement using four windows in which a 7 × 7 window is shifted by one dot in each of the four main and sub scanning directions.

FIG. 12 is a diagram illustrating two image areas used for edge enhancement in FIG. 13;

FIG. 13 is a diagram illustrating an example of an image on which edge enhancement is performed, showing two image areas used for aligned edge enhancement;

FIG. 14 is a diagram illustrating the image, the edge enhancement filter, and the edge component amount with respect to an edge component amount obtained when edge enhancement is performed on an image using an edge enhancement filter.

FIG. 15 is a diagram illustrating a first spatial filter used when calculating an edge enhancement amount in the present embodiment.

FIG. 16 is a diagram illustrating a second spatial filter used when calculating an edge enhancement amount in the present embodiment.

FIG. 17 is a diagram illustrating a third spatial filter used when calculating an edge enhancement amount in the present embodiment.

FIG. 18 is a diagram illustrating a fourth spatial filter used when calculating an edge enhancement amount in the present embodiment.

FIG. 19 is a diagram illustrating a fifth spatial filter used when calculating an edge enhancement amount in the present embodiment.

FIG. 20 is a diagram illustrating a sixth spatial filter used when calculating an edge enhancement amount in the present embodiment.

FIG. 21 is a diagram illustrating a seventh spatial filter used when calculating an edge enhancement amount in the present embodiment.

FIG. 22 is a diagram illustrating an eighth spatial filter used when calculating an edge enhancement amount in the present embodiment.

FIG. 23 is a diagram illustrating an eleventh spatial filter used when calculating an edge enhancement amount in the present embodiment.

FIG. 24 is a diagram illustrating a twelfth spatial filter used when calculating an edge enhancement amount in the present embodiment.

FIG. 25 is a diagram illustrating a thirteenth spatial filter used when calculating an edge enhancement amount in the present embodiment.

FIG. 26 is a diagram illustrating a fourteenth spatial filter used when calculating an edge enhancement amount in the present embodiment.

FIG. 27 illustrates an undesired spatial filter.

FIG. 28 illustrates an undesired spatial filter.

FIG. 29 is a diagram showing a smoothing amount and an emphasis amount when an image shown on the upper side is subjected to arithmetic processing by three spatial filters shown on the lower side.

FIG. 30 is a diagram showing a smoothing amount and an emphasis amount when an image shown on the upper side is subjected to arithmetic processing by three spatial filters shown on the lower side.

FIG. 31 is a diagram illustrating a seventh spatial filter used when determining an edge region in the present embodiment.

FIG. 32 is a diagram illustrating an eighth spatial filter used when determining an edge region in the present embodiment.

FIG. 33 is a diagram illustrating an eleventh spatial filter used when determining an edge region in the present embodiment.

FIG. 34 is a diagram illustrating a twelfth spatial filter used when determining an edge region in the present embodiment.

FIG. 35 is a diagram illustrating a thirteenth spatial filter used for determining an edge region in the present embodiment.

FIG. 36 is a diagram illustrating a fourteenth spatial filter used when determining an edge region in the present embodiment.

FIG. 37 is a diagram showing the image, the edge enhancement filter, and the edge component amount obtained for an edge component amount obtained when edge enhancement is performed on an image using an edge enhancement filter.

FIG. 38 is a diagram of an example of a spatial filter for determining an edge region.

FIG. 39 is a block diagram of a halftone data restoration unit.

FIG. 40 is a diagram showing a relationship between a broken line image and a window.

FIG. 41 is a diagram showing a relationship between an image and a window.

FIG. 42 is a block diagram of a part of an edge area detection calculation unit.

FIG. 43 is a block diagram of a part of an edge area detection calculation unit.

FIG. 44 is a block diagram of a part of an edge component 1 calculation unit.

FIG. 45 is a block diagram of a part of an edge component 1 calculation unit.

FIG. 46 is a block diagram of an edge component 2 calculation unit.

FIG. 47 is a block diagram of a decoder B circuit.

FIG. 48 is a block diagram of a decoder C circuit.

FIG. 49 is a block diagram of a decoder D circuit.

FIG. 50 is a block diagram of a decoder E circuit.

FIG. 51 is a block diagram of a 3 × 3 minority pixel detection unit.

FIG. 52 is a block diagram of a 7 × 7 black pixel counting circuit.

[Explanation of symbols]

 Reference numeral 62 denotes an image restoration unit, 201 denotes a halftone data restoration unit, 202 denotes an image area determination unit, 203 denotes a halftone data interpolation unit, 204 denotes a pseudo halftone binarization unit, and 205 denotes a selector.

──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int.Cl. ⁷ , DB name) H04N 1/40-1/409 G06T 5/00-5/50

Claims (2)

(57) [Claims] 1. An image processing apparatus for restoring binary image data converted into pseudo halftone binary data into multi-valued data, comprising: a window including a pixel of interest and pixels surrounding the pixel of interest in the binary image data. A first computing unit that counts the number of black pixels in the image data to obtain a smooth component amount; a first window including a plurality of pixels including a target pixel in the binary image data and continuing in a first direction; 1
A second window adjacent to the window and comprising a plurality of pixels continuous in the first direction; and a plurality of pixels adjacent to the first window on a side opposite to the second window and continuous in the first direction. A second operation means for detecting an edge component amount from a count value of the number of black pixels in each window; and a smooth component amount obtained by the first operation means and a second operation means. Restoring means for obtaining a multi-value restored image using the obtained edge component amount, wherein the second arithmetic means has a width of each window in the adjacent direction corresponding to one pixel. Processing equipment. 2. The apparatus according to claim 1, wherein the second calculating means detects an edge component amount from a difference between a value based on the count value in the first window and the count values in the second and third windows. 2. The image processing device according to 1.