JP3145856B2 - Speed detector - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a speed detecting device used for an anti-skid control device for controlling a braking hydraulic pressure of an automobile.

[0002]

2. Description of the Related Art In an automobile anti-skid control device, a wheel speed of a vehicle is detected by a speed detecting device.
The control of the hydraulic pressure applied to the wheels is performed based on the detection results. The speed detection device is provided corresponding to each wheel, a speed sensor that derives an electric pulse according to the rotation of the wheel, and a measurement unit that measures a period s of m pulses in response to the pulse, And an arithmetic unit realized by a microcomputer or the like that calculates the wheel speed based on the cycle s.

In a conventional typical speed detecting device, a calculating device includes first to third calculating units, and a conversion constant J for converting a calculation result into a parameter of a speed to be obtained, and a pulse number m.
The calculation is performed in the following manner based on the cycle s and the correction coefficient G for correcting a change in the diameter of the wheel due to wear or the like. First, the first calculation unit divides the conversion constant J by the period s, then the second calculation unit multiplies the calculation result of the first calculation unit by the number of pulses m, and the third calculation unit uses the second calculation unit Is multiplied by the correction coefficient G, and as a result, the speed U to be obtained is obtained.

In the above calculation by the arithmetic unit, a fixed-point arithmetic mechanism provided in the arithmetic unit is used as it is in order to quickly detect the speed U and control the braking oil pressure and the like. In general, an 8-bit arithmetic device used for control often has only an arithmetic capability of 16 bits / 8 bits for division and 8 bits × 8 bits for multiplication. For this reason, in the above-described operation process, the parameters s, G, and s are set so that operations other than 16 bits / 8 bits in division and operations of 8 bits × 8 bits in multiplication do not occur.
The LSB (minimum lower bit) of U is set.

[0005]

In the above-mentioned prior art,
In the process of obtaining the speed from various parameters such as the number of pulses m, the period s, the correction coefficient G, and the conversion coefficient J, the arithmetic function is executed with a fixed bit length.
When the operation of s is performed, the remainder R is truncated. Therefore, the remainder R to be truncated depends on the parameter m,
When G, s and m × G × R ≧ s, there is a problem that a calculation error occurs in the calculated speed.

For example, J = 8, s = 3, m = 10, G =
At the time of 1, according to the arithmetic unit described above, the arithmetic result is {(8/3) × 10)} × 1 = (2 × 10) × 1 = 20 × 1 = 20 (1) At this time, the remainder R by the calculation of 8/3 is 2, and m × G × R = 10 × 1 × 2 = 20 ≧ 3, so that 20
A calculation error of / 3 = 6 has occurred.

Further, in the prior art, the parameters s, G, and s are set so that operations other than 16 bits / 8 bits for division and 8 bits × 8 bits for multiplication do not occur in the operation process.
Since it is necessary to set the value per unit bit of U, that is, the LSB, it is necessary to set each LSB large. For this reason, there is a problem that the calculation accuracy is deteriorated. Although there is a method corresponding to an operation other than 16 bits / 8 bits and 8 bits × 8 bits by software, it is not suitable for control because the operation speed is reduced.

SUMMARY OF THE INVENTION It is an object of the present invention to provide a speed detecting device capable of reducing a calculation error and accurately calculating a speed.

[0009]

According to the present invention, there is provided a pulse generating means for deriving a pulse for each predetermined displacement of a member, and a pulse number n derived from the pulse generating means being a predetermined number. In a speed detection device including a measuring unit that measures a period t until the speed reaches a predetermined value, and a calculating unit capable of performing multiplication / division with a fixed bit length, the calculating unit corresponds to the member. A first calculation unit for multiplying a preset correction coefficient H by the number of pulses n;
A second calculation unit that multiplies the calculation result of the first calculation unit by a conversion constant K that is converted into a parameter of a speed to be obtained;
A third operation of dividing the operation result of the second operation unit by the cycle t;
A speed detecting device including an arithmetic unit.

Also, the present invention provides a method of right-shifting and multiplying the number to be multiplied by several bits so as to have a predetermined word length corresponding to the arithmetic capability of the arithmetic means before performing the multiplication by the arithmetic means. A shift means for shifting the number of sides to be shifted to the left is provided.

In addition, the present invention provides a method for performing division by a few bits to obtain a predetermined word length corresponding to the operation capability of the operation means before performing division by the operation means. A shift means for shifting both numbers to the right is provided.

[0012]

According to the present invention, in the speed detecting device, the pulse generating means derives a pulse each time a member such as a wheel is displaced by a predetermined displacement amount. In response to the pulse, the measuring means measures the cycle t of the predetermined number n of pulses. Based on the measured period t, the calculating means including the first to third calculating units calculates the speed.

The first calculation unit multiplies the number of pulses n by a correction coefficient H set corresponding to the member, for example, the wheel diameter. The calculation result is multiplied by the second calculation unit by a conversion parameter K for converting the calculation result into a speed parameter to be obtained, for example, km / h. The third operation unit divides the operation result of the second operation unit by the cycle t, and thus the speed is detected.

Therefore, first, after the correction coefficient H, the conversion constant K, and the number of pulses n are multiplied by the first and second operation units, the operation result of the second operation unit is changed to the period t by the third operation unit. , The operation error resulting from the division can always be set to a value equal to or less than the period t.

Preferably, a conversion constant K is provided before the second operation unit of the operation means realized by the microcomputer.
A shift register that shifts the operation result of the first operation unit to the left by the number of bits to be right-shifted until a predetermined word length corresponding to the processing capability of the second operation unit.
Therefore, even when the conversion constant K exceeds the predetermined word length, software processing or the like due to the conversion constant K exceeding the predetermined word length becomes unnecessary, and the calculation speed can be improved.

Preferably, the third stage of the arithmetic means implemented by a microcomputer is provided with a dividend in a period until the word length of the cycle t becomes a predetermined word length corresponding to the processing capability of the microcomputer. A shift register is provided for right-shifting both the operation result of a certain second operation unit and a cycle t which is a divisor. Therefore, for example, even when the rotation speed is slow and the period t exceeds the predetermined word length, software processing or the like due to the period t exceeding the predetermined word length becomes unnecessary, and the calculation speed is improved. be able to.

[0017]

1 is a functional block diagram of a vehicle wheel speed detecting device 1 according to an embodiment of the present invention. The wheel speed detecting device 1 generally includes a wheel speed sensor 2, a counter 3, a timer 4, and a speed calculating unit 5 realized by a microcomputer or the like.

The wheel speed sensor 2 is provided for each wheel, and derives an electric pulse to the counter 3 every time the wheel as a member rotates by a predetermined angle.
In response to the pulse, the counter 3 outputs a count signal to the timer 4 each time the counter 3 counts a predetermined number n of pulses. In response to the count signal, the timer 4 measures a period t for n pulses corresponding to the rotation of each wheel by measuring a required time between the count signals, and sends the measured period t to the speed calculation unit 5. Output.

Next, the configuration of the speed calculator 5 will be described. The speed calculation unit 5 includes a storage unit 6 in which information necessary for calculating the wheel speed is stored based on the cycle t input from the timer 4, and a first unit for calculating the wheel speed by calculation.
To third operation units 7 to 9 and the like. ROM
The storage unit 6 realized by (read only memory) or the like has a storage area M1 for storing a conversion constant K, a storage area M2 for storing the number of pulses n, and a storage area M3 for storing a correction coefficient H. . The conversion constant K is a constant for converting the calculation result into a speed parameter km / h. By using this conversion constant K, the LSB of the speed calculation result becomes 0.005 km / h as described later. The correction coefficient H is a constant for correcting a difference between the diameters of the front and rear wheels, and is selected, for example, from 0.8 to 1.2.

The conversion constant K stored in the storage area M1 of the storage unit 6 is input to the second operation unit 8 via the connection point P1 and one of the systems L1 and L2 switched by the switch S1. You. The shift register 11 is interposed in the system L2. The word length determining unit 13 is also connected to the connection point P1. The word length determining unit 13 calculates the conversion constant K
And switches S1 and S2 are switched according to whether the word length BK exceeds the predetermined word length B1. Further, the word length determination unit 13 inputs the count result of the word length BK to the shift amount determination unit 10. Thus, the shift amount determining unit 10 determines the shift amount DK of the conversion constant K, and sets the shift amount DK in the shift registers 11 and 12. The shift register 11 stores the set shift amount D
The conversion constant K is shifted to the right by K and output to the second arithmetic unit 8.

Number of pulses n stored in storage area M2
And the correction coefficient H stored in the storage area M3 are input to the first calculation unit 7 and multiplied. The calculation result A of the first calculation unit 7 is transmitted to the system L switched by the switch S2.
The signal is input to the second arithmetic unit 8 via one of the third and L4. The shift register 12 is interposed in the system L3. The shift register 12 stores the first operation unit 7 by the shift amount DK set by the shift amount determination unit 10.
Is shifted to the left and output to the second arithmetic unit 8.

The conversion constant K and the calculation result A input to the second calculation unit 8 are multiplied in the second calculation unit 8. The calculation result B of the second calculation unit 8 is input to the third calculation unit 9 via one of the systems L5 and L6 switched by the switch S3. The system L6 includes a shift register 1
4 are interposed.

On the other hand, the cycle t input from the timer 4 is input from the connection point P2 to the third arithmetic unit 9 via one of the systems L7 and L8 switched by the switch S4. The connection point P2 is also connected to a word length determining unit 15, and a shift register 17 is interposed in the system L7.

The word length determining section 15 counts the word length Bt of the cycle t, and switches the switches S3 and S4 according to whether the word length Bt exceeds a predetermined word length B2. Further, the word length determination unit 15 inputs the count result of the word length Bt to the shift amount determination unit 16. The shift amount determining unit 16 determines the shift amount Dt of the cycle t, and sets the shift amount Dt in the shift registers 14 and 17. In response, the shift register 14 shifts the operation result B rightward by the shift amount Dt,
The shift register 17 shifts the period t to the right by the shift amount Dt.

When the operation result B and the period t are input to the third operation unit 9, the operation result B is divided by the period t in the third operation unit 9. The wheel speed V, which is the calculation result of the third calculation unit 9, is output to the control unit 18 that performs anti-skid control and the like.

FIG. 2 is a flowchart for explaining the calculating operation of the speed calculating section 5 provided in the wheel speed detecting device 1. In step a1, the multiplication of the pulse number n read from the storage unit 6 and the correction coefficient H is performed by the first calculation unit 7 to obtain a calculation result A, and the process proceeds to step a2.
In step a2, the word length determination unit 13 determines whether the word length BK of the conversion constant K read from the storage unit 6 exceeds the predetermined word length B1 corresponding to the calculation capability of the second calculation unit 8. If the word length BK exceeds the word length B1, the process proceeds to step a3.

In step a3, the switches S1 and S2 are switched to the systems L2 and L3 by the word length determining unit 13, respectively. In step a4, the shift amount determining unit 10 converts the conversion constant K into the predetermined word length B1. The shift amount DK required for the shift is determined, and the shift amount DK is determined.
Are set in the shift registers 11 and 12, and step a5
Move on to In step a5, the conversion constant K is right-shifted by the shift amount DK by the shift register 11, and at the same time, the operation result A is left-shifted by the shift amount DK by the shift register 12, and the process proceeds to step a6.

In step a2, when the word length BK of the conversion constant K is smaller than the predetermined word length B1, step a7
To the switches S1 and S2 by the word length determination unit 13.
Are switched to the systems L1 and L4, respectively.
Accordingly, the conversion constant K is input to the second operation unit 8 without passing through the shift register 11, and similarly, the operation result A is input into the second operation unit 8 without passing through the shift register 12, and the process proceeds to step a6. In step a6, the second operation unit 8 multiplies the conversion constant K by the operation result A to obtain the operation result B, and the process proceeds to step a8.

In step a8, the word length determination unit 15 determines whether the word length Bt of the cycle t read from the timer 4 exceeds the predetermined word length B2 corresponding to the calculation capability of the third calculation unit 9. If the word length Bt exceeds the word length B2, the process proceeds to step a9.

In step a9, the switches S3 and S4 are switched to the systems L6 and L7 by the word length determining unit 15, respectively. In step a10, the period t is set to the predetermined word length B2 by the shift amount determining unit 16. Shift amount Dt necessary for this is determined, and the shift amount Dt is determined.
Are set in the shift registers 14 and 17, and a1
Move to 1. In step a11, the operation result B is right-shifted by the shift amount Dt by the shift register 14, and at the same time, the period t is right-shifted by the shift amount Dt by the shift register 17, and the process proceeds to step a12.

At step a8, the word length Bt of the cycle t
Is less than or equal to the predetermined word length B2, the process proceeds to step a15, and the switches S3 and S4 are switched to the systems L5 and L8 by the word length determining unit 15, respectively. At this time, the operation result B is transmitted through the shift register 14. Third without
The cycle t is input to the arithmetic unit 9 and the cycle t is similarly
7 is input to the third arithmetic unit 9 without passing through the
Move to In step a12, the calculation result B is divided by the cycle t by the third calculation unit 9 to obtain a wheel speed V as a calculation result. The process proceeds to step a13, where the wheel speed V is transmitted from the third calculation unit 9 to the control unit 18. Output to step a14
Then, other processing operations such as reading of the cycle t from the counter 4 are performed.

A specific example of calculation of the wheel speed V by the wheel speed detecting device 1 will be described below. Although the actual operation is performed using a binary number, each numerical value is represented by a decimal number here for simplification of the description.

First, the LSB of the wheel speed V, the cycle t, and the correction coefficient H are determined, and the conversion constant K is determined based on the LSB. When the wheel speed is 100 km / h, the pulse cycle when the number of pulses n output from the timer 4 is 1 is 1.38045 msec, and the value of the correction coefficient H is 1. At this time, the LSB of the wheel speed V is 0.005 km.
/ H, the LSB of the cycle t is 0.25 μsec and the LSB of the correction coefficient H is 0.0078125, the wheel speed V, the conversion constant K, the number of pulses n, the correction coefficient H and the cycle t
The following relationship is obtained from V = K × n × H / t (2): 20,000 = (K × 1 × 128) / 5522 (3) When Expression 2 is obtained for the conversion constant K, the value of the conversion constant K is determined to be 628812.

Next, the actual wheel speed V is calculated. Here, the computing capabilities of the first computing unit 7 and the second computing unit 8 are as follows:
For example, multiplication of numbers having a word length of 16 bits is possible, and the arithmetic capability of the third arithmetic unit 9 is such that, for example, a number having a word length of 32 bits can be divided by a number having a word length of 16 bits. And When the actual wheel speed is 50 km / h, the cycle when the pulse number n output from the timer 4 is 8 is 22.0088 msec, and the LSB of the cycle t is 0.25 μsec, so the value of t is 88352. Become.

In the calculation of the wheel speed V, in the wheel speed detecting device 1, first, the first calculation unit 7 multiplies the pulse number n by the correction coefficient H, that is, 8 × 128 = 1024.
Since the value of the conversion constant K is 862812, the word length of K is 20.
Is a bit. Therefore, the word length of K exceeds the operation capability of the second operation unit 8, so that the value is shifted to the right by 4 bits by the shift register 11, and the value of K becomes 53925. Corresponding to this, 102 of the calculation result of the first calculation unit 7
4 is shifted leftward by 4 bits by the shift register 12 to become 16384, and 1
The multiplication of 6384 × 53925 = 883507200 is performed.

Now, the value of the cycle t is 88352, and the word length of t is 17 bits. Therefore, the word length of t is the third
Since the calculation capability of the calculation unit 9 is exceeded, the value is shifted to the right by one bit by the shift register 17, and the value of t becomes 44176. Correspondingly, the operation result 883507200 of the second operation unit 8 is shifted right by one bit by the shift register 14 to 4417553600.
And 417553600/4 by the third arithmetic unit 9
Division of 4176 = 9999 is performed. L of wheel speed V
Since SB is set to 0.005 km / h, the wheel speed V obtained as a result of the calculation is 9999 × 0.005 =
From 49.995, it becomes 49.995 km / h.

Here, as in the prior art, first, the conversion constant K is first divided by the period t, and the result is multiplied by a value obtained by multiplying the number of pulses n by the correction coefficient H. It is assumed that the configuration. In this case, when the conversion constant K is multiplied by the cycle t, the quotient becomes 9 from 8662812/88352, and the remainder 67644 is truncated. Furthermore, quotient 9
1024 of the value obtained by multiplying the number of pulses n by the correction coefficient H
, The value to be obtained is 9 × 1024 = 9216
To 9216. Therefore, the wheel speed V at this time is calculated as 46.08 km / h.

As described above, according to the wheel speed detecting device 1, in calculating the wheel speed by the speed calculating unit 5 including the first to third calculating units 7 to 9, the first calculating unit 7 first calculates the pulse number n and The multiplication by the correction coefficient H is performed. Subsequently, the second calculation unit 8 multiplies the calculation result A of the first calculation unit 7 by the conversion constant K.
The calculation result B of the second calculation unit 8 is divided by the cycle t, and the wheel speed V is obtained as a result.

Therefore, after the number of pulses n, the correction coefficient H and the conversion constant K are multiplied and then divided by the period t, the calculation error caused by the division can be minimized, and a more accurate wheel speed can be obtained. Can be detected.

When the word length BK of the conversion constant K is greater than the predetermined word length B1 corresponding to the operation capability of the second operation unit 8, the conversion constant K has the word length BK equal to the predetermined word length B1. Up to the right. Correspondingly, the calculation result A of the first calculation unit 7 is a conversion constant K
Is shifted to the right by the shift register 11,
The data is shifted left by the shift register 12. Therefore, even when the word length BK of the conversion constant K exceeds the predetermined word length B1 corresponding to the operation capability of the second operation unit 8, the second operation unit 8
, The calculation speed can be improved without the need for software.

Further, when the word length Bt of the cycle t is longer than the predetermined word length B2 corresponding to the calculation capability of the third calculation unit 9, the cycle t is determined until the word length Bt becomes the predetermined word length B2. It is shifted rightward by the shift register 17. Correspondingly, the operation result B of the second operation unit 8 is shifted to the right by the shift register 14 by an amount corresponding to the period t shifted to the right by the shift register 17. Therefore, the period t
Even if the word length Bt of the third arithmetic unit 9 exceeds the predetermined word length B2 corresponding to the arithmetic capability of the third arithmetic unit 9, the division by the third arithmetic unit 9 is possible. Speed can be improved.

In the prior art, it is necessary to set the cycle t, the wheel speed V, and the LSB of the correction coefficient H so that the calculation does not exceed the calculation capability of the calculation unit. However, in the wheel speed detection device 1, since the shift registers 11, 12, 14, and 17 are provided, the degree of freedom in setting each LSB can be increased.
Therefore, for example, LSB of wheel speed V and cycle t
, The detection accuracy of the wheel speed V can be improved.

FIG. 3 is a functional block diagram showing the configuration of the anti-skid control device 21 provided with the wheel speed detecting device 1. The anti-skid control device 21 includes the wheel speed detection device 1, a vehicle speed calculation unit 22, a switch 23, an anti-skid control unit 24, an actuator 25, a warning light 26, and the like.

The wheel speed detecting device 1 detects the wheel speed V of each wheel, and outputs each wheel speed to the anti-skid control unit 24 and the vehicle speed calculating unit 22. The vehicle speed calculating unit 22 calculates the vehicle speed Vs from the input wheel speeds V.
Is estimated and output to the anti-skid control unit 24.

The anti-skid control unit 24 sets a slip reference based on the vehicle speed Vs,
When each wheel speed V becomes equal to or less than the slip reference in a state in which it is detected that a brake pedal (not shown) is depressed, a pressure reduction signal is derived to an actuator 25 such as an electromagnetic valve provided in a brake hydraulic piping path. And performs anti-skid control. As a result, when the wheel speed V recovers, a pressure increase signal is output to the actuator 25 so as to increase the brake oil pressure. In this way, the braking hydraulic pressure is reduced, increased, or maintained to shorten the braking distance and secure running stability.

When the anti-skid control unit 24 detects an abnormality of the wheel speed sensor 2 or the switch 23, the anti-skid control is prohibited and the warning lamp 26 is turned on.

FIG. 4 is a flowchart for explaining the control operation of the anti-skid control device 21. In step b1, initialization processing is performed, and in step b2,
For example, it is determined whether or not the calculation operation timing has come every 5 msec. At the time when the calculation operation timing has come, the process proceeds to step b3. In step b3, the wheel speed V of each wheel is detected by the wheel speed detection device 1. In step b4, the vehicle speed Vs is estimated from each wheel speed V obtained in step b3, and the process proceeds to step b5.

In step b5, the wheel speed V of any one of the wheels is, for example, 85% of the vehicle speed Vs.
When the following value is reached, braking hydraulic pressure control is performed such that the braking hydraulic pressure for the wheel is reduced by the actuator 25, and the wheel speed V is recovered, and the process proceeds to step b6.

In step b6, an abnormality such as the switch 23 being fixed to the conductive state is detected, and the warning light 26
And a fail-safe process such as reporting an abnormality to the driver.

According to the anti-skid control device 21 using the wheel speed detecting device 1, the wheel speed detecting device 1 accurately detects each wheel speed V. Therefore, appropriate anti-skid control can be performed according to the value of each wheel speed V, and shortening of the braking distance and the like can be realized.

In this embodiment, an example in which the wheel speed detecting device 1 is applied to the anti-skid control is shown. However, the present invention is not limited to the anti-skid control, but may be applied to other control devices such as a traction control which needs to detect the wheel speed. May be applied. In this embodiment, the rotational speed of the wheel is detected. However, the speed to be detected may be a linear speed as long as the speed is detected based on a predetermined pulse period.

[0052]

As described above, according to the present invention, after the multiplication of the correction coefficient H, the pulse number n, and the conversion constant K is performed by the first and second calculation units of the calculation means, Third
The arithmetic unit performs a division to divide the operation result of the multiplication by the cycle t to calculate the speed. Therefore, the calculation error caused by the division can be minimized without multiplication, and a more accurate speed can be calculated.

Further, according to the present invention, before performing the calculation by the calculating means, the number to be multiplied is shifted right by several bits so as to have a predetermined word length corresponding to the calculating capability of the calculating means. Since the shift means for shifting the number to be multiplied to the left is provided, software processing or the like due to the conversion constant K exceeding the predetermined word length becomes unnecessary, and the calculation speed can be improved.

Further, according to the present invention, before performing the division by the arithmetic means, the number to be divided is divided by a few bits having a predetermined word length corresponding to the arithmetic capacity of the arithmetic means. Since the shift means for shifting both sides to the right is provided, software processing or the like due to the period t exceeding the predetermined word length becomes unnecessary, and the calculation speed can be improved.

[Brief description of the drawings]

FIG. 1 is a functional block diagram of a vehicle wheel speed detecting device 1 according to an embodiment of the present invention.

FIG. 2 shows a speed calculation unit 5 provided in the wheel speed detection device 1.
6 is a flowchart for explaining the calculation operation of FIG.

FIG. 3 is a functional block diagram showing a configuration of an anti-skid control device 21 in which the wheel speed detection device 1 is used.

FIG. 4 is a flowchart for explaining a control operation of the anti-skid control device 21.

[Explanation of symbols]

 REFERENCE SIGNS LIST 1 wheel speed detection device 2 wheel speed sensor 3 counter 4 timer 5 speed calculation unit 6 storage unit 7 first calculation unit 8 second calculation unit 9 third calculation unit 10,16 shift amount determination unit 11,12; 14,17 shift Registers 13 and 15 Word length determination circuit 18 Control unit 21 Anti-skid control device 22 Vehicle speed calculation unit 23 Switch 24 Anti-skid control unit 25 Actuator 26 Warning light

──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int.Cl. ⁷ , DB name) G01P 3/489 B60T 8/66 G01P 3/44 G01R 23/02

Claims (3)

(57) [Claims] 1. A pulse generating means for deriving a pulse for each predetermined displacement amount of a member, and measuring a period t until the number of pulses derived from the pulse generating means reaches a predetermined number of pulses n. A speed detecting device comprising: a measuring unit that performs multiplication and division with a fixed bit length; and a correction coefficient H that is set in advance corresponding to the member. A first operation unit that multiplies the number of pulses n, a second operation unit that multiplies the operation result of the first operation unit by a conversion constant K that is converted into a parameter of a speed to be obtained, and the second operation The third operation of dividing the operation result of the section by the period t
A speed detecting device comprising an arithmetic unit. 2. A shift means for right-shifting a multiplicand by several bits and left-shifting a multiplier so as to have a predetermined word length corresponding to the arithmetic capacity of the arithmetic means before multiplying by the arithmetic means. The speed detecting device according to claim 1, wherein: 3. A shift means for right-shifting both the dividend and the divisor by several bits so as to have a predetermined word length corresponding to the arithmetic capacity of the arithmetic means before performing the division by the arithmetic means. The speed detecting device according to claim 1, wherein