JP3142284B2 - Optical calculator - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an apparatus for performing optical information processing, and more particularly, to an optical computer capable of realizing symbolic substitution.

[Conventional technology]

Devices that perform optical information processing include those that use light to improve the switching speed of the arithmetic element by using the architecture of the computer as it is, optical analog computers that use the Fourier transform by a lens optical system,
There is a neural network using optical interconnection.

However, those that follow the architecture of a conventional computer cannot effectively exhibit the parallel computing property of light. Optical analog computers can be expected to be applied in fields such as image recognition, but are not suitable for general-purpose numerical calculations and the like. The neural network is suitable for image recognition and calculation by a specific algorithm, but is not suitable for general-purpose numerical calculation.

Therefore, it is urgently necessary to realize an optical (digital) computer architecture that has the characteristics of a conventional electronic computer and that fully utilizes the properties of light.

Conventionally, cellular array logic and symbolic substitution have been studied as the architecture of an optical (digital) computer. Among them, the symbolic substitution performs an arithmetic operation by searching for a specific pattern from an image on a certain plane and replacing it with another pattern. KH Burner, AH
Han Applied Optics, September 15, 1986, Vol. 25, No. 18, No. 30
54 to 3060 (KHBerner, A. Huang, N. Streibl: APPLI
ED OPTICS, Vol. 25, No. 18, PP. 3054-3060, 15 Septembe
r 1986). The symbolic substitution is promising as an architecture for optical digital computation because it can perform large-capacity operations in parallel.

Hereinafter, the symbolic substitution will be described. Note that this architecture finds (ie, searches for) where in the input image a mosaic pattern, called a search pattern, is located, and then,
Information processing such as calculation is performed by replacing the search pattern with a replacement pattern that is a mosaic pattern similar to the search pattern.

Next, an example of a conventionally known search method will be described with reference to FIGS. 9 and 10. FIG.

FIG. 9 (a) is a diagram showing an example of a search pattern, and FIG. 9 (b) is a diagram showing an example of a replacement pattern according to the search pattern shown in FIG. 9 (a). In the symbolic substitution, processing is performed in units of one block called a cell. Ninth
In FIGS. 7A and 7B, a 2 × 2 cell has a unit size of a cell. Also, the lower left cell section 60, 64
Is called the origin.

In the search pattern shown in FIG.
Indicates a light emitting portion (white portion in the figure) in a light emitting state. The upper left cell portion 61 of the cell is a non-light-emitting portion in a non-light-emitting state (a hatched portion in the figure). The cell portion 62 at the upper right of the cell is a light emitting portion, and the cell portion 63 at the lower right of the cell is a non-light emitting portion. As described above, the search pattern has two light-emitting portions and two non-light-emitting portions in a 2 × 2 square. And in the 2x2 square,
There are six patterns each having two light emitting portions and two non-light emitting portions.

The search pattern is a pattern (corresponding to a program) for determining a shift method for shifting the state of the other cell portion to the origin 60. That is, according to the search pattern shown in FIG. 9 (a), the shift direction is the non-light-emitting portion 61 or
Since 63 is the direction coming to the origin 60, which is the light-emitting portion, two shift methods of shifting one from top to bottom and shifting one from right to left are suggested.

In the replacement pattern shown in FIG.
Reference numeral 64 denotes a non-light-emitting portion. The upper left cell portion 65 of the cell is a light emitting portion, the upper right cell portion 66 is a non-light emitting portion, and the lower right cell portion 67 is a light emitting portion. Thus, the replacement pattern is 2
As in the case of the search pattern, there are two light-emitting portions and two non-light-emitting portions in the × 2 cells.

The replacement pattern is a pattern that determines a shift method for shifting the state of the origin 64 to another square portion. That is, according to the replacement pattern shown in FIG. 9B, after the search, the origin 64 of the area that matches the search pattern is obtained.
Is a light emitting part, so the shift direction is
To the light-emitting unit 65 or 67, and two shift methods of shifting one from the bottom to the top and shifting one from the left to the right are suggested.

Next, an example of a search method using symbolic substitution will be described with reference to FIG. In addition,
FIG. 10 shows a case where a search is performed using the search pattern and the replacement pattern shown in FIGS. 9 (a) and 9 (b).

Now, it is assumed that an input image 70 including four cells is input. In this input image 70, the upper right cell and the lower right cell are:
This matches the search pattern shown in FIG. 9 (a). Next, the input image 70 is shifted according to the search pattern. When the direction of this shift is based on “light emitting point”,
This is the direction in which the light emitting state is directed to the origin 60. When “non-light-emitting point” is used as a search criterion, the direction in which the non-light-emitting state is directed to the origin 60 is set.

There is no essential difference between these two shift methods, and only a slight difference in the method of the subsequent threshold processing.

In the search example shown in FIG. 10, "non-light-emitting point" is used as a search criterion, and therefore, each of the non-light-emitting portions is one in the direction from the cell portion, which is a non-light-emitting portion, to the origin 60 (that is, in the leftward or downward direction). Shift one. Reference numeral 71 denotes a left-shifted image showing a case where the input image 70 is shifted by one to the left. 72 is the input image
It is a downward shift image showing a case where 70 is shifted down by one.

Next, the shifted images 71 and 72 are superimposed to obtain a superimposed image 73. In this case, when the non-light emitting portion and the light emitting portion are overlapped, the light emitting portion is given priority and the state is set. At this point, the origin 73a of each cell of the superimposed image 73
73d show whether or not the pattern of each cell matches the search pattern shown in FIG. 9 (a). That is, in the case of the superimposed image 73, when the cell pattern matches the search pattern, the origin (73c, 73d in FIG. 10) does not emit light. Conversely, when they do not match, the origin (73a, 73b in FIG. 10) emits light.

The information based on the origins 73a to 73d is used for the next replacement operation. In this replacement operation, first, the state of the light-emitting portion and the non-light-emitting portion of the superimposed image 73 is inverted based on a predetermined threshold to obtain an inverted image 74. This is because the origins 73c and 73d of the cell that matches the search pattern are changed to light emitting units. Next, since the cell portions other than the origins 74a to 74d of each cell are irrelevant to the information as to whether or not they match the search pattern, these cell portions are masked. Then, in this masking, a mask corresponding to the search pattern (only one of the four squares of each cell transmits light).
Is used. The image 75 obtained by this masking is
Only the origins 75c and 75d of the cells that match the search pattern emit light.

Next, in the image 75, the pattern of the cell emitting light at the origins 75c and 75d is replaced according to the replacement pattern shown in FIG. 9B. This replacement can be performed by the same operation as when the superimposed image 73 is obtained from the input image 70. However, the direction of the shift is the direction suggested by the replacement pattern in FIG. 9 (b). That is, first,
Obtain a first image with image 75 shifted right one, and then obtain a second image with image 75 shifted up one. Then, the first image and the second image are superimposed to obtain an image 76.

This image 76 is an image obtained by replacing cells that match the search pattern in the input image 70 with the replacement pattern. In this way, the position of the cell that matches the search pattern can be recognized from the input image 70, and another pattern can be replaced at that position.

Next, the case where the “light emitting point” is used as a search criterion will be described. When the input image 70 is shifted in two directions and the patterns are superimposed, the origin of the cell matches the search pattern. In this case, the amount of emitted light is the largest. Conversely, when they do not match, either no light is emitted or the amount of emitted light is small. Therefore, in order to extract information as to whether or not the search pattern matches the search pattern from the origin of the cell, an AND operation is performed instead of the inversion operation as one of threshold processing. That is, only the grid portion having the largest light emission amount is caused to emit light, and the other grid portions are not allowed to emit light. After this processing, the origin 60
Is masked and the pattern is replaced in the same manner as in the above-mentioned case where is the light emitting portion.

Next, an example of a specific calculation method will be described with reference to FIG. 11 and FIG.

FIG. 11 is a diagram for explaining a rule of an additive operation by symbolic substitution. In FIG. 11, the size of the cell is a 1 × 4 cell, and the origin is the lowermost cell. And, FIG.
In each of (d), dual rail coding in which two cells represent one bit is adopted, and the pattern (search pattern) of the cell on the left side of the figure is replaced with the pattern (replacement pattern) on the right side.

In the pattern 80 on the left side of FIG. 11A, the upper two squares represent “0”, and the lower two squares also represent “0”. Therefore, the pattern 80 represents "0 + 0" as a whole. Also, the pattern 81 on the right is
The upper two squares represent "0", and the lower right two
Two squares also represent “0”. That is, the cells shifted to the upper left indicate the carry (carry) in the addition result, and the two cells in the lower right indicate the solution in the addition result. Therefore, FIG.
Indicates a solution of “0” for “0 + 0” represented by the pattern 80 on the left side.

In FIG. 11 (a), the pattern on the left is shifted three times (downward) from the uppermost cell to the origin, and is shifted from the second cell from the lower part to the origin. It suggests two shift methods, one shift (downward) and one shift. Further, the pattern on the right side indicates a shift method in which two shifts are performed upward from the origin and one shift is performed in the left direction.

In the pattern 82 on the left side of FIG. 11B, the upper two squares represent “0”, and the lower two squares represent “1”. For this reason, the pattern 82 represents "0 + 1" as a whole. Also, the pattern on the right
In 83, the upper left two cell portions represent "0", and the lower right two cell portions represent "1". Therefore,
FIG. 11B shows “0” represented by the pattern 82 on the left side.
For “+1”, a solution of “1” is shown and a carry of “0” is shown.

In the pattern 84 on the left side of FIG. 11C, the upper two squares represent “1”, and the lower two squares represent “0”. For this reason, the pattern 84 represents "1 + 0" as a whole. Also, the pattern on the right
In the case of 85, the upper left two cell portions represent "0" and the lower right two cell portions represent "1". Therefore,
FIG. 11C shows “1” represented by the pattern 84 on the left side.
For “+0”, a solution of “1” is shown, and a carry of “0” is shown.

In the pattern 86 on the left side of FIG. 11D, the upper two squares represent "1", and the lower two squares also represent "1". Therefore, the pattern 86 represents “1 + 1” as a whole. Also, the pattern on the right
At 87, the upper left two squares represent "1" and the lower right two squares represent "0". Therefore,
FIG. 10D shows “1” represented by the pattern 86 on the left side.
For "+1", a solution of "0" is shown and a carry of "1" is shown.

Next, FIG. 12 is a diagram for explaining a process of an addition operation of two binary data using the rule shown in FIG. FIG. 12 (a) is a diagram showing an input image. Also, in FIG. 12 (a), “10010100” and “0011”
0001 ”is represented by two 8-bit data (binary number).
As in the case of FIG. 11, it is shown by dual rail coding. That is, FIG. 12A shows “10010100 + 00110001” as a whole.

FIG. 12 (b) is a diagram showing an image obtained by converting the input image of FIG. 12 (a) only once in accordance with the search / replacement rule shown in FIG. When obtaining FIG. 12 (b) from FIG. 12 (a), search / replacement is performed for each of the four rules shown in FIGS. 11 (a) to 11 (d) for the input image shown in FIG. 12 (a). Done in Therefore, the input images are first duplicated by the number of rules (four shown in FIGS. 11A to 11D).
Then, these four input images are replaced according to each rule. Thereafter, the four replacement images obtained by the respective rules are superimposed to obtain an image shown in FIG. 12 (b).

FIG. 12 (c) is a diagram showing an image obtained by transforming the input image of FIG. 12 (a) twice in the same manner as in the case of FIG. 12 (b). FIG. 12 (d) is a diagram showing an image obtained by transforming the input image of FIG. 12 (a) three times in the same manner as in the case of FIG. 12 (b). In FIG. 12 (d), when the upper cell (portion indicating carry) becomes "00000000", the lower cell shows "11000101". That is, when all the upper cell portions become “0”, the input image shown in FIG. 11A shows “10010100 + 001100”.
The solution “01” occurs in the lower cell part, and the calculation ends.

In the operation method shown in FIGS. 11 and 12, if the data is 8-bit data, the operation result can be obtained by performing a maximum of eight conversions. That is, a calculation result is obtained by a repetition calculation according to the information amount. Although an example of the additive operation has been described here, a general logical operation or a four-rule operation can be performed by the same method.

Next, an example of a conventional symbolic substitution apparatus will be described with reference to FIGS. 13 and 14. FIG.

FIG. 13 is a diagram showing an entire configuration of a conventional symbolic substitution apparatus. In FIG. 13, an input image is supplied from an image input unit 100 to a splitter 101. The splitter 101 is for duplicating the supplied input image. The input image is divided into four recognition blocks 102 for each rule.
To be distributed and supplied. Each of the four recognition blocks 102 shifts the input image for each rule. An image shift device shown in FIG. 14 is used for this shift (this point will be described later).

The four shifted images thus shifted are supplied to four inverters 103, respectively. Inverter 103 is SEED
(Self Electro-optic Effect Device) or a device to which a non-linear optical element is applied, and the light emitting state of the supplied shift image is inverted based on a predetermined threshold value. This inverted inverted image is supplied to the replacement block 105 via the mask 104. The mask 104 masks the supplied inverted image according to the replacement pattern.

The replacement block 105 shifts an image using an image shift device (described later) shown in FIG. 14 to realize replacement. The images output from the four replacement blocks 105 are supplied to the optical system 106 for image superposition.
The image superposition optical system 106 superimposes the four images supplied from the four replacement blocks 105 and supplies the superimposed image to the image output unit 107. Then, as a result, an output image is output from the image output unit 107.

Next, the image shift devices used in the recognition block 102 and the replacement block 105 will be described with reference to FIG. In this image shift device, a mirror of a normal interferometer is slightly tilted.

In FIG. 14, an image is projected from a plane 111 of an input image to a prism 111.
Supplied to The prism 111 has a half mirror 112 inside.
And directs the supplied image in two directions. The image in one direction is supplied to the inclined mirror 113 through the half mirror 112, reflected, and supplied again to the half mirror 112 in the prism 111. Then, the image in one direction is reflected by the half mirror 112 and output from the prism 111. As a result, an output image is formed on the first surface 115.

The image in the other direction is reflected by the half mirror 112 and supplied to the mirror 114 which is inclined. The image in the other direction reflected by the mirror 114 is supplied again into the prism 111, and is output to the outside of the prism 111 through the half mirror 112, thereby forming an output image on the second surface 116. .

Thus, according to the image shift device of FIG.
One input image is shifted to form two output images.
Note that the degree of image shift varies depending on the degree of inclination of the mirrors 113 and 114.

From the above description, in the optical computer, in order to realize symbolic substitution, a device having a function of shifting a plane image as shown in FIG. That is,
It is understood that a device for performing an inversion operation, an AND operation, and the like based on a predetermined threshold value) is required. Among them, as a device for performing threshold processing, there is a device using a nonlinear optical effect.

However, a device having a shift function is not present in existing optoelectronic devices, and is currently realized by tilting a mirror of an interferometer as shown in FIG.

[Problems to be solved by the invention]

In the above prior art, it is necessary to provide recognition blocks and replacement blocks by the number of replacement rules, and further, since an interferometer with a tilted mirror is used to achieve the shift function, the calculation procedure is programmed. There was a problem that such general-purpose usage could not be performed.

An object of the present invention is to solve the above-mentioned problems of the prior art,
An object of the present invention is to provide a general-purpose optical computer that does not depend on the number of replacement rules.

[Means for solving the problem]

In order to achieve the above object, an optical computer of the present invention stores an input image, and shifts the stored image according to a search pattern.
An image output from the shift unit is superimposed on an image stored in the past, an input image superimposition unit storing the superimposed image, and unnecessary optical information is removed from the image output from the input image superimposition unit. A mask unit for masking the image, and a threshold value process for performing an operation such as an inversion operation and an AND operation based on a threshold value on the image output from the input image superimposition unit. Section, a mask image storage / shift section for storing an image passing through the mask section and the threshold value processing section, and shifting the stored image according to a replacement pattern, and an output from the mask image storage / shift section. And a mask image superimposing unit for storing the superimposed image on the image stored in the past and storing the superimposed image.

The optical computer according to claim 3 of the present invention, in the optical computer, at least one of the input image storage / shift unit and the mask image storage / shift unit includes a self-scanning light emitting element array, The self-scanning light-emitting element array is a two-dimensional or three-dimensional arrangement of a large number of light-emitting elements having control electrodes for externally controlling a threshold voltage or a threshold current; Having a network wiring electrically connecting the control electrode to the control electrode of another light emitting element, for selectively transferring a predetermined state set to the one light emitting element to the another light emitting element. And a clock line for supplying the transfer clock is connected to each of the light emitting elements.

[Action]

In the optical computer of the present invention, the input image storage / shift unit stores the input image (including the data image) and shifts the stored image in accordance with the symbolic substitution search pattern. The input image superimposing unit superimposes the image output from the input image storage / shift unit on an image stored in the past, and stores the superimposed image.

Here, the input image storage / shift unit and the input image superimposing unit constitute a recognition block, and this recognition block is useful for obtaining position information of a search pattern.

The mask unit performs masking on the image output from the input image superimposing unit in order to remove unnecessary optical information from the image. That is, the position information of the search pattern is
Since it is at the origin of the pattern in the image, only the information of this origin is extracted. Further, the threshold processing unit performs an operation such as an inversion operation and an AND operation on the image output from the input image superimposing unit based on the threshold. In this case, an inversion operation can be performed when the non-light emitting portion of the search pattern is shifted to the origin, and an AND operation can be performed when the light emitting portion of the search pattern is shifted to the origin.

The mask image storage / shift unit stores an image passing through the mask unit and the threshold value processing unit, and shifts the stored image in accordance with the replacement pattern of the symbolic substitution. The mask image superimposing unit superimposes the image output from the mask image storing / shifting unit on an image stored in the past, and stores the superimposed image.

Here, the mask image storage / shift unit and the mask image superimposing unit constitute a replacement block. This replacement block replaces a portion of the image pattern that matches the search pattern with the replacement pattern. It is helpful. Note that an image of the calculation result is generated in the mask image superimposing unit.

Therefore, the optical computer of the present invention only needs to provide one recognition block and one replacement block.
The configuration can be made independent of the number of replacement rules, and has versatility.

In the optical computer according to the third aspect of the present invention, at least one of the input image storage / shift unit and the mask image storage / shift unit uses a self-scanning light emitting element array. The array can shift the image stored in the light emitting element array up, down, left, and right by being electrically supplied with the transfer clock pulse. In this case, a self-scanning light-emitting element array such as a light-emitting thyristor array has not only a light-emitting function but also a function of receiving and storing an image, and thus is suitable for use in the optical computer of the present invention.

In addition, since the self-scanning light emitting element array is used in at least one of the input image storage / shift unit and the mask image storage / shift unit, the image shift operation can be externally controlled. In addition, it is not necessary to prepare the same number of recognition blocks and replacement blocks as the number of replacement rules, and it is also possible to provide an optical computer that can arbitrarily change the replacement rules from the outside, and thus can perform versatile program operations. it can.

Furthermore, in an optical computer that employs a symbolic substitution architecture, by using a self-scanning light-emitting element array that can electrically control the shift operation from the outside, calculations such as division that require complicated replacement rules can be performed. Even in the case of performing, it is only necessary to provide one recognition block and one replacement block, which simplifies the configuration of the optical computer.

〔Example〕

Hereinafter, an embodiment of the optical computer according to the present invention will be described in detail with reference to FIGS.

First, an example of a self-scanning light-emitting element array used in the optical computer according to the present embodiment will be described with reference to FIGS.

FIG. 5 is a diagram showing an arrangement of light-emitting thyristors (light-emitting elements) in a self-scanning light-emitting element array, and FIG. 6 is a schematic view showing an enlarged portion of a broken line frame in FIG. FIG. FIG. 7 is a schematic longitudinal sectional view taken along the line YY 'of FIG. FIG. 8 is a timing chart showing an example of a transfer clock for driving the self-scanning light emitting element array.

In FIG. 5, a plurality of light emitting thyristors T are two-dimensionally arranged in a horizontal direction (X direction) and a vertical direction (Y direction). Each clock line CL ₁ -CL ₃ supplied the transfer clock phi ₁ to [phi] _3, respectively, are wired in an oblique direction from the upper left of the light-emitting thyristor T toward the light-emitting thyristor T in the lower right. Note that this clock line
CL ₁ -CL ₃ is for controlling the shift operation.

In Figure 5, the light-emitting thyristor T to the right of the light-emitting thyristor T connected to the clock line CL ₁ is connected to the clock line CL ₂ of phi ₂ are supplied. Then, the light-emitting thyristor T under neighboring light-emitting thyristor T connected to CL ₁ is, phi ₃ is connected to the clock line CL ₃ supplied. Similarly, the light-emitting thyristor T to the right of the light-emitting thyristor T connected to the CL ₂ is connected to CL _3, the light-emitting thyristor T under neighboring light-emitting thyristor T connected to the CL ₂ is a CL ₁ It is connected. Further, the light emitting thyristor T on the right side of the light emitting thyristor T connected to CL ₃
Is connected to CL _1, below adjacent light-emitting thyristors T
It is connected to the CL _2. In the FIG. 5, for simplicity of illustration, are omitted in the anode load resistor R _A connected between the clock line CL ₁ -CL ₃ and the anode of the light emitting thyristors T.

In FIG. 6, transfer clocks φ _{1 to} φ ₃ are supplied to the respective anodes 21a of four (ie, 4 bits) light emitting thyristors T via an anode load resistor _RA . Each light-emitting thyristor T is provided with two coupling diodes (unidirectional elements) D _I. The anode 21b of the coupling diode D _I includes a gate (control electrode) 22a of the light-emitting thyristor T to the right adjacent, are connected to the gate 22a of the light-emitting thyristor T below next.
Further, the gate 22a of each light emitting thyristor T is connected to a DC power supply of a voltage _VGK via a gate load resistance _RL .

In FIG. 7, each layer of an N-type semiconductor layer 24, a P-type semiconductor layer 23, an N-type semiconductor layer 22, and a P-type semiconductor layer 21 (each formed of InGaAsP) is formed on an N-type InP substrate (indium-phosphorus substrate) 2. Are formed in order. Then, separation grooves are formed by photolithography and etching.
By forming 50, the light emitting thyristors T are separated from each other. Note that this device is
At 25 ° C., it transmits light with a wavelength of 950 nm or more.

The P-type semiconductor layer 21 is an anode of the light emitting thyristor T.
And 21a, constitutes the anode 21b of the coupling diode D _I. The anode 21a of the light-emitting thyristor T is connected to the clock line CL ₁ or CL ₃ through the anode load resistor R _A. The anode of the coupling diode D _I
21b is connected to the gate 22a of the adjacent light emitting thyristor T. The gate 22a of each light emitting thyristor T is
It is connected to a DC power supply of voltage V _GK via a gate load resistance _RL . The N-type InP substrate 2 is made of a light emitting thyristor T
And is grounded.

Next, the operation of the self-scanning light-emitting element array will be described with reference to FIGS.

Now, consider the case where the light emitting thyristor T (i, j) at the XY coordinates (i, j) is in the ON state. In this case, the light emitting thyristor T (i + 1, j) on the right side or the light emitting thyristor T (i, j +
1).

In order to arbitrarily transfer the ON state (light emitting state) in the rightward and downward directions in FIG. 5, the ON state is transferred next while the light emitting thyristor T (i, j) holds the ON state. One of the light emitting thyristors T is selected from the two candidates, and a transfer clock is supplied to a clock line connected to the light emitting thyristor T. That is, the light-emitting thyristor T (i,
The clock signal connected to j) and the two clock lines respectively connected to the two light-emitting thyristors T whose on state is transferred next can be transferred to the on state by a total of three clock lines. .

In the light emitting element array configured as shown in FIG. 5, the light emitting thyristor T (i, j) in the ON state, the light emitting thyristor T (i + 1, j) on the right and the light emitting thyristor T (i, j) on the lower side are displayed. j + 1) are always connected to different clock lines.

When the high-level transfer clock φ [n, 3] is supplied to the light emitting thyristor T (i, j) in the on state, the on state transfer is performed to the light emitting thyristor T (i + 1, j) on the right side. For example, after the transfer clock φ [n + 1,3] is set to the high level, φ [n, 3] is set to the low level. Also,
To transfer the ON state to the light emitting thyristor T (i, j + 1) on the lower side, the transfer clock φ [n−1,3] is set to a high level, and then φ [n, 3] is set to a low level. In addition,
[n, m] in φ [n, m] represents a remainder system of n by m, where m is 3. However, in FIG. 5-FIG. 7, for simplicity of illustration, each transfer clock are set forth in the form of phi _n.

In the example shown on the left side of FIG. 8, the four pulses are:
The transfer clocks φ ₁ , φ ₂ , φ ₃ , φ ₁ are sequentially supplied to the clock lines CL _{1 to} CL ₃ . in this case,
The ON state is transferred rightward in FIG. Also, the eighth
In the example shown on the right side of the figure, the four pulses are supplied in reverse order, such as transfer clocks φ ₃ , φ ₂ , φ ₁ , φ ₃ . In this case, the ON state is transferred downward in FIG.

FIG. 1 is a schematic perspective view showing the configuration of an embodiment of the optical computer according to the present invention.

In FIG. 1, an image input unit 1 is composed of an LED (light emitting diode) array or a CRT (cathode ray tube), etc., and reproduces and outputs an externally supplied image (including a data image). The image output from the image input unit 1 is formed on the input image storage / shift unit 3 by the coupling lens 11. The input image storage / shift unit 3 is composed of a self-scanning light-emitting element array shown in FIGS. The image supplied from the image input unit 1 via the coupling lens 11 is stored and shifted by this self-scanning light emitting element array. The direction in which the stored image is shifted in the input image storage / shift unit 3 is externally controlled by a controller (not shown) based on, for example, a replacement rule as shown in FIG.

The image output from the input image storage / shift unit 3 is formed on the input image superimposing unit 4 by the coupling lens 12. Input image superimposition section 4 does not have a self-scanning function (i.e., does not have a coupling diode D _I as shown in FIG. 6) is made from a light-emitting thyristor array. The light emitting thyristor array has a light emitting function and a light receiving function. Then, the input image superimposing section 4 superimposes the shift image supplied from the input image storing / shifting section 3 via the coupling lens 12 with an image stored in the past, and stores this superimposed image.

At this point, the search operation based on the replacement rule using the search pattern ends.

The input image storage / shift unit 3 and the input image superimposing unit 4 constitute a recognition block. Then, by the shift operation by the input image storage / shift unit 3 and the superposition operation by the input image superposition unit 4, information on the position where the same pattern as the search pattern exists is obtained. The position information of the search pattern is at the origin of each pattern in the image.

The image output from the input image superimposing unit 4 is guided to the mask unit 5 and the threshold processing unit 6 by the coupling lens 13. Here, the arrangement relationship between the mask unit 5 and the threshold value processing unit 6 does not matter regardless of which one is first. The mask unit 5 performs masking to remove unnecessary optical information. That is, the position information of the search pattern is at the origin of each pattern in the image, and the other information (data) is
Since it becomes a hindrance in the replacement operation described later, only the information of the origin is extracted by masking.

The threshold processing unit 6 performs an image inversion operation (or an AND operation)
I do. The threshold processing in the threshold processing section 6 basically differs depending on the shift direction when shifting the input image based on the replacement rule. That is, when the non-light emitting portion of the search pattern is shifted to the origin, the inversion operation is performed, and when the light emitting portion is shifted to the origin, the AND operation is performed.

Here, the inversion operation and the AND operation will be described with a state where there is no input light in the threshold value processing unit 6 as an initial state.

In the inversion operation, the threshold value processing unit 6 is all light emitting units in the initial state. Next, when the threshold value processing unit 6 is irradiated with input light (information), the portion irradiated with the input light (when the light amount of the input light exceeds the threshold value) becomes a non-light emitting unit, The portion not irradiated with light (when the light amount of the input light does not exceed the threshold value) remains as the light emitting unit. After the irradiation of the input light is completed, if the threshold processing unit is of a type in which the output light does not change, the threshold processing unit is reset to return to the initial state.

In the AND operation, all of the threshold value processing units 6 are non-light emitting units in an initial state. Next, when the threshold value processing unit 6 is irradiated with the input light, a portion where the luminous flux of the input light is two (when the light amount of the input light exceeds the threshold value) becomes a light emitting unit. At this time, the portion where the luminous flux of the input light is exactly one, or the portion where the luminous flux does not hit (when the light amount of the input light does not exceed the threshold value) remains as a non-light emitting portion. In addition, in the AND operation, after the irradiation of the input light is completed, if the threshold processing unit is of a type in which the output light does not change, the threshold processing unit is reset to the initial state.

In the input image superimposing section 4 composed of a light emitting thyristor array as in the present embodiment, the light emitting thyristor is not suitable for detecting a difference in light amount of an image. Therefore, hereinafter, a case will be described in which the threshold value processing unit 6 of this embodiment performs an inversion operation as threshold value processing.

The images (mask images) output from the mask unit 5 and the threshold processing unit 6 are formed on the mask image storage / shift unit 7 for pattern replacement by the coupling lens 14. The mask image storage / shift unit 7 is composed of a self-scanning light emitting element array shown in FIGS. 5 to 7 (however, the arrangement of the light emitting element array is the same as that of the input image storage / shift unit 3). It is rotated 180 degrees compared to.) Then, the mask image storage / shift unit 7 stores the mask image,
The image is shifted according to the replacement pattern. The shifted image is supplied to the mask image superimposing unit 8 via the coupling lens 15.

The mask image superimposing unit 8 is composed of a light-emitting thyristor array having no self-scanning function, and superimposes a shift image supplied from the mask image storing / shifting unit 7 via the coupling lens 15 with an image stored in the past. Then, this superimposed image is stored. At this point, the position where the same pattern as the search pattern exists is replaced with the replacement pattern. As a result, the operation of replacing with the replacement pattern ends. The mask image storing / shifting unit 7 and the mask image superimposing unit 8 constitute a replacement block.

Depending on the type of operation, there are a number of replacement rules. By superimposing the images formed by the respective replacement rules on the mask image superimposing unit 8, an image of the operation result can be obtained. The obtained image of the calculation result is converted into an electric signal by a light receiving element (not shown) and supplied to a computer (not shown), or returned to an input image through a feedback system (not shown). Then, it is used again for calculation.

In the configuration shown in FIG. 1, coupling lenses 11 to 15 are provided, but an image input unit 1, an input image storage / shift unit 3, an input image superimposition unit 4, a mask unit 5, and a threshold processing unit 6 ,
If an image is transmitted between each of the mask image storage / shift unit 7 and the mask image superimposing unit 8, the coupling lens 11
~ 15 is not always necessary.

Next, FIG. 2 is a flowchart showing an example of a processing procedure of an additive operation in the optical computer shown in FIG.

In FIG. 2, when the processing of the optical computer shown in FIG. 1 is started by a controller (not shown), first, in step S1, the input image is set to “0+” based on FIG. 11 (a).
The operation of "0" is performed. Next, in step S2, a calculation of "0 + 1" is performed on the input image based on FIG. 11 (b). Then, in step S3, the input image
11 The calculation of “1 + 0” based on FIG. Then, in step S4, "1 + 1" calculation based on FIG. 11D is performed on the input image.

Next, in step S5, it is determined whether or not all the carry (carry) has become “0” by the calculations in steps S1 to S4. If all the carry is not "0", the process proceeds to step S6. In this step S6, the output image of the mask image superimposing unit 8 is transferred to the image input unit 1. Therefore, the calculation process returns to step S1, and the same calculation as in steps S1 to S4 described above is performed again on the output image. On the other hand, in step S5, if all the carry is “0”, the processing of the additive operation is terminated at that time.

For the determination in step S5, an optical carry detector (not shown) can be provided at the rear of the mask image superimposing unit 8 in FIG. The output light (output image) of the mask image superimposing unit 8 is converted into an electric signal by a light receiving element (not shown) and supplied to a computer (not shown), and the value of the carry is detected by the computer. You can also.

A feedback optical system (not shown) including a half mirror and a mirror can be provided for image transfer in step S6. Further, the output light of the mask image superimposing unit 8 can be converted into an electric signal by a light receiving element (not shown), and the electric signal can be supplied to the image input unit 1.

Next, FIG. 3 is a diagram for explaining the processing in steps S1 to S4 shown in FIG. It should be noted that in FIG. 3, the first part from FIG. 12 (a) to FIG.
The processing contents in the case of the figure are shown.

In FIG. 3, FIG. 3 (a) is the same input image as FIG. 12 (a), which is the input image first drawn on the image input unit 1 in FIG. When the processing of step S1 in FIG. 2 is performed on the input image shown in FIG. 3 (a), the image shown in FIG. 3 (b) is stored in the mask image superimposing unit 8 in FIG. You.

Next, when the processing of step S2 in FIG. 2 is performed on the input image shown in FIG. 3 (a), if the process is the same as that in step S1, the mask image superposition unit 8 in FIG. The image shown in FIG. 3 (c) is being stored. However, since steps S1 and S2 in FIG. 2 are processed in series, when the processing in step S2 in FIG. 2 is performed, FIGS. 3 (b) and 3 (c) are superimposed. The image shown in FIG. 3D is stored in the mask image superimposing unit 8 in FIG.

Next, when the processing of step S3 of FIG. 2 is performed on the input image shown in FIG. 3A, if the processing is the same as that of step S1, the mask image superimposing unit 8 of FIG. The image shown in FIG. 3 (e) is being stored. However, since steps S2 and S3 of FIG. 2 are processed in series, when the processing of step S3 of FIG. 2 is performed, FIGS. 3 (d) and 3 (e) are superimposed. The image shown in FIG. 3 (f) is stored in the mask image superimposing unit 8 shown in FIG.

Next, when the processing of step S4 in FIG. 2 is performed on the input image shown in FIG. 3 (a), if the processing is the same as that in step S1, the mask image superimposing unit 8 in FIG. The image shown in FIG. 3 (g) is being stored. However, since steps S3 and S4 of FIG. 2 are processed in series, when the processing of step S4 of FIG. 2 is performed, FIG. 3 (f) and FIG. 3 (g) are superimposed. The image shown in FIG. 3 (h) is stored in the mask image superimposing unit 8 shown in FIG. The image shown in FIG. 3 (h) is the same as the image shown in FIG. 12 (b).

FIG. 4 is a flowchart showing in detail the processing procedure of step S1 shown in FIG.

In FIG. 4, steps S11 to S16 represent a search operation using a search pattern.

Now, it is assumed that an image is input to the image input unit 1 and the input image is drawn on the display unit (not shown) of the input image. At this point (ie, step S11), the input image storage / shift unit 3 immediately stores the input image drawn by the image input unit 1. Next, in step S12, the input image storage / shift unit 3 shifts the stored input image downward by one. Note that this shifting method is performed based on the pattern 80 in FIG. 11 (a).

The shift operation in step S12 will be described with reference to the light emitting element array shown in FIG. First, to supply transfer clock phi _1, then supplies the transfer clock phi _3. At this time, the phi ₁ and phi _3, as shown in FIG. 8, a moment is simultaneously supplied. Then, supplying the transfer clock φ _2. At this time, the phi ₃ and phi _2, as shown in FIG. 8, a moment is simultaneously supplied. After that, the transfer clock φ ₁ again
Supply. In this case also, the phi ₂ and phi _1, as shown in FIG. 8, a moment is simultaneously supplied. This φ ₁ → φ ₃ , φ
_With a series supply of ₃ → φ ₂ , φ ₂ → φ ₁ the stored input image is shifted down by one.

Next, in step S13, the sensitivity of the input image superimposing unit 4 is increased in advance. Then, the input image superposition unit 4 stores the output image (first shift image) of the input image storage / shift unit 3. Next, in step S14, the sensitivity of the input image superposition unit 4 is reduced by controlling the voltage applied to the input image superposition unit 4. The reason is that when the next image is being processed by the image input unit 1 and the input image storage / shift unit 3, the input image superimposing unit 4 is not affected by these.

Next, in step S15, the input image storage / shift unit 3 executes step S15 based on the pattern 80 in FIG.
The input image stored in S11 is shifted downward by three. In this case, since the input image has already been shifted down by one in step S12, the input image storage / shift unit 3 is actually
Shifts the input image that has already been shifted down one position by two.

Here, the shift operation in step S15 is
More specifically, using the light emitting element array shown in FIG. 5, a series of shift operations in step S12 will be repeated twice. That is, first, the transfer clock φ ₁
Supplies, then supplies the transfer clock phi _3. Further, supplying the transfer clock phi _2, then, it supplies the transfer clock phi _1. Then, supplying the transfer clock phi _3, and supplies the transfer clock phi _2, finally, supplying the transfer clock phi _1. This φ ₁ → φ ₃ , φ ₃ → φ ₂ , φ ₂ →
A series of feeds of φ ₁ , φ ₁ → φ ₃ , φ ₃ → φ ₂ , φ ₂ → φ ₁ shifts the image down by two.

In the supply of each transfer clock, two transfer clocks are supplied simultaneously for a moment (that is, two pulses partially overlap), as in step S12.

Next, in step S16, the input image superimposing unit 4
Sensitivity is increased. As a result, the input image superimposing unit 4 superimposes the output image (second shift image) obtained in step S15 on the first shift image, and stores and outputs this superimposed image. In order to increase the sensitivity, the voltage applied to the input image superimposing unit 4 is controlled.

With the above steps S11 to S16, the search operation using the search pattern ends.

Next, in step S17, the input image superimposing unit 4
Pass through the mask unit 5 and the threshold processing unit 6. At this time, the image is masked and inverted based on a predetermined threshold. The inverted image (mask image) that has passed through the threshold processing section 6 of the mask section 5 is supplied to a mask image storage / shift section 7.

In FIG. 4, steps S18 to S22 represent a replacement operation.

First, in step S18, an inverted image (mask image) is stored in the mask image storage / shift unit 7. The image stored by the mask image storage / shift unit 7 is stored in a mask image superposition unit 8.
Supplied to Then, in step S19, the mask image superposition unit 8 stores the image supplied from the mask image storage / shift unit 7 as it is. In this case, the sensitivity of the mask image superimposing unit 8 has been increased in advance.

Next, in step S20, the sensitivity of the mask image superimposing unit 8 is reduced by controlling the voltage applied to the mask image superimposing unit 8. The reason is that when the next image is being processed by the mask image storage / shift unit 7 or the like, the mask image superimposing unit 8 is not affected by those. Thereafter, in step S21, the mask image storage / shift unit 7 performs the reverse image (mask image) stored in step S18 based on the pattern 81 in FIG. 11 (a).
Are shifted up by two and left by one.

Here, the shift operation in step S21 will be specifically described using the light emitting element array shown in FIG. 5 (however, the light emitting element array in FIG. 5 is rotated by 180 degrees). . Here, there are two shift directions. First, the case of shifting upward by two will be described. In this case, first, supplying a transfer clock phi _1, then supplies the transfer clock phi _3. Further, supplying the transfer clock phi _2, then, it supplies the transfer clock phi _1. Then, supplying the transfer clock phi _3, and supplies the transfer clock phi _2, finally, supplying the transfer clock phi _1.

These φ ₁ → φ ₃ , φ ₃ → φ ₂ , φ ₂ → φ ₁ , φ ₁ → φ
₃ , a series of feeds of φ ₃ → φ ₂ and φ ₂ → φ ₁ shifts the image up by two. The method of supplying the transfer clock is the same as in step S15. However, in the mask image storage / shift unit 7, the light emitting element array shown in FIG.
Since it is arranged so as to be rotated by 0 degrees, the shift is performed not upward but downward. In the supply of each transfer clock, two transfer clocks are simultaneously supplied at the same time as in step S15.

Next, the case of shifting one to the left will be described. In this case, first, supplying a transfer clock phi _1, then supplies the transfer clock phi _2. Further, supplying the transfer clock phi _3, then, it supplies the transfer clock phi _1. This φ
A series of ₁ → φ ₂ , φ ₂ → φ ₃ , φ ₃ → φ ₁ shifts the image one position to the left. In the supply of each transfer clock, two transfer clocks are supplied simultaneously for a moment, as in the case described above.

Finally, in step S22, the sensitivity of the mask image superimposing unit 8 is increased by controlling the voltage applied to the mask image superimposing unit 8. The mask image superimposing unit 8 superimposes the image obtained in step S21 on the image stored in step S19, stores and outputs this superimposed image. The image output here is an image indicating the calculation result “0” of “0 + 0”.

By the above steps S18 to S22, the operation based on the replacement pattern ends.

〔The invention's effect〕

Since the present invention is configured as described above,
It is not necessary to provide the recognition blocks and the replacement blocks by the number of replacement rules. Therefore, it is possible to provide a general-purpose optical computer independent of the number of replacement rules. Therefore, the optical computer of the present invention can greatly contribute to the field of a processing device which performs a large amount of parallel operations such as matrix operation and image / voice recognition.

[Brief description of the drawings]

1 to 8 show an embodiment of the optical computer according to the present invention. FIG. 1 is a schematic perspective view showing the configuration of the optical computer, and FIG. 2 is FIG. Flow chart showing an example of the processing procedure of the addition operation in the optical computer shown in
FIG. 3 is a view for explaining the processing in steps S1 to S4 shown in FIG. 2, and FIG. 4 is a view for explaining the processing in step S1 shown in FIG.
FIG. 5 is an element layout diagram showing an example of a self-scanning light-emitting element array used in the optical computer shown in FIG. 1, and FIG. 6 is a self-scanning light emission shown in FIG. FIG. 7 is a schematic longitudinal sectional view taken along the line YY ′ of FIG. 6, and FIG.
The figure is a timing chart showing an example of a transfer clock for driving the self-scanning light emitting element array shown in FIGS. 9 to 14 are diagrams for explaining a conventional optical computer. FIG. 9 shows an example of a search pattern in a symbolic substitution and an example of a replacement pattern according to the search pattern. FIG. 10, FIG. 10 is a diagram for explaining an example of a search method by symbolic substitution, FIG. 11 is a diagram for explaining rules of an additive operation by symbolic substitution, and FIG. FIG. 13 is a diagram for explaining the processing of an addition operation of two binary data using the rule shown in FIG. 11, FIG. 13 is a diagram showing the entire configuration of a conventional symbolic substitution device, FIG. FIG. 14 is a schematic plan view of an image shift device used for each of the recognition block and the replacement block shown in FIG. In the reference numerals used in the drawings, 1... Image input unit 3... Input image storage / shift unit 4... Input image superimposing unit 5... Mask unit 6. storage shift unit 8 ...... mask image superimposed portions T, T (i, j) ...... emitting thyristor (the light-emitting element) CL ₁ -CL ₃ ...... clock line φ ₁ ~φ _3, φ [n, m] ... ... Transfer clock D _I ... Coupling diode.

Claims (3)

(57) [Claims] An input image storage and shift unit for storing an input image and shifting the stored image in accordance with a search pattern, and an image stored in the past and an image output from the input image storage and shift unit. An input image superimposing unit that stores the superimposed image, and a mask unit that masks the image to remove unnecessary optical information from the image output from the input image superimposing unit. A threshold processing unit that performs an arithmetic operation on an image output from the input image superimposing unit based on a threshold, and stores an image passing through the mask unit and the threshold processing unit; A mask image storage / shift unit that shifts the stored image according to the replacement pattern, an image output from the mask image storage / shift unit is superimposed on a previously stored image, and the superimposed image is stored. Light computer; and a mask image superimposed portions, respectively. 2. The optical computer according to claim 1, wherein the arithmetic operation performed by said threshold value processing unit is an inversion operation or an AND operation. 3. A self-scanning light emitting element array, wherein at least one of the input image storing / shifting section and the mask image storing / shifting section includes a self-scanning light emitting element array. A plurality of light-emitting elements having a control electrode for externally controlling a threshold current are two-dimensionally or three-dimensionally arranged; and the control electrode of one light-emitting element is controlled by another light-emitting element. Having a network wiring electrically connected to the electrode; a clock line for supplying a transfer clock for selectively transferring a predetermined state set to the one light emitting element to the another light emitting element; 3. The optical computer according to claim 1, further comprising: