JP3114724B2 - Liquid crystal device and driving method thereof - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a liquid crystal device and a driving method thereof.

[0002]

2. Description of the Related Art A conventional driving method of a liquid crystal device is shown in FIG. In (a) of the figure, X1, X2, and X3 are signal electrodes, Y1, Y2, and Y3 are scanning electrodes, respectively. The hatched portions at the intersections of the scanning electrodes and the signal electrodes are unselected pixels, and the hatched portions are hatched. Unselected pixels are selected pixels, VX1
((E) in the figure), VX2 ((f) in the figure), VX3 ((g) in the figure) are voltage waveforms applied to respective signal electrodes,
VY1 ((b) in the figure), VY2 ((c) in the figure), VY3
((D) in the figure) is a voltage waveform applied to each scanning electrode, VY is a scanning voltage, VX is a non-selection voltage, and -VX is a selection voltage.

When the scanning electrode Y1 is selected, a scanning voltage VY is applied to the scanning electrode Y1, and Y2 and Y3 remain at 0. Among the pixels on the scanning electrode Y1, the signal electrode X1
At the intersection with the selected pixel, the selected voltage -VX
Are applied, and those at the intersection of X2 and X3 are non-selected pixels to which the non-selection voltage VX is applied. Since the difference between the voltage of the scanning electrode and the voltage of the signal electrode is applied to each pixel, X1 and Y1
VY + VX at the intersection of X2 and Y1 and X3 and Y
VY-VX is applied to the intersection of 1. At this time, Y
Since the voltages of Y2 and Y3 are 0, VX or -VX is applied to the pixels on Y2 and Y3.

In the next selection period, Y2 is selected, and the above operation is performed for Y2. Thereafter, the same operation is sequentially performed for each scanning electrode.

That is, VY + is applied to the selected pixel during the selection period.
Since VY-VX is applied to the non-selected pixels and VX or VX is applied during the non-selected period, the effective value of the voltage applied to the selected pixels becomes higher than the effective value of the non-selected pixels. The display appears.

[0006]

However, in the above-mentioned prior art, when an attempt is made to drive a large-screen matrix liquid crystal device, crosstalk occurs between the two electrodes due to the capacitance of the scanning electrodes and signal electrodes and the wiring resistance. The noise voltage changes the effective voltage value applied to the liquid crystal cell.

In addition, the crosstalk noise cancels each other in the liquid crystal device depending on the display pattern of the liquid crystal device, so that the contrast of the liquid crystal device is partially changed and the display quality is deteriorated. Have.

Accordingly, an object of the present invention is to make noise due to crosstalk between a scanning electrode and a signal electrode uniform regardless of a display pattern, suppress a partial change in contrast of a liquid crystal device due to the display pattern, and improve image quality. And a method for driving a liquid crystal device.

[0009]

A driving method of a liquid crystal device according to the present invention is directed to a liquid crystal device having a liquid crystal layer sandwiched between a substrate on which a plurality of scanning electrodes are formed and a substrate on which a plurality of signal electrodes are formed. In the driving method of the device, a scan voltage is applied to the scan electrode for each selection period, and a signal voltage obtained by modulating a gradation to a pulse width of the selection voltage is applied to the signal electrode for each selection period. The signal voltage is set such that the reference point of the pulse width of the selection voltage that changes in accordance with the gradient is set in the middle of the selection period, and the selection voltage having a high gradient in accordance with the change in the gradient.
And the pulse width of the selection voltage having a low gradation is included in the relation. The pulse width of the selection voltage is within the pulse width section of the selection voltage within the selection period at any gradation.
The reference point is included, and the sections on both sides of the pulse width section are non-
It is characterized by being a selection voltage . A liquid crystal device according to the present invention is a liquid crystal device in which a liquid crystal layer is sandwiched between a substrate on which a plurality of scanning electrodes are formed and a substrate on which a plurality of signal electrodes are formed. A signal electrode driving circuit for applying a signal voltage obtained by modulating a gradation to a pulse width of a selection voltage, wherein the signal voltage is set to a reference point of a pulse width of the selection voltage which changes according to the gradation. In the middle of the selection period , before the high gradient according to the change in the gradient
The pulse width of the selection voltage is low when the pulse width of the selection voltage is low.
The relationship encompasses the pulse width of the selection voltage within the selection period at any gradient.
Between the reference points, and both sides of the pulse width section
Is set as a non-selection voltage .

[Operation] When the driving method of the present invention is used,
FIG. 21 shows why the crosstalk is reduced.

When a pixel existing at the intersection of the signal electrode and the scanning electrode to which the scanning voltage VY is applied is selected, the selection voltage -VX is applied to the signal electrode, and when the pixel is not selected, VX is applied.

When the signal voltage waveform changes to -VX and VX, noise 70 is added to the scanning electrode due to the capacitive coupling between the scanning electrode and the signal voltage electrode. Different.

If the electrode resistance and the inter-electrode capacitance of the liquid crystal display device are uniform, the magnitude of this noise changes substantially uniformly depending on the location of the liquid crystal device, and there is no extreme change in contrast due to this. It does not deteriorate.

However, as shown in FIG. 21, noise 70 ((b) in the figure) to the scanning electrode due to the signal voltage waveform ((a) in the figure) and scanning by the driving waveform ((c) in the figure) of the signal electrode 2 When there is a noise 71 ((d) in the figure) to the electrode and a noise 72 ((f) in the figure) to the scanning electrode due to the signal voltage waveform ((e) in the figure), the noise to the scanning electrode is equal to the scanning electrode. Since the noise from each intersecting signal electrode is the sum, the noises cancel each other depending on the display pattern (FIG. 21G). (FIG. 21 (h) noise 70 + noise 72) is generated, which promotes a partial change in contrast depending on the display pattern.

However, in the case of the present invention, by changing the voltage applied to the signal electrode during the selection period to equalize the amount of noise from the signal electrode to the scanning electrode regardless of the display pattern, It is possible to suppress a partial change in contrast due to

[0016]

Embodiments of the present invention will be described below with reference to the drawings. It should be noted that the claims of the present invention relate to the sixth embodiment.
It is.

The liquid crystal device used in each embodiment uses a liquid crystal cell having 640 signal electrodes and 200 scanning electrodes.

Embodiment 1 FIG. 1 shows a scanning voltage waveform applied to scanning electrodes Y1 and Y2 in this embodiment, FIG. 2 shows a signal voltage waveform applied to signal electrodes X3 and X4, and FIG. 3 shows a pixel Y1X3. This is a composite waveform of the scanning voltage waveform and the signal voltage waveform applied to Y1X4, and the display shown in FIG. 4 is performed. Here, the shaded portions at the intersections of the signal electrodes and the scanning electrodes indicate non-selected pixels, and the unshaded portions indicate selected pixels.

T1 = 60 μsec, t2 = 10 μsec
V0-V1 = V1-V2 = V3-V4 = V4-
V5 = 1.51v and V2-V3 = 14.16v.
In FR1 in FIG. 2, the selection voltage V5 or the non-selection voltage V3 is applied to the signal electrode in the section t1, while V4 is applied in t2. Therefore, the composite waveform voltage of the scanning electrode and the signal electrode during the non-selection period is equal to t1 as shown in FIG.
In the case of V4-V5 or V4-V3, it becomes 0 in t2.

In FR2, as shown in FIG.
1, the selection voltage V0 or non-selection voltage V2 is applied to the signal electrode.
Is applied, but at t2, V1 is applied. Therefore, the composite waveform voltage of the scanning electrode and the signal electrode during the non-selection period is V1-V0 or V1-V at t1 as shown in FIG.
It becomes 0 at 2 and t2.

That is, even when the pixel is in a non-selection state, a section in which the voltage of the signal electrode is not a non-selection voltage in the entire selection period but is a reference voltage is provided.

Similarly, even when the pixel is in the selected state, the voltage of the signal electrode is not set to the selection voltage in the entire selection period, but is provided with a section that becomes the reference voltage.

Selection and non-selection of a pixel to be displayed is determined by an effective voltage value applied to the pixel and a threshold voltage of the liquid crystal. When the pixel is in a non-selection state, there is one section in which a reference voltage is set within a selection period. Even if there is a part, it does not enter the selected state unless it exceeds the threshold voltage of the liquid crystal. Similarly, when a pixel is in the selected state, even if there is a section that becomes the reference voltage within the selection period, the pixel does not enter the non-selected state unless it falls below the threshold voltage of the liquid crystal.

FIG. 5 shows a signal voltage waveform and crosstalk noise from the signal electrode to the scanning electrode. FIG. 5A shows a voltage waveform applied to the signal electrode X4, and FIG.
5 (c) shows the voltage waveform applied to the signal electrode X3, and FIG. 5 (d) shows the crosstalk noise from the signal electrode to the scanning electrode in the pixel X3Y1. .

FIG. 6 shows a signal voltage waveform when a conventional driving method is used and crosstalk noise from a signal electrode to a scanning electrode. FIG. 6A shows a voltage waveform applied to the signal electrode X4, FIG. 6B shows crosstalk noise from the signal electrode to the scanning electrode in the pixel X4Y1, and FIG.
(C) is a voltage waveform applied to the signal electrode X3, FIG.
(D) is crosstalk noise from the signal electrode to the scanning electrode in the pixel X3Y1.

As is clear from the above description, in the conventional driving method, when the selected pixels and the non-selected pixels are alternately arranged on the signal electrode (the signal electrode X3 in FIG. 4), the non-selected pixels are continuously arranged. In the case (signal electrode X4 in FIG. 4), a difference occurs in the way of crosstalk noise from the signal electrode to the scanning electrode, so that crosstalk occurs along the signal electrode, resulting in a difference in transmittance between the pixels X3Y1 and X4Y1. Occurred. But,
In the driving method of the present embodiment, the case where the selected pixels and the non-selected pixels are alternately arranged on the signal electrode (the signal electrode X3 in FIG. 4).
And the non-selected pixels are continuously arranged (signal electrode X4 in FIG. 4), there is no difference in how the crosstalk noise rides from the signal electrode to the scanning electrode (the magnitude of noise 73 = the magnitude of noise 74). 3.) No crosstalk occurred along the signal electrode, and the transmittances of the pixels X3Y1 and X4Y1 became equal.

FIG. 7 shows a circuit diagram for driving signal electrodes for realizing the driving method of this embodiment. FIG. 8 is a timing chart for explaining the operation of the circuit of FIG. In FIG. 7, reference numeral 2 denotes a display data input terminal for determining selection or non-selection of a pixel to be displayed, 8 denotes a shift register for transferring display data, 1 denotes a shift clock input terminal, and 9 denotes serial / parallel conversion of display data. Circuits 3 and 3 are latch signal input terminals of the latch circuit, and hold display data inputted from 2.

Reference numeral 11 denotes a level shifter for converting a power supply system, and reference numeral 12 denotes a signal electrode drive circuit. Reference numeral 6 denotes a polarity inversion terminal for AC driving, and reference numeral 7 denotes a liquid crystal driving power supply. 13 is a signal electrode driving terminal. The signals (a) and (b) shown in FIG. 8 are input to the signal electrode waveform input terminals 4 and 5, respectively, and the signal (a) is selected in the case of latch data "H" holding display data. When the latch data is "L", the signal (b) is selected, and the corresponding signal voltage waveforms (c) and (d) are output. Where (c),
(D) is a signal voltage waveform applied to the selected pixel and the non-selected pixel in FR1, respectively.

[Embodiment 2] FIG. 9 shows a signal voltage waveform applied to signal electrodes X3 and X4 in this embodiment, and FIG. 10 shows a composite waveform of a scanning voltage waveform and a signal voltage waveform applied to pixels Y1X3 and Y1X4. Thus, the display shown in FIG. 4 is performed as in the first embodiment. The voltage waveform applied to the scanning electrodes is the same as in the first embodiment.

T1 = 65 μsec, t2 = 5 μsec, and V0−V1 = V1−V2 = V3−V4 = V4−V
5 = 1.49v, V2-V3 = 14.10v.

In this embodiment, unlike the first embodiment, in section t2, a non-selection voltage is applied when the pixel is in the selected state, and a selection voltage is applied when the pixel is in the non-selected state.

FIG. 11 shows a signal voltage waveform and a crosstalk noise from the signal electrode to the scanning electrode when the driving method according to the present embodiment is used. (A) in the figure is the signal electrode X
(B) is a crosstalk noise from the signal electrode to the scanning electrode in the pixel X3Y1,
(C) is a voltage waveform applied to the signal electrode X4, and (d) is crosstalk noise from the signal electrode to the scanning electrode in the pixel X4Y1.

As is clear from the above description, in the driving method of this embodiment, the case where the selected pixels and the non-selected pixels are alternately arranged on the signal electrode (the signal electrode X3 in FIG. 4) and the case where the non-selected pixels are continuous Even if they are arranged side by side (signal electrode X4 in FIG. 4), there is no difference in how the crosstalk noise rides from the signal electrode to the scanning electrode (the magnitude of noise 75 = the magnitude of noise 77, the magnitude of noise 76 = Crosstalk did not occur along the signal electrode, and the transmittance of the pixels X3Y1 and X4Y1 became equal.

FIG. 12 is a circuit diagram for driving a signal electrode for realizing the driving method of this embodiment. FIG. 13 shows FIG.
FIG. 4 is a timing chart for explaining the operation of the second circuit, which is basically the same as the first embodiment.

In the present embodiment, unlike the first embodiment, a non-selection voltage is applied when the pixel is in the selected state and a selection voltage is applied when the pixel is in the non-selected state in the section t2 in the section t2. And the interval t2 can be shortened, but the crossing from the signal electrode to the scanning electrode in the case where the selected pixel and the non-selected pixel are alternately arranged on the signal electrode and in the case where the unselected pixel is continuously arranged on the signal electrode It is necessary to adjust t2 so that the ways of riding the talk noise are equal.

[Embodiment 3] FIG. 14 shows a signal voltage waveform applied to the signal electrodes X3 and X4 in this embodiment, and FIG. 15 shows a composite waveform of the scanning voltage waveform and the signal voltage waveform applied to the pixels Y1X3 and Y1X4. Thus, the display shown in FIG. 4 is performed as in the first embodiment. The voltage waveform applied to the scanning electrodes is the same as in the first embodiment.

T4 = t5 = 10 μsec, t3 = t6 =
60 μsec, and V0−V1 = V1−V2 = V3−
V4 = V4-V5 = 1.45v, V2-V3 = 13.8
5v.

In this embodiment, when the pixel is in the selected state, the non-selection voltage is applied in the section t5, and then the selection voltage is applied in the section t6. When the pixel is in the non-selected state, the non-selection is performed in the section t3. After the voltage is applied, a selection voltage is applied in a section t4.

Thus, for each signal electrode drive waveform,
The timing of switching from the selected voltage to the non-selected voltage,
The timing of switching from the non-selection voltage to the selection voltage differs regardless of the display pattern of the liquid crystal device, so that crosstalk noise from the signal electrode to the scanning electrode does not cancel each other, and all crosstalk noises are scanned uniformly. The electrodes X3Y1 and X4
The transmittance of Y1 became equal.

In the driving methods of the first and second embodiments, a slight difference occurs in the transmittance between the pixels X4Y1 and X4Y2. However, when the driving method of the liquid crystal device of this embodiment is used, the pixels X4Y1 And X4Y2 transmittances could also be made equal.

The signal electrode driving circuit for realizing the driving method of this embodiment is the same as that of the second embodiment. FIG.
FIG. 4 is a timing chart for explaining the operation of the circuit. Terminals 24 and 25 respectively have signals (a) and
(B) is input, the signal (a) is selected when the latch data holding the display data is "H", and the signal (b) is selected when the latch data is "L". The corresponding signal voltage waveforms (c) and (d) are output. Here, (c) and (d) are signal voltage waveforms applied to the selected pixel and the non-selected pixel in FR1, respectively.

[Embodiment 4] In Embodiment 3, when the pixel is in the selected state, the non-selection voltage is applied in the section t5, then the selection voltage is applied in the section t6, and when the pixel is in the non-selected state. Although the non-selection voltage is applied in the section t3 and then the selection voltage is applied in the section t4, it is recognized that the same effect can be obtained by applying the reference voltage in the sections t5 and t4.

[Embodiment 5] The present invention can be similarly applied to gradation display of liquid crystal by a pulse width modulation method (hereinafter referred to as a PWM method). FIG. 17 shows a change in a signal voltage waveform for gradation display by the PWM method in one selection period in a period corresponding to FR2 in the first to third embodiments. Here, it is assumed that the effective voltage applied to the pixel has the highest gray scale of 0, and the effective voltage applied to the pixel decreases as the gray scale increases. For the gradation 0 and the gradation 3, a change between the selection voltage and the non-selection voltage is provided.
The change timing from the selection voltage to the non-selection voltage and from the non-selection voltage to the selection voltage are not the same for any gradation. As a result, the crosstalk noise is uniformly generated at any gray scale, so that high display quality can always be maintained without depending on the pattern displayed on the liquid crystal device.

The present invention can be applied to the PWM system regardless of the number of gradations.

Embodiment 6 FIG. 18 shows an example of a driving waveform in an embodiment of the present invention. The reference point of pulse width modulation of the signal electrode is in the middle of one selection period, and the pulse width of the selection potential is shown. Have an inclusion relationship with each other according to the gradient. In the figure, (a) is a frame signal. FIG. 1B shows the signal LP, and the display data is shown in FIG.
The signal LP is a signal for transferring data from the sampling holder 9 to the latch, and the cycle of the signal LP is one selection period for driving the liquid crystal. In the pulse width modulation method of the present embodiment, as shown in the lower part of FIG. 18, the pulse width of the selection voltage is changed to both sides based on the rise of the signal U / D. In the case of the present embodiment, the change timing of the signal voltage waveform does not basically overlap with the scanning voltage waveform. The scanning voltage waveform is the same as the conventional pulse width modulation method, and when a scanning voltage is applied to a certain scanning electrode,
A reference voltage is applied to the other scan electrodes. on the other hand,
The signal voltage waveform is pulse width modulated according to the gradient,
The rising and falling timings of the selection voltage change so that the selection pulse having a low gradation is included in the selection pulse having a high gradation. In the case of the gradations 0 and 7, the signals LP ((b) in FIG. 18) and RES ((f) in FIG. 18)
A small pulse is added using the phase difference time (Δt1, Δt2) to ensure that the selection voltage and the non-selection voltage are always applied within one selection period at any gradient. This phase difference time can be freely changed according to the characteristics of the liquid crystal cell.

As a result, the crosstalk noise is uniformly generated at any gradation level, so that high display quality can be always maintained without depending on the pattern displayed on the liquid crystal device.

Next, an example of the signal electrode driving side for realizing the driving method of FIG. 18 will be described with reference to FIG.
In the figure, 41 is a shift register, 42 is a sampling latch, 43 is a latch circuit, 47 is a level shifter, 48
Is a driver circuit, which is a known circuit. The shift register 41 generates a signal for taking the gradation display data DATA sent from the controller into the sampling latch 42 one pixel at a time. The grayscale data temporarily stored in the sampling latch 42 composed of a plurality of latch circuits is transferred to the latch 43 at once at the start of one selection period by the output signal of the inverter 50. However, the output of the inverter 50 is not output for the signal LP input in the middle of one selection period due to the operation of the phase difference detection circuit 49. The gradation data stored in the latch 43 during one selection period is supplied to the decoder 1 (FIG. 1) of the pulse width modulation circuit.
45 of 9) and 2 (44 of FIG. 19). The decoder section shown here is for one bit of driver output. The decoders 1 and 2 are each formed of a series-parallel circuit of an NMOS transistor and a PMOS transistor, and generate a set and reset output of a driver selection output. Since the decoders 1 and 2 are constituted by mono-channel transistors, the loop 65 constituted by the NAND gate 54 and the inverter 55 is reset by the PMOS transistor 51 at the start of one selection period (the output of the driver is set to the non-selected output). But not required). Next, a gradation weighting clock GCP ((g) in FIG. 18).
Is input to the up / down counter 46 corresponding to the LS191, when the decoder 1 is first turned on according to the grayscale data (the counter output having a complement relation with the display data is input), the output of the NAND gate 54 becomes 1. Maintain this state. Outputs of the decoders 1 and 2 are transistors 53 and 5 having the output of the flip-flop 59 as a gate input.
2 is selectively output.

When the NMOS transistor 53 is conducting, the up / down counter 46 enters the up count state. The output impedance of the inverter 55 is
As shown in the drawing, since the resistance of the decoders 1 and 2 is much higher than that of the output, when the decoder 1 or 2 becomes conductive, the state of the loop circuit 65 forcibly follows the respective output. The output of the NAND 62 input to the NAND 54 functions so as to output a selection signal for a period of Δt2 with respect to all the OFF outputs. As described above, at this time, the signal LP
Is not performed. On the other hand, with respect to all ON outputs, the PMOS is provided only for the period of Δt1 at the beginning of one selection period.
The non-selection voltage is set by the transistor 51. Since the decoder 1 is conducting at this time, the non-selection voltage
Only one period is output from the driver. Δt1, Δt
In the period of 2, the signals LP and RES are output by the phase difference detection circuit 49.
Of the internal signal is determined by the signal LP.
And RES rising timing. That is, if the signal LP rises earlier than the signal RES, Δt2 is output; otherwise, Δt1 is output. The times Δt1 and Δt2 can be controlled independently. If Δt1 = Δt2, the phase difference detection circuit 49
Can be simplified much more than the circuit shown in FIG. Output of flip-flop 59 /
Q distinguishes the operation of the first half from the latter half of one selection period. When / Q = "H", the up / down counter 46 is in the up count state, and the decoder 1 is operated.
On the other hand, when / Q = "L", the up-counter 46 enters the down-counting state, and operates the decoder 2. As described above, once the outputs of the decoders 1 and 2 are output, the state is maintained thereafter, so that a pulse width modulated output starting from the middle of one selection period shown in FIG. 18 is obtained. If this output is converted into a liquid crystal drive waveform by a driver circuit 48 via a level shifter 47, a desired drive output can be obtained. FIG. 19 shows an example of a circuit capable of displaying eight gradations in accordance with FIG. Can be realized.

[0049]

As described above, according to the present invention, a signal voltage obtained by modulating the gradation to the pulse width of the selection voltage is applied to the signal electrode every selection period. The reference point of the pulse width of the selection voltage that changes during the selection period is set as the middle of the selection period, and the selection voltage having the high gradation is changed according to the change in the gradation.
Has a relationship including the pulse width of the selection voltage having a low gradation, and the reference point is included in the pulse width section of the selection voltage within the selection period at any gradation.
Are included, and sections on both sides of the pulse width section are not selected.
The selection voltage makes the crosstalk noise from the signal electrode to the scanning electrode uniform in the liquid crystal device, and the change in the partial contrast depending on the display pattern becomes very small, so that the visibility and display quality are improved. The effect of improving is obtained.

[Brief description of the drawings]

FIG. 1 is a diagram showing scan voltage waveforms applied to scan electrodes Y1 and Y2 in Examples 1 to 3.

FIG. 2 is a diagram showing signal voltage waveforms applied to signal electrodes X3 and X4 in the first embodiment.

FIG. 3 is a diagram showing a composite waveform of a scanning voltage waveform and a signal voltage waveform applied to pixels Y1X3 and Y1X4 in the first embodiment.

FIG. 4 illustrates a display example of a liquid crystal device.

FIG. 5 is a diagram illustrating a signal voltage waveform and crosstalk noise from a signal electrode to a scanning electrode when the driving method according to the first embodiment is used.

FIG. 6 is a diagram showing a signal voltage waveform and crosstalk noise from a signal electrode to a scanning electrode when a conventional driving method is used.

FIG. 7 is a circuit diagram for driving a signal electrode for realizing the driving method of the first embodiment.

FIG. 8 is a timing chart for explaining the operation of the circuit in FIG. 7;

FIG. 9 is a diagram showing a signal voltage waveform applied to signal electrodes X3 and X4 in the second embodiment.

FIG. 10 is a diagram showing a composite waveform of a scanning voltage waveform and a signal voltage waveform applied to pixels Y1X3 and Y1X4 in the second embodiment.

FIG. 11 is a diagram illustrating a signal voltage waveform and crosstalk noise from a signal electrode to a scanning electrode when the driving method according to the second embodiment is used.

FIG. 12 is a circuit diagram for driving a signal electrode for realizing the driving method according to the second embodiment.

FIG. 13 is a timing chart for explaining the operation of the circuit in FIG. 12;

FIG. 14 is a diagram showing signal voltage waveforms applied to signal electrodes X3 and X4 in the third embodiment.

FIG. 15 is a diagram showing a composite waveform of a scanning voltage waveform and a signal voltage waveform applied to pixels Y1X3 and Y1X4 in the third embodiment.

FIG. 16 is a timing chart for explaining the operation of the signal electrode driving circuit used in the third embodiment.

FIG. 17 is a diagram showing a change in a signal voltage waveform of gradation display by the PWM method in FIG. 5 within one selection period in a period corresponding to FR2 in Examples 1 to 3.

FIG. 18 is a diagram showing a driving dynamic waveform in the sixth embodiment.

FIG. 19 is a circuit diagram for driving a signal electrode for realizing the driving method according to the sixth embodiment.

FIG. 20 illustrates a driving method of a conventional liquid crystal device.

FIG. 21 is a view showing how to ride crosstalk noise.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 ... Shift clock input terminal 2 ... Display data input terminal 3 ... Latch signal input terminal 4 ... Signal electrode waveform input terminal 5 ... Signal electrode waveform input terminal 6 ... Polarity inverting terminal 7 ... Liquid crystal drive power supply 8 ... Shift register 9 ... Latch circuit 10 AND-OR circuit 11 Level shifter 12 Signal electrode drive circuit 13 Signal electrode drive terminal 21 Shift clock input terminal 22 Display data input terminal 23 Latch signal input terminal 24 Signal electrode waveform input terminal 25 ... Signal electrode waveform input terminal 26 ... Polarity inversion terminal 27 ... Liquid crystal drive power supply 28 ... Shift register 29 ... Latch circuit 30 ... AND-OR circuit 41 ... Shift register 42 ... Sampling latch 43 ... Latch circuit 44 ... Decoder 2 45 ... Decoder 1 46 ... Up / down counter 47 ... Level shifter 48 ... Dry Circuit 49 ... Phase difference detection circuit 50 ... Inverter circuit 51 ... PMOS transistor 52 ... NMOS transistor 53 ... NMOS transistor 54 ... NOR circuit 55 ... Inverter circuit 56 ... OR circuit 57 ... Flip-flop 58 ... Flip-flop 59 ... Flip-flop 60 ... NAND Circuit 61 ... NAND circuit 62 ... NAND circuit 63 ... Inverter circuit 64 ... Inverter circuit 65 ... Loop circuit 70 ... Noise 71 ... Noise 72 ... Noise 73 ... Noise 74 ... Noise 75 ... Noise 76 ... Noise 77 ... Noise 78 ... Noise

Continued on the front page (31) Priority claim number Japanese Patent Application No. 63-277906 (32) Priority date November 2, 1988 (November 11, 1988) (33) Priority claim country Japan (JP) (56) References JP-A-54-100292 (JP, A) (58) Fields investigated (Int. Cl. ⁷ , DB name) G02F 1/133 575

Claims (2)

(57) [Claims] 1. A method for driving a liquid crystal device comprising a liquid crystal layer sandwiched between a substrate on which a plurality of scan electrodes are formed and a substrate on which a plurality of signal electrodes are formed, wherein the scan electrodes are provided at every selection period. A scanning voltage is applied to the signal electrode, and a signal voltage whose gradation is modulated to a pulse width of the selection voltage is applied to the signal electrode for each selection period, and the signal voltage changes according to the gradation. The reference point of the pulse width of the selection voltage is set in the middle of the selection period, and the pulse width of the selection voltage having a high gradation is low according to a change in the gradation.
Has become encompass relationships pulse width of the selection voltage in degrees, at the said selection period in any of the gradient, prior to
The reference point is included in the pulse width section of the selected voltage,
In addition, the sections on both sides of the pulse width section are regarded as non-selection voltages.
Method of driving a liquid crystal device, characterized in that that. 2. A liquid crystal device in which a liquid crystal layer is sandwiched between a substrate on which a plurality of scanning electrodes are formed and a substrate on which a plurality of signal electrodes are formed. A signal electrode driving circuit for applying a signal voltage obtained by modulating a gradation to a pulse width of a selection voltage, wherein the signal voltage changes a reference point of the pulse width of the selection voltage which varies according to the gradation during a selection period. And the pulse width of the selection voltage having a high gradation is low in accordance with a change in the gradation.
Has become encompass relationships pulse width of the selection voltage in degrees, at the said selection period in any of the gradient, prior to
The reference point is included in the pulse width section of the selected voltage,
In addition, the sections on both sides of the pulse width section are regarded as non-selection voltages.
A liquid crystal device, characterized in that that.