JP3114298B2 - First-in first-out storage device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a first-in first-out storage device (FI).
More specifically, the present invention relates to a multi-port first-in first-out storage device having a plurality of input ports.

[0002]

2. Description of the Related Art Conventional first-in first-out storage device (FIFO)
Is an input port 1 to which data is input as shown in FIG.
A storage unit 5B for storing input data, a shift control unit 8B for self-shifting data in the storage unit 5B to an output terminal TO at an internal timing, and a state monitoring unit for monitoring a data storage state of the storage unit 5B. 7B and an output port 9. In this case, the input port 1 and the output port 9 are each single.

Next, the operation of the conventional first-in first-out storage device will be described.

Data ID input from input port 1
Are stored in the storage unit 5B by the input control signal. The stored data ID is self-shifted in the storage unit 5B to the output terminal TO under the control of the shift control unit 8B in synchronization with the clock CLK, and the output data ID is output in the order of input from the output port 9, that is, in the first-in-first-out order. Output as OD. The state monitoring unit 7B monitors the data storage state of the storage unit 5B and outputs a state signal S.

In this case, in order to handle a plurality of variables, it is necessary to provide a FIFO for each variable. For example, for three variables, three corresponding FIFOs are needed. If only two variables need to be handled depending on the operation mode of the system, the corresponding FIFO is not used at all. Also, when the ratio of the frequency of input / output of each variable changes depending on the operation mode, etc., not all stages of each FIFO are necessarily used, and as a result, the usage efficiency of the FIFO is reduced. It was to become.

Next, as an example of a conventional multi-port type memory having a plurality of input and output ports, there is a 2-port memory capable of simultaneous reading of a plurality of addresses, that is, 2-word simultaneous reading and 1-word simultaneous reading. As shown in FIG. 5, a conventional two-port memory includes an input port 101 to which write data is input, a decoder 102 for decoding a write address, and a decoder 1 for decoding a read address.
03, 104 and a memory cell array 1 for storing data.
05 and output ports 106 and 107.

Next, the operation of the conventional two-port memory will be described.

[0008] Write address AW is input to decoder 102, and write data DW is input from input port 101. Memory cell 105 has decoded write address A
Write data DW is written to the designated address of W. On the other hand, read address AA is decoded by decoder 103, and data at the designated address is read from memory cell 105. This read data DA is output from output port 106. At this time, the data DB at the address obtained by decoding the read address AB by the decoder 104 can be simultaneously read and output from the output port 107 at the same time.

Next, there is a multiport register file having a register group, a plurality of input ports, and a plurality of output ports. A conventional multi-port register file holds the address of a register group with a clock, and controls an input port switching signal, a write register selection signal, a read register selection signal, and an output enable signal based on a result decoded by a decoder. Thereby, the write and read operations of a plurality of input ports and output ports can be simultaneously performed in combination.

However, in order to use these multi-port memories and multi-port register files as FIFOs, it is necessary to manage data write and read states and data storage states for each individual address. That is, when a plurality of variables are handled, an ares space is allocated to each variable in order to output the variables in a first-in-first-out order.

If the types of variables to be handled and the ratio of the frequency of input and output of each variable change depending on the operation mode of the system, unnecessary areas not used in the memory are generated and the use efficiency is reduced. Further, the management becomes complicated, for example, it is necessary to switch the condition for generating the state signal indicating the data storage state each time.

[0012]

Since the conventional first-in first-out storage device described above has a single input port, it is necessary to provide a first-in-first-out storage device for each variable in order to handle a plurality of variables. In addition, when the usage ratio of each variable changes depending on the operation mode of the system, there is a disadvantage that the usage efficiency of the storage device is reduced. In a first-in, first-out storage device using a multi-port memory or a multi-port register file, in order to handle a plurality of variables, it is necessary to allocate an Ares space for each variable and individually manage the variables. When the type of variable to be handled or the ratio of the frequency of input / output of each variable changes, the usage efficiency decreases and
Since it is necessary to switch the condition for generating the status signal indicating the data storage status each time, the management becomes complicated.

[0013]

SUMMARY OF THE INVENTION A first-in first-out storage device of the present invention comprises first and second input ports for data input;
A storage unit for storing first and second input data input from the first and second input ports, respectively, and arbitrating the order of storing the first and second input data in the storage unit; an input arbitration section, the attribute flag generation unit that generates attribute flag to be added to each of the respective shows the attributes first and second input data of the input control signal based on Dzu-out the first and second input data A state monitoring unit that monitors a data storage state of the storage unit, an output selection unit that outputs data in a first-in-first-out order from a data group having the attribute flag that matches the attribute based on an output control signal, A shift control unit for controlling a shift amount of data stored in the storage unit at the time of data input.

[0014]

Next, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a circuit diagram showing a first embodiment of a first-in first-out storage device according to the present invention.

The first-in, first-out storage device of this embodiment has two inputs and one output, eight bits × three stages. As shown in FIG. 1, input ports 1 and 2 for data input and input ports 1 and 2 An input arbitration unit 3 for arbitrating the storage order of the input data in the storage unit 5, an attribute flag generation unit 4 for generating an attribute flag indicating an attribute of the input data based on the input control signal and adding the attribute to the input data; A storage unit 5 for storing data input from the ports 1 and 2 via the input arbitration unit 3 and data in a first-in-first-out order from a data group having an attribute flag matching the attribute based on the output control signal Output selector 6
And a state monitoring unit 7 for monitoring the data storage state of the storage unit 5
And a shift control unit 8 for controlling a shift amount of data stored in the storage unit 5 when new data is input, and an output port 9.

The input arbitration unit 3 includes a multiplexer M31 for switching input data from the input ports 1 and 2. The attribute flag generator 4 receives the input control signals WEA, WEB
Multiplexer M41 that selects one of flag data '0' to '3' and outputs attribute flag FG
It has. The storage unit 5 includes flip-flops F51 to F53 for holding data, flip-flops F54 to F56 for holding attribute flags, and an exclusive OR circuit E51.
, AND circuits A51 to A54, and an inverter I51. The output selection unit 6 includes a flip-flop F6
1, multiplexers M61 and M62, and AND circuit A
61 to A63, OR circuits O61 to O63, exclusive OR circuits E61 to E63, and inverters I61 and I62.
And The state monitoring unit 7 includes an AND circuit A71
And an exclusive OR circuit E71 and a NAND circuit N71. The shift control unit 8 includes AND circuits A81 to A81.
A83, OR circuits O81 and O82, and exclusive OR circuits E81 to E83.

Next, the operation of this embodiment will be described.

First, the data IDA and IDB input to the input ports 1 and 2, respectively, are input to the multiplexer M31 of the input arbitration unit 3. The multiplexer M31 is
Input control signals WEA and WEB are used as selection signals for data I
Arbitration is performed to determine which of DA and IDB is output to the storage unit 5. At the same time, the multiplexer 41 of the attribute flag generator 4 outputs an attribute flag FGX corresponding to the combination of the input control signals WEA, WEB.

Next, in the storage unit 5, the input data DA arbitrated by the input arbitration unit 3 and the attribute flag FG from the attribute flag generation unit 4 are paired and stored in the flip-flops F51 and F54.

Next, at the time of data output, the output control signals RDA and RD are output by the multiplexer M62 of the output selector 6.
An attribute flag FGY corresponding to the combination of B is output. The attribute flag FGY and the flip-flop F
Attribute flag FG stored in each of 54 to F56
1 to FG3 and exclusive OR circuits E61 to E6, respectively.
Compare by 3. As a result of this comparison, if there is a matching attribute flag, the flip-flop near the last-stage flip-flop F56 is preferentially output, and the multiplexer M
The signal is output from the output port 9 during the “H” level of the clock CLK via 62.

The attribute flag of the flip-flop storing the output data is reset to "0" when the clock CLK is at "L" level.

When new data is input, the shift control unit 8 sets the value of the attribute flags FG1 to FG3 stored in the flip-flops F54 to F56 of the storage unit 5 to "0". Look for the reset, flip-flop closest to input arbitration unit 3,
The write clock CKW is applied to all of the data holding flip-flops and the attribute flag holding flip-flops preceding the same, and the held data is updated. As a result, it is possible to extract only data having a specific attribute from the middle, and to fill the rest with new data.

In the state monitoring unit 7, all of the flip-flops F54 to F56 for retaining attribute flags in the storage unit 5 are set to "0".
, The data to be read is empty, and the state signal EMP is set to the "H" level. When the attribute flags are held in all of the flip-flops F54 to F56, the state signal FUL is set to the “H” level because there is no more room for writing. When an impossible attribute “3” is detected, the state signal ERR is set to “H” level.

FIG. 2 is a time chart of the circuit of this embodiment shown in FIG.

Input data ID from input ports 1 and 2
A and IDB are input control signals WEA or WEB
Are at the “H” level, and are stored in the storage unit 5 in pairs with the attribute flag FGX at the rising edge of the clock CK.

When the attribute flags held while the output control signals RDA and RDB are at the "H" level and the clock CK is at the "H" level extract the leading data OD of the data that matches the attribute flag FGY, Output from the output port 9.

Next, a second embodiment of the present invention will be described.

FIG. 3 is a circuit diagram showing a second embodiment of a first-in first-out storage device according to the present invention.

This embodiment is also a two-input, one-output 8-bit × 3 stage FIFO memory. The difference between this embodiment and the first embodiment is that the four-phase clocks S1 and S1 are different from the clock CLK. That is, a timing control unit 10 for generating S2, S3, and S4 is added.

The input control signal WE is generated by the clock S1.
A, WEB, and an output control signal RFG. Input data ID from input port 1 by clock S2
A data writing is performed. The data of the input data IDB from the input port 2 is written by the clock S3.
The output data O from the output port 9 is generated by the clock S4.
D and the storage unit 5 storing the read data.
Flip-flops F54 to F56 for retaining attribute flags of
Is reset at the same time.

Thus, this embodiment has an advantage that writing can be performed simultaneously from two input ports.

[0033]

As described above, the first-in first-out storage device of the present invention includes an attribute flag generation unit for generating an attribute flag added to input data, and an attribute flag matching the attribute flag added to the input data. By providing an output selection unit that outputs data in a first-in-first-out order from a data group that has the same, and a shift control unit that controls the amount of shift of data stored in the storage unit when new data is input, Data of a specific attribute can be extracted from the data, and the data after the extraction can be filled with new input data. Even if the type of variable or the ratio of the frequency of input / output of each variable changes, the usage efficiency does not decrease, and the generation condition of the status signal indicating the data storage status must be switched each time. There is an effect that it is easy to manage because it is not.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a first embodiment of a first-in first-out storage device of the present invention.

FIG. 2 is a time chart illustrating an example of an operation in the first-in first-out storage device of the present embodiment.

FIG. 3 is a block diagram showing a second embodiment of a first-in first-out storage device according to the present invention;

FIG. 4 is a block diagram showing a first example of a conventional first-in first-out storage device.

FIG. 5 is a block diagram showing a second example of a conventional first-in first-out storage device.

[Explanation of symbols]

1, 2, 101 input port 3 input arbitration unit 4 attribute flag generation unit 5, 5B storage unit 6 output selection unit 7, 7B status monitoring unit 8, 8B shift control unit 9, 106, 107 output port 10 timing control unit 102 to 103 decoder 105 memory cell array A51-A54, A61-A63, A71, A81-A
83 AND circuit E51, E61 to E63, E71, E81 to E83
Exclusive OR circuit F51-F56, F61 Flip-flop I51, I61, I62 Inverter M31, M41, M61, M62 Multiplexer N71 NAND circuit O61-O63, O81, O82 OR circuit

Claims (3)

(57) [Claims] A first and second input ports for inputting data; a storage unit for storing first and second input data input from the first and second input ports, respectively; first and an input arbitration section for the second arbitration storage order to the storage unit of the input data, each represent respective attributes of the-out group Dzu to the input control signal first and second input data said first And an attribute flag generation unit for generating an attribute flag to be added to the second input data; a state monitoring unit for monitoring a data storage state of the storage unit; and the attribute flag matching the attribute based on an output control signal. An output selection unit that outputs data in a first-in-first-out order from a data group having the following, and a shift control unit that controls a shift amount of data stored in the storage unit when new data is input. First-in, first-out storage device. 2. A first clock for controlling holding of the input control signal and the output control signal , and second and third clocks for controlling writing of the first and second input data, respectively. 2. The first-in, first-out storage according to claim 1, further comprising a timing control unit that generates a four-phase clock group including a fourth clock that controls reading and outputting of data stored in the storage unit. apparatus. 3. The first-in, first-out storage device according to claim 1 , wherein the status monitoring unit monitors a data storage status of the storage unit based on a storage status of the attribute flag.