JP3112792B2 - Analog-to-digital converter - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention is used as an element of an electronic circuit. In particular, the present invention relates to a technique for increasing the conversion speed of an analog / digital converter.

[0002]

2. Description of the Related Art As an analog-to-digital converter requiring a high conversion speed, a so-called flash type is conventionally known. This conventional example will be described with reference to FIGS. FIG. 7 is a diagram showing a flash type analog / digital converter. FIG. 8 is a diagram showing an analog / digital converter with a track / hold circuit.
The analog signal input to the analog signal input terminal 3 is
The divided reference voltage by resistor ladder 4 comparators 7 _1
7n . The result is obtained by the decoder 8 as 2
It is converted to the advanced digital code of output from the digital signal output terminal _{9 1 ~9 n ( "Si Bipolar} 2GS / s 6b
Flash A / D Conversion LSI "Wakamoto, et.al, ISSCC, 198
8, PP232-233).

A configuration in which a track and hold circuit 20 is provided at the input of an analog-to-digital converter as shown in FIG. 7 is also widely known ("A Gigasample / s 5 bit ADC wi").
th On-chip Track & Hold Based on an Industrial 1μ
m GaAs MESFET E / D Process "Hagelauer, et.al, GaAs IC
symposium 1991 pp365-368). This is because a signal that changes at a high speed is held at a constant value during the processing time of the analog-to-digital converter and the analog-to-digital conversion is performed stably.

[0004]

The flash type analog-to-digital converter requires a large number of comparators. The number is 2 ^{n -1} when the resolution is n bits, that is, 255 when the resolution is 8 bits. Therefore, the wiring between the analog signal input terminal and the comparator becomes longer, and the signal path length to the n comparators differs. The conversion speed is limited by the delay time, and an error occurs in the output digital value due to the difference in the delay time. That is, at the comparison timing controlled by the clock signal, an analog signal at a different timing is input to the input of each comparator, and the output value is not accurate.

Further, since a large number of comparators are connected in parallel to the analog signal input terminal, the input capacity increases, and a large power is required to drive the analog / digital converter at high speed. Further, since the comparator operates in a non-linear manner, the input capacitance is also usually non-linear, which causes distortion.

[0008] In the case of the case with the track-hold circuit as shown in FIG. 8, a part of the clock signal for controlling the track-and-hold may be mixed into the modulated signal, thereby deteriorating modulation accuracy.

The present invention has been made in such a background, and an object of the present invention is to improve the precision and accuracy of an output digital signal. An object of the present invention is to extend the frequency range used by a digital-to-analog converter. An object of the present invention is to provide an analog-to-digital converter having a high conversion speed and high conversion quality.

[0008]

SUMMARY OF THE INVENTION The present invention is an analog-to-digital converter, which is characterized by an analog electric signal input terminal (3) and an electro-optical converter for converting the analog electric signal into an optical signal. A circuit (1, 2), a plurality of n photoelectric converters (5) for receiving the optical signal, and a reference voltage having different levels applied to the other input with each output of the photoelectric converter as one input. Are provided, and a decoder (8) which receives each output of the n comparators and outputs an n-bit digital signal is provided from the electro-optical conversion circuit. An optical circuit is provided in which the distances of the n optical paths to the photoelectric converters are substantially equal. That is, the electro-optical conversion circuit and the optical signal such that an analog optical signal emitted from one location is uniformly received by a plurality of opto-electrical converters via optical paths of the same distance, and is converted into an electric signal again. An electrical converter is provided.

As a specific configuration example, the optical circuit is configured such that n optical-electrical converters are arranged on a circumference, and are arranged on a line passing through the center of the circumference and perpendicular to a plane including the circumference. It is preferable that the electro-optical conversion circuit has a structure. Alternatively, the optical circuit may have a structure in which output light of the electro-optical conversion circuit is optically coupled to a plurality of the photoelectric converters via an integrating sphere.

Further, the electro-optical conversion circuit may include a means for generating an optical pulse synchronized with a clock signal of the output digital signal. At this time, it is preferable that a means for temporarily holding the output of the photoelectric converter is inserted between the photoelectric converter and the comparator.

[0011]

The electric signal is converted into an optical signal and emitted from one electro-optical conversion circuit. This is equally received by a plurality of photoelectric converters and converted into electrical signals. At this time, there is no difference in the transmission distance of the optical path from one electro-optical conversion circuit to a plurality of opto-electrical converters. Can be applied, so that no conversion error occurs due to a timing error between the comparators.

Further, since only one electro-optical conversion circuit is connected to the input terminal, the input capacity becomes large,
No distortion due to non-linearity of capacitance.

When the light source is pulsed light, the input optical modulator also operates as a sampling circuit. However, unlike a sampling circuit using an electric signal, a sampling pulse does not mix into a modulated signal.

[0014]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The configuration of a first embodiment of the present invention will be described with reference to FIG. FIG. 1 is a block diagram of a first embodiment of the present invention.

The present invention is an analog-to-digital converter, which is characterized by an analog electric signal input terminal 3, an optical modulator 2 as an electro-optical conversion circuit for converting this analog electric signal into an optical signal, and and its light source 1, a plurality of n photoelectric converter 5 ₁ to 5 _n for receiving the optical signal
When the optical-electrical converter 5 ₁ to 5 _n n number of comparators 7 ₁ to _7-n of different levels of reference voltages to each output to the other input as one input is given in, for these n and a decoder 8 for outputting a digital signal of n bits as input the output of the comparator 7 ₁ to _7-n, n-number of the light from the optical modulator 2 to n optical-electrical converter 5 ₁ to 5 _n An optical circuit having substantially equal path distances is provided.

The light source 1 is composed of a semiconductor laser. The light exiting from here is input to the optical modulator 2. An analog signal is input from an analog signal input terminal 3 connected to the optical modulator 2. Opposite the optical modulator 2 photoelectric converter 5 ₁
~ 5 _n are installed. These are installed so that the optical signal output from the optical modulator 2 irradiates them evenly. Photoelectric converter 5 ₁ to 5 _n is 2 ^n-1 or (n resolution (bit)) is provided.

The output of the photoelectric converter 5 ₁ to 5 _n is connected to one input of a comparator 7 ₁ to _7-n. Comparators 7 _{1 to} 7
_A reference voltage is applied from the reference voltage terminals 11 and 12 to the other input of _n . The comparator 7 ₁ to _7-n is in a so-called latch preparative comparator place to hold the output by a clock from outside. The comparison result is output from the digital signal output terminal 9 ₁ to 9 _n are converted into digital code binary by the decoder 8.

The reference voltage, the resolution (1LSB) are 2 ^n-1 pieces prepared in a corresponding step, a resistor with a value equal to connect ^the 2 ⁿ series, the reference voltage terminal at both ends 11, 1
A reference voltage corresponding to 2 to full scale is applied.

Outputs from the comparators 7 _{1 to} 7 _n are input to a decoder 8 comprising a logic gate. The output of the decoder 8 is connected to a digital signal output terminal 9 ₁ to 9 _n.

Next, the operation of the first embodiment of the present invention will be described. The light output from the light source 1 is intensity-modulated by an optical modulator 2 in accordance with an input signal from an analog signal input terminal 3 to become an optical signal. The optical signal output from the optical modulator 2 is
It was irradiated with oppositely placed light-electric converter 5 ₁ to 5 _n, the output is compared with a reference voltage by a comparator 7 ₁ to _7-n, is held by the latch clock.

The outputs from the comparators 7 _{1 to} 7 _n are low when the reference voltage is lower than the input signal, and high when the reference voltage is higher than the input signal. This is converted into a general digital code by the decoder 8 and output. Common digital codes include straight binary, 2
Complement, Gray code, etc. The first embodiment of the present invention can be applied to any of these.

The operation of the first embodiment of the present invention will be described in more detail with reference to FIG. FIG. 2 is a timing diagram showing the operation of the first embodiment of the present invention. Light from the light source 1 is modulated by an analog input signal shown in FIG.
The optical modulator output shown in FIG. The optical modulator output irradiates photoelectric converter 5 ₁ to 5 _n. The output of the photoelectric converter 5 ₁ to 5 _n is compared with the reference voltage by the comparator 7 ₁ to _7-n, is held by the rack clock indicating in Figure 2 (c). This passes through the decoder 8 and finally FIG.
It is output as a digital signal at the timing shown in FIG.

[0023] illustrating the specific configuration of the optical modulator 2 and the optical-electrical converter 5 ₁ to 5 _n of the first embodiment of the present invention with reference to FIGS. FIG. 3 is a diagram showing a specific configuration of an optical circuit for making optical paths substantially equal in the first embodiment of the present invention. FIG. 4 is another example of the optical circuit in the first embodiment of the present invention, and is a diagram showing a specific configuration for making the optical paths substantially equal for n paths. As shown in FIG. 3, a plurality of photoelectric converter 5 _{1-5 8} is arranged on the circumference, the optical modulator 2 is arranged on a line perpendicular to the plane including the central streets this circumference of the circle Have been. The distance from the optical modulator 2 of the lens is an example of arranging the photoelectric converter 5 _{1-5 8} respectively equal distance.

FIG. 4 shows an example in which the photoelectric converter group 5 is coupled to the optical modulator 2 via the integrating sphere 15. In this case, the output of the optical modulator 2 is converted into a uniform diffused optical signal by the integrating sphere 15, which is converted into an electric signal by the photoelectric converter group 5. Both are installed so that the optical signal output from the optical modulator 2 is uniformly irradiated with light electric transducer 5 _{1-5 8} or photoelectric converter group 5.

Next, a second embodiment of the present invention will be described with reference to FIG. FIG. 5 is a block diagram of a second embodiment of the present invention. In the second embodiment of the present invention, the light source 1 is a pulsed light source driven by a clock source 10, and the clock source 1
It is provided with a hold circuit 6 ₁ to 6 _n for temporarily holding the data by the clock from 0.

The light source 1 for generating pulsed light is constituted by a pulse-driven semiconductor laser, and is driven by a clock source 10. The light exiting from here is input to the optical modulator 2. An analog signal is input from an analog signal input terminal 3 connected to the optical modulator 2. Photoelectric converter 5 ₁ to 5 _n is placed opposite the optical modulator 2. This specific configuration is the same as that shown in FIGS. 3 and 4 in the first embodiment of the present invention. These are installed so that the optical signal output from the optical modulator 2 irradiates them evenly. Photoelectric converter 5 ₁ to 5 _n is 2 ^n-1 or (n resolution (bit)) is provided.

The output of the photoelectric converter 5 ₁ to 5 _n is connected via the hold circuit 6 ₁ to 6 _n to one input of a comparator 7 ₁ to _7-n. Reference voltages are applied to the other inputs of the comparators 7 _{1 to} 7 _n from reference voltage terminals 11 and 12. The comparator 7 ₁ to _7-n is in a so-called latch preparative comparator place to hold the output by a clock from outside. The comparison result is converted into a binary digital code by the decoder 8 and the digital signal output terminals 9 _{1 to} 9
Output from _n .

The reference voltage, the resolution (1LSB) are 2 ^n-1 pieces prepared in a corresponding step, a resistor with a value equal to connect ^the 2 ⁿ series, the reference voltage terminal at both ends 11, 1
A reference voltage corresponding to 2 to full scale is applied.

Outputs from the comparators 7 _{1 to} 7 _n are input to a decoder 8 composed of a logic gate. The output of the decoder 8 is connected to a digital signal output terminal 9 ₁ to 9 _n.

The operation of the second embodiment of the present invention will be described. The light output from the light source 1 is intensity-modulated by an optical modulator 2 in accordance with an input signal from an analog signal input terminal 3 to become an optical signal. Optical signal output from the optical modulator 2, it was irradiated with oppositely placed light-electric converter 5 ₁ to 5 _n, the comparator 7 _1-7 by its output hold circuit 6 ₁ to 6 _n
It is held until the output of _n is determined. This output is compared with a reference voltage by a comparator 7 ₁ to _7-n, the clock source 10
It is held by the clock from.

The outputs from the comparators 7 _{1 to} 7 _{n go} low when the reference voltage is lower than the input signal, and go high when the reference voltage is higher than the input signal. This is converted into a general digital code by the decoder 8 and output. Common digital codes include straight binary, 2
Complement, Gray code, etc. The second embodiment of the present invention can be applied to any of these.

The operation of the second embodiment of the present invention will be described in more detail with reference to FIG. FIG. 2 is a timing diagram showing the operation of the second embodiment of the present invention. FIG. 6A shows pulsed light from the light source 1. This is modulated by the analog input signal shown in FIG. 6B, and becomes an optical modulator output shown in FIG. 6C. The output of the optical modulator is output to the photoelectric converter 5
Irradiating the ₁ to 5 _n. The output of the photoelectric converter 5 ₁ to 5 _n by hold circuit 6 ₁ to 6 _n, are held as shown in FIG. 6 (d). This held output is reset by the reset pulse of FIG. 6E before the next light pulse arrives. The output of the hold circuit 6 ₁ to 6 _n are comparators 7 _1-7
It is compared with the reference voltage by _n, and is again held by the latch pulse supplied from the clock source 10 shown in FIG. This passes through the decoder 8 and finally FIG.
It is output as a digital signal at the timing shown in FIG.

When a pulse light source is used as the light source 1 as in the second embodiment of the present invention, the optical modulator 2 also operates as a sampling circuit. However, unlike a sampling circuit using an electric signal, a sampling pulse is applied. There is no mixing with the modulation signal.

[0034]

As described above, according to the present invention,
The accuracy and accuracy of the output digital signal have been improved, the frequency range used has been expanded, and the increase in input capacitance has been suppressed. analog·
A digital converter can be realized.

[Brief description of the drawings]

FIG. 1 is a block diagram of a first embodiment of the present invention.

FIG. 2 is a timing diagram showing the operation of the first embodiment of the present invention.

FIG. 3 is a diagram showing a specific configuration of an optical circuit according to the first embodiment of the present invention.

FIG. 4 is a diagram showing a specific configuration of another optical circuit in the first embodiment of the present invention.

FIG. 5 is a block diagram of a second embodiment of the present invention.

FIG. 6 is a timing diagram showing the operation of the second embodiment of the present invention.

FIG. 7 is a diagram showing a flash type analog-digital converter.

FIG. 8 is a diagram showing an analog-digital converter with a track-and-hold circuit.

[Explanation of symbols]

REFERENCE SIGNS LIST 1 light source 2 optical modulator 3 analog signal input terminal 4 resistance ladder 5 photoelectric converter group 5 _{1 to} 5 _n photoelectric converter 6 _{1 to} 6 _n hold circuit 7 _{1 to} 7 _n comparator 8 decoder 9 _{1 to} 9 _n Digital signal output terminal 10 Clock source 11, 12 Reference voltage terminal 15 Integrating sphere 20 Track and hold circuit

Claims (4)

(57) [Claims] 1. An analog electric signal input terminal (3), an electro-optical conversion circuit (1, 2) for converting the analog electric signal into an optical signal, and a plurality of n photoelectric converters for receiving the optical signal (5), n comparators (7) in which each output of the photoelectric converter is used as one input, and reference voltages of different levels are respectively applied to the other input, and each of the n comparators A decoder (8) for receiving an output and outputting an n-bit digital signal, wherein n optical paths from the electro-optical conversion circuit to the n opto-electrical converters have substantially equal distances. An analog-to-digital converter, comprising: 2. The optical circuit according to claim 1, wherein the n photoelectric converters are arranged on a circumference, and the electro-optical conversion circuit is on a line passing through the center of the circumference and perpendicular to a plane including the circumference. 2. The analog-digital converter according to claim 1, wherein the analog-digital converter has an arranged structure. 3. The analog-digital converter according to claim 1, wherein said optical circuit has a structure in which output light of said electro-optical converter irradiates a plurality of said opto-electric converters through an integrating sphere. 4. An analog-to-digital converter according to claim 1, wherein said electro-optical conversion circuit includes means for generating an optical pulse synchronized with a clock signal of an output digital signal.