JP3112306B2 - Information processing apparatus and method - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION The present invention relates to an electronic organizer,
Information processing devices such as personal computers
And methods .

[0002]

2. Description of the Related Art Among information processing apparatuses, in particular, electronic notebook apparatuses and the like, in which portability is important, are demanded to be smaller and lighter. Tend. Since data can be transmitted and received statically, high-speed processing can be performed by using an IC card.

If the IC card is inserted or removed while the power of the device is turned on, a load is momentarily applied to the terminal portion of the connector of the IC card, so that the program of the device main body runs away. Might be. For this reason, in a conventional device, as shown in FIG. 6, for example, a cannula 3 is provided for a device main body 1 having a connector 2 for mounting an IC card, and an IC card is required if the cannula 3 is not removed from the main body 1. 4 cannot be attached to the connector 2 of the apparatus main body 1. And
When the cannus 3 is pulled out, the power of the apparatus main body 1 is automatically turned off. Thereby, IC
The card 4 is prevented from being mounted while the power of the apparatus main body 1 is turned on.

[0004]

In the conventional device, since the cannula 3 is provided as described above and the operation of controlling the attachment and detachment of the IC card 4 is performed, the operability is poor and the device is downsized. It was one obstacle to that.

[0005] The present invention has been made in view of such a situation, and is intended to improve operability and reduce the size.

[0006]

An information processing apparatus according to the present invention performs various operations according to a predetermined program.
Calculation means, first detection means for detecting the start of attachment / detachment of the IC card to / from the connector , and detection result of the first detection means
The data being processed by the calculating means is stored in correspondence with
Storage means . Information processing of the present invention
The processing method performs various arithmetic processing according to a predetermined program.
Calculation steps to be performed and the attachment of the IC card to the connector.
A first detection step of detecting the start of the removal, and a first detection
Calculation step corresponding to the detection result in step processing
Storage step of storing data being processed in
And features.

[0007]

In the information processing apparatus and method according to the present invention ,
Various arithmetic processes according to a predetermined program is executed, the start of detachment of the IC card relative to the connector is detected, its
The data being processed is stored according to the detection result of
You. Therefore, the operation is simplified and the size is easily reduced.

[0008]

FIG. 2 shows an IC in an information processing apparatus according to the present invention.
2 shows a basic configuration of a card connector. The figure shows a state viewed from the bottom side. As shown in the figure, the board 11 to which the connector 13 is attached has
A switch 12 (detection means) is provided. When the IC card 14 is attached to the connector 13 in the direction indicated by the arrow C in the figure, the switch 12 detects this attachment.

FIG. 3 shows the switch 12 and a part of the connector 13 in an enlarged manner. As shown in FIG.
3 is an arm 2 made of, for example, a flexible synthetic resin.
1 (detection means), and a protrusion 2
2 are formed. On the other hand, the switch 12 is provided with a pressing portion 31 which is urged leftward in the figure (toward the arm 21) by a spring 33. A contact 32 pressed by the pressing portion 31 is provided on the right side of the pressing portion 31 in the drawing (the side opposite to the arm 21).

That is, when the IC card 14 is inserted into the connector 13, the protrusion 22 is pressed by the side wall 14a, and the arm 21 rotates rightward in the figure. As a result, the pressing portion 31 is pressed rightward in the drawing by the arm 21, and the pressing portion 31 is moved rightward in the drawing against the urging force of the spring 33. Accordingly, the contact 32 is turned on by the right end of the pressing portion 31 in the drawing. Thereby, the IC card 14
Is detected to be attached to the connector 13.

FIG. 1 is a block diagram showing the configuration of an embodiment of an information processing apparatus according to the present invention, and portions corresponding to those in FIGS. 2 and 3 are denoted by the same reference numerals.

The IC card 14 is provided with a plurality of receiving portions 41 connected to a plurality of pins 51 of the connector 13. The pins are arranged on the IC card 14 and the connector 1
3 may of course be provided with a receiving portion.

The two receiving portions 41a and 41b at the left and right end portions of the IC card 14 are mutually connected by an internal lead wire 42.

In the connector 13, of the plurality of pins 51, the pin 51a connected to the receiving portion 41a of the IC card 14 is grounded. The pin 51 b connected to the receiving portion 41 b of the IC card 14 is connected to a voltage source Vb supplied from a backup battery 68 via a resistor 62. The pin 51b is connected to one input of a NAND gate 64 via an inverter 63.
The other input of the NAND gate 64 is connected to the other end of the switch 12 (the contact 32) whose one end is grounded. The connection point between the switch 12 (contact 32) and the NAND gate 64 is connected to the voltage source Vb via the resistor 61.

The CPU 65 executes various operations in accordance with the program stored in the ROM 66 and stores necessary data in the RAM 67 as needed. The RAM 67 is backed up by a battery 68. Also, the CPU 65
Are controlled in accordance with the output of the NAND gate 64. Battery 69 is a switch 70
The voltage Va required for each circuit is output and supplied via (switch means). The switch 70 can be manually operated by the user, and is automatically turned off by the CPU 65.

Next, the operation will be described with reference to timing charts shown in FIGS. When the user turns on the switch 70, the voltage Va output from the battery 69 is supplied to each circuit via the switch 70. This allows normal operation.

Next, when the power of the apparatus main body is turned on, the IC card 14 is connected to the connector 13.
The operation in the case where the camera is mounted on will be described.

In a state before the IC card 14 is mounted on the connector 13, the contact 32 of the switch 12 is off, and one input of the inverter 64 is supplied with the voltage Vb via the resistor 61. (FIG. 4 (a)). Further, since the voltage Vb is supplied to the input terminal of the inverter 63 via the resistor 62 (FIG. 4B), a signal of logic L is input to the other input of the NAND gate 64 via the inverter 63. (FIG. 4C). as a result,
The output of the NAND gate 64 is at logic H (FIG. 4)
(D)). Therefore, the CPU 65 can perform a normal operation.

In the above state, when the IC card 14 is attached to the connector 13, the arm 21 is pressed by the right side wall 14a in FIG. 1 of the IC card 14, and the contact 32 of the switch 12 is turned on as described above. I do.
As a result, one input of the NAND gate 64 is connected to the switch 1
2 (FIG. 4 (a), t1). At this time,
Receiving part 41 of IC card 14 and pin 51 of connector 13
Has not been connected yet, the other input of the NAND gate 64 remains at logic L (FIG. 4C). Therefore,
At this time, the output of the NAND gate 64 is inverted to logic L.
When a logical L signal is input from the NAND gate 64, the CPU 65 executes an NMI (Non-Maskable Interrupt) interrupt process. That is, the processing up to that point is temporarily suspended, and the data is stored in the backup RAM 67. When the saving process is completed, the CPU 65 controls the switch 70 to turn it off (FIG. 4 (e) t).
1). As a result, the supply of power to each unit is stopped, and the device shifts to a non-operation state.

Also in this case, a predetermined voltage Vb is supplied to the RAM 67 and the resistors 61 and 62 from the backup battery 68.

When the user inserts the IC card 14 further into the connector 13, the pins 51 and the receiving portion 41 are connected to each other. As a result, one end of the resistor 62 is connected to the connector 1
The third pin 51b, the receiving portion 41b of the IC card 14, the lead wire 42, the receiving portion 41a, and the pin 51a (detection means) are grounded (FIG. 4B, t2). As a result, the output of the inverter 63 (t2 in FIG. 4C) is inverted. At this time, since the contact 32 of the switch 12 remains on, the output of the NAND gate 64 is inverted to logic H (FIG. 4).
(D) t2). Thus, the CPU 65 can perform a normal operation again. Then, the user then switches 70
Is turned on by manual operation (t3 in FIG. 4 (e)), the device can operate normally again.

Next, an operation when the IC card 14 is detached from the connector 13 while the switch 70 is turned on will be described. As mentioned above, IC
When the card 14 is mounted on the connector 13, one input (FIG. 5 (a)) of the NAND gate 64 is at logic L and the other input (FIG. 5 (c)) is at logic H. Therefore, its output (FIG. 5D) is at logic H. When the IC card 14 is detached from the connector 13, the connection between the pin 51 and the receiving portion 41 is released first. As a result, the input of the inverter 63 (t5 in FIG. 5B) is inverted from logic L to logic H, and its output (t5 in FIG. 5C).
5) is inverted from logic H to logic L. At this time, since the contact 32 of the switch 12 is still on, the output of the NAND gate 64 (t5 in FIG. 5D) is inverted from logic H to logic L. Therefore, as in the case described above, the CPU
Reference numeral 65 executes NMI interrupt processing to forcibly turn off the switch 70 (t5 in FIG. 5 (e)). As a result, runaway of the program is prevented.

After that, when the IC card 14 is completely removed from the connector 13, the arm 21 returns to its original state based on its own elastic force, and the pressing portion 31 of the switch 12 is pressed by the biasing force of the spring 33 as shown in FIG. At 3, move to the left. As a result, the contact 32 is turned off. As a result, the voltage at one end of the resistor 61 is inverted from logic L to logic H (FIG. 5 (a), t6). Therefore, the NAND gate 6
4 is again inverted to logic H (FIG. 5 (d), t6).
As a result, if the user turns on the switch 70 again, normal operation can be performed.

[0024]

As above, according to the present invention an information processing apparatus and the present invention
According to the method , opening and removing of the IC card with respect to the connector is performed.
Start, and in accordance with the detection result,
Since the data is stored , the runaway of the program can be prevented even when the user accidentally inserts and removes the IC card while the power is turned on. In addition, since the user does not need to perform any special operation, the operability is improved. Furthermore, unlike the conventional case, it is not necessary to use a screwdriver or the like, so that the configuration is simplified, and the size and cost can be reduced.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating a configuration of an embodiment of an information processing apparatus according to the present invention.

FIG. 2 is a perspective view of a part of a switch 12 and a connector 13 in the embodiment of FIG. 1 as viewed from a bottom surface side.

FIG. 3 is an enlarged cross-sectional view showing a part of a switch 12 and a connector 13 in the embodiment of FIG. 2;

FIG. 4 is a timing chart for explaining an operation when the IC card is mounted in the embodiment of FIG. 1;

FIG. 5 is a timing chart for explaining an operation when the IC card is removed in the embodiment of FIG. 1;

FIG. 6 is a plan view illustrating a configuration of an example of a conventional information processing apparatus.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 11 Substrate 12 Switch (detection means) 13 Connector 14 IC card 21 Arm (detection means) 22 Projection 41 Receiving part 42 Lead wire 51 Pin 64 NAND gate 65 CPU 66 ROM 67 RAM 68, 69 Battery 70 Switch (switch means)

──────────────────────────────────────────────────続 き Continuing on the front page (72) Inventor Tamotsu Mizuno 1-21-6 Dogenzaka, Shibuya-ku, Tokyo Japan Aircraft Electronics Co., Ltd. (72) Inventor Tadashi Isawa 1-2-1-6 Dogenzaka, Shibuya-ku, Tokyo Japan (56) References JP-A-2-81284 (JP, A) JP-A-1-303692 (JP, A) JP-A-1-100253 (JP, U) (58) Field (Int. Cl. ⁷ , DB name) G06F 3/00 G06K 17/00

Claims (7)

(57) [Claims] 1. A data processing apparatus for exchanging signals with respect to the mounted IC card connector, operation manual for performing various arithmetic processes according to a predetermined program
A step, first detecting means for detecting the start of attachment / detachment of the IC card to / from the connector , and the computing means corresponding to a detection result of the first detecting means.
Storage means for storing data being processed by the stage . 2. The method according to claim 1, wherein the first detecting means is connected to the connector.
Pins provided and receiver provided on the IC card
The IC card to the connector before contacting
Detect wearing 2. The information according to claim 1, wherein
Information processing device. 3. The apparatus according to claim 1, wherein said detection result corresponds to a detection result of said first detection means.
To control the power supply to each part of the information processing apparatus.
Source supply control means; Power supply means for constantly supplying power to the storage means
When 2. The information processing apparatus according to claim 1, further comprising:
Equipment. 4. The pin provided on the connector,
Detecting contact of the receiving portion provided on the IC card;
Second detection means In addition, The calculating means may be such that the first detecting means is connected to the connector.
When the attachment of the IC card to the
The processing is interrupted, and the second detecting means is connected to the connector.
And the pin provided on the IC card.
When the contact of the receiving part is detected, the above-described arithmetic processing is interrupted.
Resume The information processing according to claim 1, wherein
apparatus. 5. The connector according to claim 1, wherein the first detecting means is connected to the connector.
It has a protruding part that comes into contact with the IC card
Arm to Outputs a detection signal in response to contact with the arm
Switch The method according to claim 1,
An information processing apparatus according to claim 1. 6. The power supply control means is operated by a user.
Is possible 4. The information processing according to claim 3, wherein
apparatus. 7. An IC card mounted on a connector
Information processing method of an information processing apparatus for transmitting and receiving signals
hand, An arithmetic switch that performs various arithmetic processing according to a predetermined program
Tep, Detecting the start of attaching / detaching the IC card to / from the connector
A first detecting step to know; Corresponding to the detection result in the processing of the first detection step.
Storing the data being processed in the calculation step
Steps and An information processing method comprising: