JP3110397B2 - Writing method and recording medium for nonvolatile semiconductor memory device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a writing method and a recording medium for a nonvolatile semiconductor memory device, and more particularly to an optimum writing method by measuring a threshold value of a memory cell before and after initial writing to a memory cell. The present invention relates to a writing method and a recording medium of a nonvolatile semiconductor memory device for determining conditions.

[0002]

2. Description of the Related Art FIG. 10 is a graph showing retention characteristics of a memory cell when the threshold value of the memory cell after writing varies. The vertical axis represents the threshold voltage of the memory cell, and the horizontal axis represents the retention time. At present, the threshold value of the memory cell to which data is written satisfies only the condition that the threshold value exceeds a certain level. Whether or not the memory cell holds data is determined by whether or not the threshold voltage is higher than the W_B_V voltage (the voltage level of a threshold value at which it is determined that data has been written to the memory cell). You.

Therefore, it is impossible to determine whether the threshold value of the W_B_V voltage has dropped from a somewhat high level or has dropped from a level substantially equal to the W_B_V voltage. Therefore, for example, W_B
In sample 2 of a memory cell having a threshold value of 2 volts (V) higher than the _V voltage, and in sample 3 of a memory cell having a threshold value of 0.5 V higher than the voltage W_B_V, the holding time was changed. And sample 2,
When the respective threshold values of the sample 3 both decrease (hold out), the threshold value of the memory cell sample 3 immediately becomes lower than the W_B_V voltage. It can be determined as holding failure. However, as in the case of sample 3, the threshold value of sample 2 of the memory cell immediately becomes W_B
Since the voltage is not lower than the _V voltage, it takes time for the sample 2 to be determined as a holding failure.

FIG. 11 is a graph showing the retention characteristics of a memory cell when the threshold value of the memory cell at the time of writing is made constant. The vertical axis represents the threshold value of the memory cell,
The horizontal axis represents the retention time. If the threshold value of the memory cell after writing is kept constant, there is no memory cell having a threshold value that is too high with respect to the W_B_V voltage, and it is possible to detect retention loss of the memory cell at an early stage.

[0005]

A solution for keeping the threshold value of a memory cell after writing at a certain level is disclosed in, for example, Japanese Patent Application Laid-Open Nos. 7-039395 and 7-169.
284 has already been disclosed. JP-A-7-03
No. 7395 discloses an apparatus for changing a writing condition. However, a specific means is not shown as the writing variable means, but it is described that the writing means has only means for changing the writing condition.
On the other hand, in Japanese Patent Application Laid-Open No. 7-169284, the threshold value is increased by ΔV _{pp for} each write, and the distribution of the threshold value after the write is set to ΔV _pp. No means are shown.

In each of the above examples, FIG.
As shown in the write flow, the initial threshold value of the memory cell before writing is not measured. That is, step S
In step S1, an initial write pulse is applied.
In, the threshold voltage is measured. Next, step S
In step 3, an optimum write pulse is set, and step S
In step 4, the optimum write pulse set in step S3 is applied.

As described above, by measuring only the threshold value of the memory cell after the initial writing, the threshold value immediately after the initial writing is the same in the cells A and B as shown in FIG. However, even if the same write pulse is applied for the second time, the threshold values after writing of the cells A and B may be significantly different.

That is, in order to accurately predict the threshold value of the memory cell after the second or subsequent write, it is necessary to measure the threshold value of the memory cell before and after the first write.

SUMMARY OF THE INVENTION The present invention has been made in view of such a situation, and reduces the distribution of the threshold value of a memory cell after writing, shortens the writing time, or reduces stress during writing. Is what you can do.

[0010]

According to a first aspect of the present invention, there is provided a writing method for a nonvolatile semiconductor memory device, wherein a writing signal is applied to change a charge storage amount of a charge storage layer of a memory cell. A data writing method for a non-volatile semiconductor memory device, in which a threshold value of a memory cell is measured before and after a first write signal is applied to the memory cell. A write condition is determined based on the determined threshold value of the memory cell, and a write signal corresponding to the determined write condition is applied to the memory cell. According to a second aspect of the present invention, there is provided a method for writing data by applying a write signal to change a charge storage amount of a charge storage layer of a memory cell and control a threshold voltage. The method of writing a nonvolatile semiconductor memory device, comprising: measuring a threshold value of the memory cell before and after applying a first write signal to the memory cell; A write condition is determined based on the write time, and a write time in which a change in the threshold value of the memory cell when a write signal corresponding to the determined write condition is applied to the memory cell is within a predetermined range is detected. The writing to the memory is performed for each writing time, and the writing to the memory cell is repeatedly performed until the threshold value after the writing reaches a predetermined reference value. And wherein the door. Further, the write condition can be related to the magnitude of the voltage of the write signal. Further, the writing condition can be related to a writing time of a writing signal. Further, the application of the write signal to the memory cells can be performed simultaneously on a plurality of memory cells. According to a sixth aspect of the present invention, there is provided a recording medium on which a program capable of executing the writing method of the nonvolatile semiconductor memory device according to the first aspect is recorded. In the writing method of the nonvolatile semiconductor memory device according to the present invention, data writing is performed by applying a write signal, changing the amount of charge stored in the charge storage layer of the memory cell, and controlling the threshold voltage. A writing method for a nonvolatile semiconductor memory device, wherein a threshold value of a memory cell is measured before and after a first write signal is applied to the memory cell, and based on the measured threshold value of the memory cell. Then, a write condition is determined, and a write signal corresponding to the determined write condition is applied to the memory cell.

[0011]

FIG. 1 is a flowchart showing a processing example of an embodiment to which a writing method of a nonvolatile semiconductor memory device of the present invention is applied.

In a flash memory or the like having a write mode in which an electric pulse of a predetermined voltage is simultaneously applied to one or a plurality of memory cells to be written and a verify mode in which a write decision is made by reading the memory cells, Once in mode, in step S1, after measuring the memory cell of the initial threshold (V _t), and stores it, at step S2, the write pulse voltage height V _{pp 0,} write pulse voltage width T _pw0
Is applied to the memory cell to perform writing.

After the initial writing, in step S3, the threshold value of the memory cell is measured again and stored. In step S4, a write pulse voltage suitable for the characteristics of the memory cell is selected from the threshold values of the memory cell obtained in steps S1 and S3.
In step S5, the selected write voltage (applied) pulse is applied to the memory cell. In this way,
End the write mode.

Next, a detailed processing procedure for selecting an optimum write pulse in setting the optimum write pulse in step S4 of the flowchart shown in FIG. 1 will be described with reference to FIG.
This will be described with reference to the flowchart of FIG. Further, a method of selecting a write pulse voltage in step S4 will be described with reference to FIGS.

In step B1 of the flow chart of FIG. 2, the state of the change in the threshold value of the memory cell before and after the first write is calculated based on the threshold value of the memory cell obtained in steps S1 and S3 of FIG. The data of the evaluation sample prepared in advance as shown in FIG. 3 is compared, and the data of the sample having the closest characteristic is adopted. FIG. 3 shows a change in the threshold value of the memory cell due to the first write pulse of each of the samples A to E. The vertical axis represents the threshold voltage of the memory cell, and the horizontal axis represents the initial write pulse width.

FIG. 4 is a graph showing the variation of the threshold value at each write pulse voltage of the sample selected in step B1 of FIG. The write pulse voltage V _{pp in} FIG. 4 has the highest V _ppa , V _ppb ,
It is _assumed that V _ppc , V _ppd , and V _{ppe decrease} in this order. The write pulse voltage to be applied is determined in a range where the change in the threshold value of the memory cell until the voltage level reaches the threshold voltage (W_B_V voltage) at which the memory cell is determined to be written shows linearity.

In the case of FIG. 4, the write pulse voltage V
_{The ppe} is excluded from the selection symmetry because the change in the threshold value loses linearity before reaching the W_B_V voltage, and is between write pulse voltages V _{ppa to} V _ppe linearly changing to the write determination level (W_B_V voltage). A predetermined voltage is selected (Step B2).

If the write time is to be minimized, V _ppa having the shortest write time T _pw is selected from the range of the selected V _pp , and if the stress applied to the memory cell at the time of writing is to be minimized, , The lowest applied voltage V _ppd is selected from the selected V _pp range.

That is, in step B3, it is determined whether or not the writing time is to be shortened. If the writing time is to be shortened, the process proceeds to step B4, where the writing time T _pw is reduced to T _pwa which is the shortest. The corresponding applied voltage V _ppa
Is selected. On the other hand, if it is determined in step B3 that the purpose is to reduce write stress, the process proceeds to step B5, and the lowest applied voltage V _ppd is selected.

With the optimum write pulse determined as described above, in step S5 in FIG. 1, a second write operation is performed on the memory cell, and the write mode ends.

As described above, the above-described embodiment provides a writing method that narrows the distribution of the threshold value of the memory cell after writing, shortens the writing time, or reduces stress during writing. be able to.

Next, a description will be given of a processing example of the second embodiment for equalizing the threshold distribution of the memory cell after writing.

[0023] FIG 5 is a flowchart for explaining a processing example for accommodating the width of the distribution of the threshold of the memory cell after write in a certain range [Delta] V _t. The flowchart shown in FIG. 5 is different from the flowchart shown in FIG.
This is a modification of the portion after the application of the write pulse, in which the write pulse voltage is applied to the memory cell in a plurality of times, and the threshold of the memory cell is changed to the write level (W_B_V voltage) for each application of the write pulse voltage. ) Is determined.

Steps S1 to S3 in FIG.
Steps S1 to S3 in FIG. 1 are the same as those in FIG.

In step C4 of FIG. 5, a write pulse voltage suitable for the characteristics of the memory cell is selected from the threshold values of the memory cell obtained in steps S1 and S3.

FIG. 6 is a flow chart for explaining the processing procedure for making the threshold distribution constant. The processing in steps B1 to B5 of FIG. 6 is the same as the processing procedure of the first embodiment described above with reference to FIGS.
Since the processing is the same as that in steps B1 to B5 of the flowchart of FIG. In step D6, as described later with reference to FIG.
The writing time required for the threshold value after writing to increase by a certain value is selected.

FIG. 7 is a graph for explaining a method of selecting the write pulse width for accommodating the distribution of the threshold of the memory cell after write within [Delta] V _t. The vertical axis represents the threshold value of the memory cell, and the horizontal axis represents the write time.

In selecting the write pulse voltage,
It is assumed that V _ppb of sample B, which has the shortest write time, is selected. At this time, if the variation of the threshold value of the memory cell when the write pulse voltage V _ppb is applied is as shown in the graph of FIG. 7, the width of the distribution of the threshold value of the memory cell after writing is obtained. to keep the constant range [Delta] V _t, the threshold voltage of the memory cell selects the writing time T _PWB required to vary by [Delta] V _t (step D6 in Fig. 6).

With respect to another sample having a characteristic different from that of sample B, by selecting a write pulse width at which the threshold value of the sample fluctuates by ΔV _t ,
The distribution of the threshold of the memory cell after programming, may be within [Delta] V _t.

A write pulse corresponding to the write time determined as described above is applied to the memory cell in step C5 of FIG. 5, and then, in step C6,
The write level is determined each time the write is completed, and in step C7, it is determined whether the threshold value of the memory cell has reached the write level (W_B_V voltage). If the result of determination is that the threshold value of the memory cell has not reached the write level (W_B_V voltage), step C
5, the writing is performed again with the selected optimum writing pulse width, and the processing of steps C5 to C7 is repeatedly executed. On the other hand, if it is determined in step C7 that the threshold value of the memory cell has reached the write level, the process ends.

Next, a description will be given of a processing example of the third embodiment for simultaneously writing data to a plurality of bits (a plurality of memory cells). FIG. 8 is a flowchart illustrating a procedure for measuring a threshold value of a memory cell when writing is performed simultaneously on a plurality of bits. Verification means that when a certain voltage is applied to a control gate of a memory cell, data of 0 or 1 is read from the applied memory cell, and the threshold value of the memory cell is set to the applied voltage (verify). Voltage) is higher or lower.

By applying the same verify voltage to a plurality of memory cells and reading out the applied plurality of memory cells simultaneously, it is simultaneously determined whether the threshold value of each cell is higher or lower than the verify voltage. can do. By repeating this verifying a plurality of times while changing the verify voltage, the threshold values of a plurality of bits can be simultaneously known.

In step E1 of FIG. 8, an initial value of a variable (X) for determining a verify voltage is set (X =
0). Next, in step E2, 1 is added to the value of the variable X. Next, proceeding to step E3, the set verify voltage (V _veri = V _x ) is simultaneously applied to a plurality of memory cells.

In step E4, data of a plurality of memory cells to which the verify voltage has been applied is read out.
In step E5, the data read in step E4 is stored.

At this time, 0 is read when the threshold value of the memory cell is higher than the verify voltage, and 1 is read when the threshold value is lower than the verify voltage.

Next, at step E6, if all the read data is 0, the verify operation is terminated, and if at least one of the read data is 1, the process returns to step E2 and the steps after step E2. Is repeatedly executed.

Returning to step E2, the value of the variable for setting the verify voltage is increased by 1 to increase the verify voltage, and in step E3, the verify operation is performed again. The processing of steps E2 to E6 is repeatedly executed until becomes zero.

The increase in the verify voltage is an arbitrary value.
The smaller the increase, the more accurately the threshold value of the memory cell can be measured.

FIG. 9 shows an example of the measurement result of the threshold value of the memory cell at the time of 8-bit simultaneous writing. By repeating the verify operation a plurality of times with a plurality of verify voltages, read data as shown in FIG. 9 can be obtained. In the case of the example shown in FIG. 9, the verify voltage V _veri =
At V9, all 8 bits of read data are 0
, And the threshold measurement flow ends.

In the case of the example shown in FIG. 9, the read data is 1 for _bit 1 up to the verify voltage V _veri = V5.
Read data after verify voltage V _veri = V6 is 0
It has become. This indicates that the threshold value of the memory cell corresponding to bit 1 is between V5 and V6. The threshold value can be measured for other bits in the same manner.

Based on the threshold value obtained by the process based on the threshold value measurement flow at the time of simultaneous writing of a plurality of bits shown in FIG. 8, an optimum write application pulse is set for each bit. As a procedure for setting the optimum write application pulse, when the number of times of writing is to be minimized, the processing shown in the flowchart of FIG.
When the variation of the threshold value after writing is within a certain range, the process shown in the flowchart of FIG. 6 is applied to each bit.

Since the flowcharts for explaining these processes are the same as those in the first and second embodiments, the description will be omitted here.

With the optimum write pulse for each bit set as described above, a write pulse is applied to each bit, and if the number of write operations is to be minimized, the write operation is terminated and the write operation is terminated. When the distribution of the threshold value of the memory cell is within a certain range, the verify operation and the write operation are repeated, and the write operation is completed when all the bits have been written.

As described above, in the processing method of each of the above embodiments, the threshold value of the memory cell is measured before and after the initial writing to the memory cell, and the optimum writing condition is determined from the result. Thus, the width of the threshold distribution of the memory cell after writing can be reduced, and the writing time and the writing stress can be reduced.

[0045]

As described above, according to the writing method of the nonvolatile semiconductor memory device according to the present invention, the threshold value of the memory cell is measured before and after the first write signal is applied to the memory cell. Since the write condition is determined based on the measured threshold value of the memory cell, and a write signal corresponding to the determined write condition is applied to the memory cell, the threshold value of the memory cell after the write is determined. The distribution can be narrowed, the writing time can be shortened, and the stress during writing can be reduced.

[Brief description of the drawings]

FIG. 1 is a flowchart illustrating a processing example of an embodiment to which a writing method of a nonvolatile semiconductor memory device of the present invention is applied.

FIG. 2 is a flowchart illustrating a method for selecting an optimum write pulse in FIG. 1;

FIG. 3 is a graph showing a change in a threshold value of a memory cell due to an initial write pulse of each sample.

FIG. 4 is a graph showing a change in a threshold value of a memory cell at each write pulse voltage of a specific sample.

FIG. 5 is a flowchart illustrating a processing procedure in a writing mode when a threshold value of a memory cell after writing is within a certain range.

FIG. 6 is a flowchart illustrating a processing procedure for selecting an optimum write pulse in FIG. 5;

FIG. 7 is a graph illustrating a method of selecting an optimum write pulse width for keeping a threshold after writing of a memory cell within a certain range.

FIG. 8 is a flowchart for explaining a threshold value measurement procedure at the time of simultaneous writing of plural bits.

FIG. 9 is a diagram for explaining a method of measuring a memory cell threshold during simultaneous writing of 8 bits.

FIG. 10 is a graph showing a retention characteristic of a memory cell in a case where a threshold value of a conventional memory cell after writing varies.

FIG. 11 is a graph showing retention characteristics of a memory cell when the threshold value of the memory cell at the time of writing is set to be constant.

FIG. 12 is a flowchart illustrating a processing procedure in a conventional write mode.

FIG. 13 is a graph showing an example of a correlation between a threshold value of a memory cell and a writing time when initial writing and second and subsequent writing are performed.

──────────────────────────────────────────────────続 き Continuation of the front page (56) References JP-A-7-37395 (JP, A) JP-A-10-177795 (JP, A) JP-A-7-169284 (JP, A) JP-A 64-64 78494 (JP, A) (58) Field surveyed (Int. Cl. ⁷ , DB name) G11C 16/02

Claims (6)

(57) [Claims] 1. A writing method for a nonvolatile semiconductor memory device in which data is written by applying a write signal to change the amount of charge stored in a charge storage layer of a memory cell and controlling a threshold voltage. And measuring a threshold value of the memory cell before and after applying a first write signal to the memory cell, and determining a write condition based on the measured threshold value of the memory cell. A write signal corresponding to the determined write condition is applied to the memory cell. 2. A writing method for a nonvolatile semiconductor memory device for writing data by applying a write signal to change the amount of charge stored in a charge storage layer of a memory cell and controlling a threshold voltage. And measuring a threshold value of the memory cell before and after applying a first write signal to the memory cell, and determining a write condition based on the measured threshold value of the memory cell. Detecting a write time in which a change in a threshold value of the memory cell when a write signal corresponding to the determined write condition is applied to the memory cell is within a predetermined range; Writing to the memory, and repeatedly writing to the memory cell until a threshold value after writing reaches a predetermined reference value. Writing method of the nonvolatile semiconductor memory device according to claim. 3. The method according to claim 1, wherein the write condition is related to a magnitude of a voltage of the write signal. 4. The method according to claim 1, wherein the write condition relates to a write time of the write signal. 5. The method according to claim 5, wherein the write signal is applied to the memory cell.
3. The method according to claim 1, wherein the application is performed simultaneously on a plurality of memory cells. 6. A recording medium on which a program capable of executing the writing method of the nonvolatile semiconductor memory device according to claim 1 is recorded.