JP3106831B2 - Video signal processing device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a video signal processing device such as a contour emphasis circuit and a noise reduction circuit used for improving the image quality in video equipment such as a video camera.

[0002]

2. Description of the Related Art Recently, demands for higher image quality for video cameras and VTRs have been increasing, and various high image quality techniques have been introduced. Among them, the most basic element is improvement in resolution and S / N. First, the former will be described.

[0003] In the television display system, since only discrete display in units of scanning lines can be performed in the vertical direction, edge rounding called an aperture effect occurs. This occurs because the display pixel width of the image is not infinitely small but has a finite width, and is a phenomenon in which high-frequency components included in the signal are attenuated. This phenomenon occurs on the television screen because the pixel width in the vertical direction is the width of the scanning line. Due to the aperture effect, the outline is blurred at the vertical edge, and the resolution of the entire screen is degraded.

In order to correct this phenomenon, vertical detail enhancement processing (also referred to as vertical aperture correction processing or vertical contour enhancement processing) for enhancing high-frequency components (details) in the vertical direction is signal processing for video cameras and VTRs. It has been incorporated into. This processing (hereinafter, referred to as vertical detail processing) will be briefly described with reference to FIGS.

FIG. 3 shows an example of a vertical detail processing circuit. 1 is a 1H delay element for delaying an input signal by 1H (H: horizontal scanning period), 3 is a subtractor, and 6 is an adder. FIG. 4 shows the signal timing in each unit of the circuit of FIG. 3 in units of 1H.

The input video signal from the terminal 11 is input to the 1H delay element 1a, and the output signal of the 1H delay element 1a is input to the 1H delay element 1b. Further, an input video signal from the terminal 11 and a video signal for three scanning lines, which are output signals of the 1H delay elements 1a and 1b, are input to the vertical detail circuit 2b. The timings of the input video signal and the output signals of the 1H delay elements 1a and 1b are shown in (1), (2) and (3) of FIG.
Are shown below.

The input video signal is supplied to the adder 6a for 1H
It is added to the output signal of the delay element 1b. The output of the adder 6a is multiplied by 1/2 in the multiplication means 13. Multiplication means 1
The output signal of No. 3 is shown in FIG. The output signal of the multiplying means 13 is subtracted in the subtractor 3 from the output signal of the 1H delay element 1a. The output signal of the subtractor 3 is shown in (5) of FIG.

The output of the subtracter 3 includes a vertical detail component contained in the input video signal, but also contains a large amount of noise in the video signal. Therefore, it is necessary to remove this noise. Generally, noise has a smaller amplitude than a signal, so that the noise can be determined to some extent based on the amplitude. Therefore, the output signal of the subtractor 3 is input to the coring circuit 4.

As shown in FIG. 5, the coring circuit 4 outputs 0 for an input whose amplitude is smaller than a predetermined threshold, and outputs an amplitude corresponding to the threshold for an input whose amplitude is larger than the predetermined threshold. Is output. By this processing, noise having a relatively small amplitude is removed, and a vertical detail component having a relatively large amplitude is extracted.

[0010] The output of the coring circuit 4 is generally unsuitable for use as a detail signal because of its considerably large level. Therefore, a detail signal is created by attenuating it to an appropriate level in the gain adjustment circuit 5 and input to the adder 6b. The output of the gain adjustment circuit 5 is shown in (6) of FIG. In the figure, d is the output amplitude of the gain adjustment circuit 5.

The adder 6b adds the output signal of the gain adjustment circuit 5 to the output of the 1H delay element 1a. Adder 6b
Is shown in FIG. 4 (7). As is clear from (7) of FIG. 4, a signal in which the vertical edge is emphasized is obtained at the output of the adder 6b.

Next, the improvement in S / N will be described. There are various methods as current noise reduction means,
It can be broadly divided into one-dimensional and two-dimensional processing in which only spatial processing is performed, and three-dimensional processing in which temporal processing is performed. The one-dimensional and two-dimensional processing methods are not comparable to the three-dimensional processing in terms of S / N improvement and detail deterioration, but are widely used because of the small circuit scale and the lack of residual image deterioration peculiar to the three-dimensional cyclic processing. It is used. Among them,
Recently, median filters have attracted attention.

The median filter is a non-linear filter that outputs a central value among data in a block composed of an odd number of data centered on a processing point, and is effective for impulsive noise. Further, as a feature, there is in principle no deterioration at the edge portion, that is, no edge rounding.
Here, the principle will be described.

FIG. 6 is a diagram for explaining an example of how to take an input block of a median filter. Black circles represent pixel data, and h and v indicate the horizontal and vertical directions of the monitor screen. The input block of the simplest one-dimensional median filter is as shown in FIG. Among the three data in the input block indicated by rectangles in the figure, the central value, that is, the second largest data is output.

This is applied to an actual waveform and considered. FIG. 7 is a diagram for explaining the processing of the median filter, where (A) to (D) are data strings arranged in the horizontal direction,
(E) shows a data string arranged in the horizontal and vertical directions. (1) to (9) are coordinates representing the position of the data string. FIG. 7A shows a case in which impulsive noise is assumed, and only the data at the position (5) has a large value and all other data have the same value. When median filter processing is performed on such a data string, the output is the same as the input except when processing the data at the position (5). However, when processing the data at the position (5), the value of (4) or (6) is output, and the output is a data string having the same value as shown in FIG. .

As described above, the median filter can remove impulsive noise. Also, as is apparent from the algorithm, when the data strings all have the same value, or when the data string monotonically increases or decreases, the output value becomes the same as the input. The feature that there is no deterioration in the edge described above is also apparent when considering that the edge in the image is a monotonically increasing or monotonically decreasing data string.

The above is a description of the simplest one-dimensional median filter processing. However, in order to obtain sufficient performance as noise reduction processing, it is necessary to expand the two-dimensional median filter processing. The reason will be described below.

First, an example in which details are lost by performing one-dimensional median filter processing will be described. FIG. 7C shows details in the horizontal direction.
Consider a case where median filtering is performed on this data sequence. When the data at the positions (1) to (3) is input, the value of the data at the position (2) is output.
When the data at the positions (2) to (4) is input, the value of the data at the position (2) or (4) is output. Considering the same way, the output result is as shown in FIG. 3D, and the detail disappears.

As a means for preventing this phenomenon, there is a method of expanding the input block in the vertical direction to make it two-dimensional, for example, as shown in FIG. By taking such blocks, the detail deterioration in the horizontal or vertical direction is improved. The process in this case will be described with reference to FIG.

FIG. 7E shows the same pattern in the horizontal direction as in FIG. 7C and is uniform in the vertical direction. The v-axis passes through the position of (5) for convenience, and only data on the v-axis is shown in the vertical direction to make the figure easier to see. In this case, when the median filter processing is performed at the positions (4) to (6) and the data on both sides of (5) on the v-axis, the output value is the third largest from the median filter algorithm. Data will be output. At this time, assuming that the three data on the v-axis are values similar to each other and are sufficiently separated from the values of (4) and (6), one of the three data on the v-axis is Is output, and the data at the positions (4) and (6) are not output. Therefore, in this case, the processing is equivalent to the one-dimensional median filter processing in the vertical direction, the noise reduction processing is performed, and no detail deterioration occurs.

The same applies to places other than the position (5), and the same applies to vertical details that are uniform in the horizontal direction. Accordingly, by making the input block two-dimensional, the detail deterioration in the horizontal or vertical direction is improved. Therefore, it is understood that the median filter is desirably two-dimensional. However, it is difficult to completely eliminate detail deterioration, and in actual use, adaptive processing with detail detection is performed.

FIG. 8 shows a configuration example of a median filter. An input video signal from the terminal 11 is input to the 1H delay element 1a. The output of 1H delay element 1a is 1H delay element 1
b. Further, the input video signal and the video signals for three scanning lines, which are the outputs of the 1H delay elements 1a and 1b, are input to the median filter 7. The S / P converter 8 performs serial / parallel conversion on the output of the 1H delay element 1a and synchronizes continuous data in the horizontal direction. The detail detection circuit 10 outputs the outputs of the 1H delay elements 1a and 1b and the S / P
The detail section is detected from the output of the converter 8 and a detection signal is output to the median value selection circuit 9. The median selection circuit 9
1H delay element 1 when no detail is detected
The median is selected and output from the outputs of a and 1b and the output of the S / P converter 8, and when the detail is detected, the output of the S / P converter 8 is located at the center position of the block. Output data.

[0023]

However, in order to realize a vertical detail circuit, a 1H delay element is indispensable as shown in FIG. Also, a median filter requires a 1H delay element in order to sufficiently exhibit its performance. Therefore, if it is desired to realize both at the same time, 1H delay elements must be prepared by the sum of the required number of each. However, the 1H delay element occupies a larger area than other components, and its frequent use is disadvantageous in downsizing the device. In particular, when incorporated in a digital LSI, the chip area is significantly increased.

[0024]

To solve this problem, a video signal processing apparatus according to the present invention comprises a first delay element for delaying an input video signal by one horizontal scanning period, and an output of the first delay element. A second delay element for delaying the signal by one horizontal scanning period, and a frequency extraction for extracting a high frequency component in a vertical direction included in the video signal using the input video signal and the output signals of the first and second delay elements Means for inputting the input video signal and the output signals of the first and second delay elements ;
And a noise reduction means for performing two-dimensional filtering, and an addition means for adding the output signal of the frequency extraction means and the output signal of the noise reduction means.

The video signal processing apparatus according to the present invention further comprises a first delay element for delaying the input video signal by one horizontal scanning period;
A second delay element for delaying an output signal of the first delay element by one horizontal scanning period, and a vertical direction included in a video signal using the input video signal and output signals of the first and second delay elements. Frequency emphasis means for emphasizing high frequency components of
Output signal before the input video signal and the second delay element
The output signal of the serial frequency emphasis means as an input, the 2-dimensional Fi
And noise reduction means for performing a filtering process .

[0026]

According to the present invention, the 1H delay element necessary for the vertical detail circuit and the median filter is shared by the above-described configuration, and the size of the apparatus is reduced.

[0027]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, a video signal processing apparatus according to an embodiment of the present invention will be described with reference to the drawings. FIG. 1 is a block diagram showing a video signal processing apparatus according to a first embodiment of the present invention. 1 is a 1H delay element, 2a is a vertical detail circuit, 7 is a median filter, and 6b is an adder. The vertical detail circuit 2a includes a subtractor 3, a coring circuit 4, a gain adjustment circuit 5, an adder 6, and a multiplication unit 13. Since the components inside the median filter 7 are the same as those in the conventional example, the description is omitted.

The input video signal input from the terminal 11 is
It is input to the 1H delay element 1a. The output signal of the 1H delay element 1a is input to the 1H delay element 1b. Further, the input video signal and the video signals for three scanning lines, which are the outputs of the 1H delay elements 1a and 1b, are input to the vertical detail circuit 2a and the median filter 7.

In the vertical detail circuit 2a, a vertical detail component is extracted by a subtracter 3, a coring circuit 4, a gain adjustment circuit 5, an adder 6, and a multiplying means 13 in exactly the same manner as in the conventional example. 5, only the vertical detail signal is obtained, and the adder 6b
Is input to

On the other hand, the median filter 7 performs filter processing in exactly the same manner as in the conventional example, and the output is input to the adder 6b. The adder 6b adds the vertical detail signal output from the vertical detail circuit 2a to the noise-reduced signal output from the median filter 7 to obtain an output subjected to vertical edge enhancement processing and noise reduction processing. .

However, in this configuration, the noise contained in the output of the vertical detail circuit 2a is added to the output of the median filter 7, and noise is added to the noise-reduced signal again. Become. For this reason, the S / N of the output signal of the adder 6b is lower than that of the output signal of the median filter 7. In order to improve this phenomenon, the following configuration is conceivable.

FIG. 2 is a block diagram showing an embodiment of a video signal processing apparatus according to the second embodiment of the present invention. 1
Is a 1H delay element, 2b is a vertical detail circuit, and 7 is a median filter. The components inside the vertical detail circuit 2b and the median filter 7 are the same as those in the conventional example, and thus the description is omitted.

The input video signal input from the terminal 11 is
It is input to the 1H delay element 1a. The output signal of the 1H delay element 1a is input to the 1H delay element 1b. Further, the input video signal and the video signals for three scanning lines, which are the outputs of the 1H delay elements 1a and 1b, are input to the vertical detail circuit 2b.

In the vertical detail circuit 2b, a subtracter 3, a coring circuit 4, a gain adjustment circuit 5, and an adder 6
a, 6b and the multiplying means 13 extract a vertical detail component in exactly the same manner as in the prior art, and adder 6b
A video signal to which a vertical detail signal is added is obtained at the output of. The video signals for three scanning lines, which are the outputs of the vertical detail circuit 2b and the outputs of the 1H delay elements 1a and 1b, are input to the median filter 7.

The median filter 7 performs filter processing in exactly the same manner as in the conventional example, and obtains an output obtained by performing noise reduction processing on a signal whose vertical edge has been emphasized, which is the output of the vertical detail circuit 2b. . With this configuration, a signal whose S / N is somewhat deteriorated is input to the median filter 7 by passing through the vertical detail circuit 2b, so that more effective noise reduction can be achieved.

However, in this case, care must be taken so that the detail signal added by the vertical detail circuit 2b is not removed by the median filter 7. To this end, the threshold value for detection in the detail detection circuit 10 in the median filter 7 should be smaller than the level of the detail signal added by the vertical detail circuit 2b (indicated by d in FIG. 4). Will be needed.

[0037]

The present invention as described above, according to the present invention includes a frequency extraction means outputs the input video signal and the first and second delay elements Roh
By supplying the outputs to the noise reduction means and adding the respective outputs, it is possible to realize the sharing of the vertical delay element, which is an essential component in the vertical detail circuit and the two-dimensional filter, and The effect is great.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating a configuration of a video signal processing device according to a first embodiment of the present invention.

FIG. 2 is a block diagram showing a configuration of a video signal processing device according to a second embodiment of the present invention;

FIG. 3 is a block diagram showing a configuration example of a conventional vertical detail circuit.

FIG. 4 is a waveform chart for explaining the operation of the vertical detail circuit of the conventional example.

FIG. 5 is a characteristic diagram for explaining the operation of the coring circuit of the conventional example.

FIG. 6 is a schematic diagram for explaining the principle of a median filter.

FIG. 7 is a waveform chart for explaining the operation of the median filter.

FIG. 8 is a block diagram showing a configuration example of a conventional median filter.

[Explanation of symbols]

 Reference Signs List 1 1H delay element 2a Vertical detail circuit (frequency extracting means) 2b Vertical detail circuit (frequency emphasizing means) 6 Adder (adding means) 7 Median filter (filter means)

Claims (3)

(57) [Claims] A first delay element for delaying an input video signal by one horizontal scanning period; a second delay element for delaying an output signal of the first delay element for one horizontal scanning period; Frequency extraction means for extracting a vertical high-frequency component contained in a video signal by using output signals of the first and second delay elements; and an input video signal and output signals of the first and second delay elements. And a noise reduction means for performing a two-dimensional filtering process, and an addition means for adding an output signal of the frequency extraction means and an output signal of the noise reduction means, wherein the output signal of the addition means is an output video signal. Video signal processing device. 2. A first delay element for delaying an input video signal by one horizontal scanning period, a second delay element for delaying an output signal of the first delay element by one horizontal scanning period, Frequency emphasizing means for emphasizing a vertical high-frequency component included in a video signal using output signals of the first and second delay elements; an input video signal; and an output signal of the second delay element; The output signal of the frequency emphasizing means is input and two-dimensional
A video signal processing device comprising: a noise reduction unit that performs a filtering process of (1), wherein an output signal of the noise reduction unit is an output video signal. 3. The video signal processing apparatus according to claim 1, wherein said noise reduction means is a two-dimensional median filter.