JP3105267B2 - Image editing device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image editing apparatus applied to a digital copying machine, and more particularly to an image editing apparatus which outputs a mirror image of an original image in parallel or in a column with the original image.

[0002]

2. Description of the Related Art For example, in a digital copying machine, an apparatus which reads an original image and outputs the image after inverting left and right and an apparatus which can output the same original image in parallel have already been put to practical use. As a method for outputting the above-mentioned original images in parallel, one-scan data as disclosed in "Multi-copy system in digital copying machine" in JP-A-63-278463 is stored in a memory. Read out the stored document image twice,
There is a way to output.

When it is desired to provide mirror image information and normal image information for specific image information in parallel on the same recording paper, the original image of the normal image is inverted left and right (mirroring) to obtain the normal image and the mirror image. Will be output respectively. If both information can be output on the same recording paper in this way, the width of image editing can be further expanded, and if the processing of front and back and the entry items are different in drawings etc. with thickness, fill in the figures on the front side. When this is copied as a manuscript, it is convenient if the figure on the back side is output in parallel with the figure on the front side.

[0004]

However, in the above-mentioned conventional technology, data of one scan is stored in a memory, and a document image stored in the memory is repeatedly read and output twice. However, only the editing operation of outputting the same original image in parallel on the recording paper can be performed, and information of a mirror image and information of a normal image cannot be provided in parallel or in a column on the same recording paper for specific image information. .

SUMMARY OF THE INVENTION The present invention has been made in view of the above, and has an advantage in that a mirror image of an original image can be output on the same recording paper in parallel or in parallel with the original image, thereby expanding the width of image editing processing. With the goal.

[0006]

According to the present invention, there is provided a reading means for digitally reading a document image, and a writing and reading process of image information read by the reading means. Storage means comprising a plurality of blocks, combined output means for combining and outputting image information read from the plurality of storage means, and image recording means for image-recording the output from the combined output means In the editing device, image information read by one scan is simultaneously written and stored in a plurality of blocks of the storage unit, and the first information of the storage unit is stored in accordance with the width of a document image or the width of an image to be recorded and output. The image information is shifted in the main scanning direction from the block, the image information is shifted in the main scanning direction from the second block of the storage means, and the left and right sides are inverted and simultaneously read out. There is provided an image editing apparatus for image recording by combining the paper the same recording by forming the output means.

According to the present invention, there is further provided the image editing apparatus according to the first aspect, further comprising an input means for designating that the mirror images are arranged in a column, and the mirror images are arranged in a column through the input means. Is specified, the image information read by one scan is simultaneously written and stored in a plurality of blocks of the storage means, and after the image information is read from the first block of the storage means, It is an object of the present invention to provide an image editing apparatus for reading out image information by inverting the image information from a second block of the means and synthesizing the image information on the same recording paper by the synthesizing output means.

[0008]

According to the present invention, image information read by one scanning is simultaneously written and stored in a plurality of blocks of a storage means, and an image is read from a first block of the storage means in accordance with a width of a document image or a width of an image to be recorded and output. Shifts information in the main scanning direction,
The image information is shifted from the second block of the storage means in the main scanning direction, and is read out at the same time by inverting left and right, and is synthesized and recorded on the same recording paper.

When it is designated via the input means that mirror images are arranged in tandem, image information read by one scan is simultaneously written and stored in a plurality of blocks of the storage means. After reading out the image information from one block, the image information is read out from the second block of the storage means by inverting the image information upside down, and synthesized and recorded on the same recording paper.

[0010]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of an image editing apparatus according to the present invention will be described below in detail with reference to the accompanying drawings. FIG. 1 is a block circuit diagram showing the overall configuration of the present embodiment, which includes a reading unit 101 for reading image information of a document, and storage units 102 and 103 for storing image information read by the reading unit.
An image recording unit 104 for reading out image information from the storage units 102 and 103 and outputting the image information on recording paper; an input unit 106 for inputting various conditions for image recording; and an input unit 106 based on the input information from the input unit 106. And a system control unit 105 that outputs necessary information to the reading unit 101, the storage units 102 and 103, and the image recording unit 104, and monitors and controls the state of each unit.

FIG. 2 is an explanatory diagram showing a schematic configuration of the reading means 101, and FIG. 3 is a control block diagram thereof.
Reference numeral 14 denotes a motor M for driving a pair of rollers 208a and 208b for sending the original 207 to the exposure slit 211 and a pair of rollers 209a and 209b for discharging the original 207, a light source 210 for exposing the original 207, and the original 207.
Insert a read control circuit monitors and controls the sensor S ₁ and the like for detecting passage, 315 denotes a photoelectric conversion element (CCD) 3
13 is a CCD driving circuit that generates a clock CK0 for driving the CCD 13 and an initialization pulse SH for the CCD 313.
Is the image information VD. This is an image information processing circuit that inputs “in” and performs binarization processing, halftone processing, scaling processing, etc. based on information 317 from the system control means 105. Reference numeral 212 denotes an optical lens.

FIG. 4 is an internal block diagram of the storage means 102 and 103. The reference numerals 102 and 103 have the same structure, and the numbers in parentheses indicate respective parts in the storage means 103. 418 (4
23) is a main scanning address management circuit 419 (424) that counts a clock CLK in units of one pixel of image information and manages addresses in the main scanning direction, and a synchronization signal L.D. of the reading unit 101 or the image recording unit 104. 421 (426) is a bit map type storage circuit whose address is managed by a sub-scanning address management circuit 420 (425) that counts Sync and manages addresses in the sub-scanning direction.
Is the signal W. of the reading means 101 and the image recording means 104.
F. Gate (write signal to storage means) and D.Gate. Req
(Read signal from storage means) and system control means 10
5 is a memory control circuit that controls writing and reading of image information to and from the storage circuit 418 (423) based on the information from 5 and simultaneously switches the synchronization signal. 422 (4
27) is a switching circuit for the synchronization signal.

The main scanning address management circuit 419 (42)
4) and the sub-scanning address management circuit 420 (425)
It is possible to preset an initial value, and it is composed of a ring counter that counts up or down by inputting a pulse and returns to 0 again after reaching a predetermined value.

FIG. 5 shows the image recording means 104 shown in FIG.
And a roll recording paper 530 and a pair of rollers 531a, 531b, 533a for transporting the same.
533b, 535a and 535b, a cutter 532 for cutting the roll recording paper 530, sensors 534 and 536 for detecting the passage of the roll recording paper 530, a photoconductor 537, a pair of fixing rollers 538a and 538b, and a photoconductor 537 shown in FIG.
Laser (LD) 642 which is an image forming system, a rotary scanning body (polygon mirror) 539 for scanning laser light from the semiconductor laser 642, an fθ lens 540, a mirror 541, and a position detector 644 for scanning light, the position And a mirror 643 for guiding light to the detector 644.

FIG. 7 is a control block diagram of the control system.
45 controls a charger, a static eliminator, a heater for fixing, and the like (not shown) for conveying and cutting the roll recording paper 530 and visualizing the image, and exchanges information with the system control unit 105. The image recording control circuit to perform
Reference numeral 46 denotes a rotation signal of the rotation scanning body 539 and a synchronization signal R.S. L. Sy
nc to the storage means 102 and 103, and outputs the image signal R.nc.
VD0 and the gate signal R.V. F. Gate 0, R. L. G
ate0 is input, the semiconductor laser 642 is modulated based on the input, and the rotating control unit 539 scans the photosensitive member 537 to form an electrostatic latent image.

Next, it is assumed that the configuration of the bit map of the storage circuit 418 of the storage units 102 and 103 satisfies the maximum recording width in the image storage unit 104 in the main scanning direction, and the maximum recording width in the sub-scanning direction. Satisfies the length of the standard size paper in the width direction with respect to the recording width. For example, the maximum recording width in the image recording unit 104 is 594 m
m, it is assumed that the recording circuit 418 can store the image information at the time of the horizontal feed of the fixed size A2.
02 and 103, A
Assuming that image information at the time of one vertical feed can be stored, a normal copying operation, for example, a case where an A2 horizontal feed document is image-stored at substantially the same position on a recording sheet having substantially the same length will be described.

First, when the original 207 is inserted into the reading means 101, the original 207 is moved to a pair of feed rollers 208a and 208b.
Fed in the direction of the exposure slit 211 reaches the sensor S ₁ by. The read control circuit 314 from the signal of the sensor S _1, after the document 207 has timed the arrival time from the sensor S ₁ until the exposure slit 211, and outputs a read start signal Write to the image processing circuit 316. As a result, the image information processing circuit 316 synchronizes with the initialization pulse SH of the CCD 313 output from the CCD driving circuit 315,
D313 in the main scanning direction are sequentially input, and the synchronization signal W.D. L. Sync, a gate signal W.D. for image information in the main scanning direction. L. Gate, read start signal W. F. Gate
And image information W. processed based on the input signal of the input means 106. VD is sequentially output. Here, it is assumed that the original exposure light source 210 is already lit,
It is assumed that the light reflected by the document 207 of the light source 210 forms an image via the optical lens 212 at D313. Since the original 207 continuously passes over the exposure slit 211 by the feed roller pairs 208a, 208b and 209a, 209b, the image information processing circuit 316
In the fifteenth timing cycle, image information of the document 207 in the main scanning direction is sequentially input, processed, and output. Further, the reading control circuit 314 inputs the signal of the sanse S ₁ and then
The CCD drive circuit 315 starts counting an initialization signal (synchronization signal).

First, the operation when the input from the input means 106 is a parallel mirror image will be described. Input means 1
06 is a parallel mirror image, the storage means 102 and 103 both read the read start signal W.
F. Gate is input, first, the main scanning address management circuit 419 (424) and the sub-scanning address management circuit 420 (425) are initialized at the edge, that is, set to "0", and the W / R signal is output. And the synchronization signal switching circuit 4
22 (427) is the synchronization signal W.
L. Sync input is switched, and the storage circuit 418 (42
3) is a state of writing image information. Next, the gate signal W. L. When the Gate rises, the main scanning address management circuit 419 (424) starts counting up the address value. As a result, the storage circuit 418 (423) changes the gate signal W.D. from the main scanning address "0" of the sub-scanning address "0". L. By the time Gate starts up,
The main scanning address management circuit 419 (424) counts up the image information W. Write VD. Subsequently, the synchronization signal W. L. When Sync is input, the sub-scanning address management circuit 420 (425) counts up the address value, and at the same time, initializes the main scanning address management circuit 419 (424), that is, sets it to "0". Similarly, the gate signal W. L. When the Gate rises, the main scanning address management circuit 419 (424)
Of the image information W. VD is written from the main scanning address “address 0” of the sub-scanning address “address 1” to “address r”.

The above operation is sequentially repeated. L. Sy
nc, and if the A3 vertical size, that is, FIG. 8A represents the original, the sub-scanning address management circuit 420
When the address value of (425) (W. sub-scanning address 1 in FIG. 8A) becomes n, the main scanning address management circuit 419 (424) is initialized as described above, that is, "0".
And the storage means 102 and 103 store the synchronization signal W. L. Following the Sync, the gate signal W. L. Gat
When e rises, the storage circuit 418 (42
3) From the main scanning address “address 0” of the last address “n” of the sub-scanning address to “r”, the image information W. VD is written to end the write operation.

During this time, when the sub-scanning address value of the storage means 103 reaches a predetermined value m, the image storage means 104 is in a position where the leading end of the roll recording paper 530 contacts the photosensitive body 537, that is, The roll recording paper 530 is set in advance at such a time as to reach the sensor S ₁ located at the same distance from the transfer position as the distance between the transfer position of the toner image on 537 and the exposure position for forming the electrostatic latent image. The motor M is rotated to start the feeding of the roller pair 531.
a, 531b, 533a, 533b, 535a, 535
b, and at the same time, the photoconductor 537 and the pair of fixing rollers 538a and 538b are rotated. This allows
Roll recording paper 53 having a leading end near cutter 532
When 0 is conveyed in the direction of the photoreceptor 537 and reaches the sensor 534, the image recording control circuit 745 determines the length of the conveyed roll recording paper 530 by using the video control circuit 7
The sync signal R.4 consisting of the detection signal of the position detector 644 of the scanning light from the scanning light R.46. L. Sync counting is started. Subsequently, the roll recording paper 530 is conveyed, and the leading end is
36, the image recording control circuit 745 stores
02 and 103 requesting reading of image information.
Output Req. The memory control circuit 421 (426) of the storage means 102, 103 outputs the read request signal D. Re
q according to the synchronization signal R. L. At timing with Sync, the sub-scanning address management circuit 420 (425) is initialized to 0.

At the same time, the memory control circuit 421 of the recording means 102 responds to the image width signal from the system control means 105, for example, if the image width is W, the address value P corresponding to the width of W / 2 (see FIG. 8 (a)), and the memory control circuit 426 of the storage unit 103 also needs an address value corresponding to the width of W / 2 in accordance with the image width signal from the system control unit 105, and necessary for right and left inversion. An address value, that is, a read start address value r only when left-right inversion is performed
Is initialized to P-1 in consideration of the address value corresponding to the width of W / 2 for the right shift. At the same time, the output of the synchronization signal switching circuit 422 (427) is output from the synchronization signal R. L. The switching signal W / R is output so as to be Sync, and the storage circuit 418 (423) is set to the reading state.

Next, the memory control circuit 421 (426)
Is the synchronization signal R. L. Sync with the image information R.Sync.
Gate signals R.V. L. Gat
With the output of e, the main scanning address management circuit 419 of the memory control circuit 421 starts counting up, and the main scanning address management circuit 424 of the memory control circuit 426 starts counting down. As a result, the storage circuit 418 stores P + 1,..., Q−1,.
-1 and the storage circuit 423 stores the main scanning address P-
1 to P-2, ..., 1, 0, r, r-1 ... q, q-
1,..., P + 1, and p in the order of VD1 and R.V. VD2 is read. Subsequently, the synchronization signal R. L.
When Sync is input, the sub-scanning address management circuit 420
(425) is counted up, and
Memory control circuit 421 of the main scanning address management circuit 41
9 is initialized to P, and the memory control circuit 426 of the storage means 103 initializes the main scanning address management circuit 424 to P-1. L. Gate is output. As a result, the main scanning address management circuit 419 starts counting up, and the main scanning address management circuit 424 starts counting down. Read VD1 and VD2. The image information R.R.
VD1 is the gate 18 of the composite output means 180 shown in FIG.
1, 182 and 185, and the image information R.D. VD2 is also the composite output means 1.
80 gates 181, 182 and 186.

Here, during a normal copying operation, that is, when the image information of only one of the storage means 102 and 103 is output as an image by the recording means 104, the selection symbols XO and AN described later are "0". Therefore, NAND gates 184 and 187 become invalid, and NAND gate 18
5 and 186 are valid. Furthermore, the R.D.R. output only from the recording means for outputting the image information. F. Either the NAND gate 185 or 186 becomes valid by Gate 1 or 2, and the signal is latched by the VCLK by the latch circuit 189 through the NAND gate 188 and the recording means 10
4 is input.

Now, since the input from the input means 106 is a parallel mirror image instruction, the system control means 1
05, the image information R.R. from the storage unit 102 based on the whiteout instruction information sent to the storage units 102 and 103. VD
1 and R.I. Select signal O for outputting exclusive OR of VD2
Since R is output, the NAND gates 185 and 186 are invalidated by the output of the NOR gate 183, and the output of the other selection signal AN is also "0", so that the NAND gate 187 is also invalidated and R . VD1 and R.V. Only the NAND gate 184 that receives the output of the OR gate 181 that inputs VD2 becomes valid,
The recording means 10 passes through the gate 188 and the latch circuit 189.
To R.4 Input as VD. FIGS. 8B and 8C show the image information R.R. read out from the storage units 102 and 103 by the above operation, respectively. VD1 and R.I. FIG. 8 (d) shows the image information R.V. FIG. 4 is an explanatory diagram showing the image information R.V. VD1 (FIG. 8)
(B)) is shifted to the left by W / 2 with respect to the original image shown in FIG. 8 (a), and the image information R.R. VD2 (FIG. 8 (c)) is shifted to the right by W / 2 with respect to the original image FIG. 8 (a).
The output R.R. VD is at the center, R.V. VD1 and R.V. VD2 has been synthesized.

The video control circuit 74 of the image recording means 104
6 (FIG. 7) is an image information read start signal R.6 from the storage means 102 and 103. F. OR to input Gate1 and Gate2
The R.G. F. Gate is input, and image information R.Gate is input. VD and the gate signal R.V. L. Gate
, And the input R.R. L. Gate is input, and at the same time, the image information R.G. VD is input to a toggle buffer memory (not shown). Then, the next R. L. Gate and image information R.G. In a cycle in which VD is input to another toggle buffer memory, image information is read from the previously input toggle buffer memory, and the semiconductor laser (L) is synchronized with a position detection signal of scanning light based on this image information.
D) Modulate 642 to form an electrostatic latent image on photoconductor 537. Note that the created latent image is visualized on the roll recording paper 530 by a well-known imaging process, and the fixing roller pair 5
The sheets are fixed by 38a and 538b and discharged.

Next, when the trailing edge of the document 207 passes through the sensor S _1, the read control circuit 314, CCD driving circuit 31
5, the counting of the initialization signal (synchronization signal) of the CCD 313 is completed, and the original length is calculated as it is or from the original feeding speed and the reading density of the image information, and the result is sent to the system control means 105. outputs, also, after counting the passing time of the original 207 from the sensor S ₁ until the exposure slit 211 stops outputting of the read start signal Write. As a result, the image information processing circuit 316 stops inputting the image information of the CCD 313, and the reading start signal W. F. Gate and image information W.Gate. Stop output of VD. The memory control circuit 421 (426) of the recording means 102 and 103 outputs the read start signal W. F. Gat
e is stopped, the storage circuit 418 (42
The write operation of 3) is completed.

At this time, the storage means 102 stores the synchronization signal R.D. L. Each time Sync is input, the gate signal R. L. Gate and image information R.G. VD1 is output and the sub-scanning address management circuit 420 is output.
The address value of (425) is counted up. When the sub-scanning address value reaches the final value n, a signal NEXT notifying that the reading has been completed is output to the storage means 103, and the main scanning address "address 0" of the sub-scanning address "n" is changed to "r". The gate signal R. of the image information of the address ". L. Gate together with the next synchronization signal R.Gate.
L. When the sync signal is input, the read start signal R. F. G
ate output is stopped. Note that the storage unit 103 also stores the image information R.D. When the VD2 reading process is continued and the sub-scanning address value becomes the final value n, the main scanning address "z" of the sub-scanning address "n" is output to "r", and the same operation is performed. After the read start signal R. F. Gate output is stopped. by the way,
The image storage unit 104 further continues to transport the roll recording paper 530, and at the same time, the image recording control circuit 745 outputs the synchronization signal R.
L. Sync counting is continued, and the counted value or the counted value, the roll recording paper feed speed, and the synchronization signal R.R. L. The cutter 532 and the sensor 53 are obtained from the length calculated from the synchronization of the sync.
When the value obtained by subtracting the distance from the original document No. 4 becomes equal to the length information of the document 207 received from the system control means 105, the cutter 532 is operated and the roll recording paper 530 is produced.
Is cut, and at the same time, the conveying roller pairs 531a and 531b are stopped, and the feeding of the roll recording paper 530 is stopped.
The cut recording paper is further conveyed by a pair of rollers 533a, 533b and 535a, 535b, and when the trailing end passes the sensor 536, the image information request signal D.D. Req
Stop output of Thereby, the storage unit 103 stores the synchronization signal R. L. Sync and the read start signal R.S. F. The output of the Gate is stopped, that is, the image information reading operation is terminated. The video control circuit 746 also supplies the read start signal R. F. The reception of image information is stopped by stopping the Gate, and the next synchronization signal R.G. L. The Sync modulates the semiconductor laser (LD) 642 based on the image information in the toggle buffer memory received last time to form a latent image, visualizes the image, and ends the image recording operation. FIG. 10, FIG.
1 is a timing chart of the above operation.

In the embodiment, the normal image is synthesized in parallel with the left side of the output image and the mirror image is synthesized in parallel with the right side. However, the left and right sides can be reversed or the shift amount corresponding to the width of W / 2 is put in either side. This is easily possible. In the above embodiment,
Although the original image is written in the storage units 102 and 103 at the same magnification and the shift amount is determined with respect to the width of the image, the shift amount may be determined according to the width of the image after the magnification even when the magnification is changed.

In a digital copying machine, a device provided with a storage means composed of a plurality of blocks for storing image information and synthesizing and outputting it with other information has been put to practical use in the sense of taking advantage of digital. I have. In such an apparatus, as in the present embodiment, image information read by one reading operation is simultaneously written in the storage means of a plurality of blocks, shifted at the time of reading, and left-right inverted to be composited and output. The normal image and the mirror image of the image can be output in parallel, so that no special hardware configuration is required to obtain the same output, and the processing time for editing is almost the same as that of normal copying. Is obtained.

Next, the operation when the input from the input means 106 is a tandem mirror image will be described. When the input from the input means 106 is a column mirror image, both of the storage means 102 and 103 read the read start signal W. F. Ga
First, the main scanning address management circuit 419 (424) and the sub-scanning address management circuit 4
20 (425) is initialized, that is, set to "0", and a W / R signal is output to switch the synchronization signal switching circuit 422 (4).
27) is the synchronization signal W. L. Syn
The input is switched to c input, and the storage circuit 418 (423) is set to a state in which image information is written. Next, the gate signal W. L. Gat
e rises, the main scanning address management circuit 419 (4
24) The count-up of the address value is started. As a result, the storage circuit 418 (423) stores the sub-scanning address “0”.
From the main scanning address “0” at the address “0” to the address “r” counted up by the main scanning address management circuit 419 (424) until the gate signal WL.Gate rises, the image information W.VD is transferred. Subsequently, when the synchronization signal WL Sync is input, the sub-scanning address management circuit 420 (425) counts up the address value, and at the same time, the main scanning address management circuit 419.
(424) is initialized, that is, set to "0". Similarly, the gate signal W. L. When Gate stands up,
The count-up of the address value of the main scanning address management circuit 419 (424) is started, and the image information W. VD is written from the main scanning address “address 0” of the sub-scanning address “address 1” to “address r”.

The above operation is sequentially repeated. L. Sy
nc, and if the A3 vertical size, that is, FIG. 8A represents the original, the sub-scanning address management circuit 420
When the address value of (425) (W. sub-scanning address 1 in FIG. 8A) becomes n, the main scanning address management circuit 419 (424) is initialized as described above, that is, "0".
And the storage means 102 and 103 store the synchronization signal W. L. Following the Sync, the gate signal W. L. Gat
When e rises, the storage circuit 418 (42
3) From the main scanning address “address 0” of the last address “n” of the sub-scanning address to “r”, the image information W. VD is written to end the write operation. Further, the memory control circuit 421 (426) stores the final sub-scanning address n.

During this time, the image storage means 104 is in a position where the leading end of the roll recording paper 530 is in contact with the photosensitive member 537 when the sub-scanning address value of the storage means 103 reaches the predetermined value m, that is, the photosensitive member The roll recording paper 530 is set in advance at such a time as to reach the sensor S ₁ located at the same distance from the transfer position as the distance between the transfer position of the toner image on 537 and the exposure position for forming the electrostatic latent image. The motor M is rotated to start the feeding of the roller pair 531.
a, 531b, 533a, 533b, 535a, 535
b, and at the same time, the photoconductor 537 and the pair of fixing rollers 538a and 538b are rotated. This allows
Roll recording paper 53 having a leading end near cutter 532
When 0 is conveyed in the direction of the photoreceptor 537 and reaches the sensor 534, the image recording control circuit 745 determines the length of the conveyed roll recording paper 530 by using the video control circuit 7
The sync signal R.4 consisting of the detection signal of the position detector 644 of the scanning light from the scanning light R.46. L. Sync counting is started. Subsequently, the roll recording paper 530 is conveyed, and the leading end is
36, the image recording control circuit 745 stores
02 and 103 requesting reading of image information.
Output Req. The memory control circuit 421 (426) of the storage means 102, 103 outputs the read request signal D. Re
q according to the synchronization signal R. L. The main scanning address management circuit 419 (424) is initialized to 0 at the timing of Sync.

At the same time, the memory control circuit 421 of the recording means 102 initializes the sub-scanning address management circuit 420 to 0. Further, the memory control circuit 426 of the storage means 103 initializes the sub-scanning address management circuit 425 to an address value necessary for upside down, that is, the last address n of the sub-scanning address stored at the time of writing. At the same time, the main power of the synchronization signal switching circuit 422 (427) is
From the synchronization signal R. L. The switching signal W / R is output so as to be Sync, and the storage circuit 418 (423) is set to the reading state. Next, the memory control circuit 421 outputs the synchronization signal R.
L. Sync with the image information R.Sync. Gate signal R.V. L. Along with the Gate output, the main scanning address management circuit 419 of the memory control circuit 421 starts counting up. Thereby, the storage circuit 418
.., R−1, r in the order of the main scanning addresses 0, 1,. VD1 is read. Subsequently, the synchronization signal R. L. When Sync is input, the sub-scanning address management circuit 420 is counted up, and at the same time, the memory control circuit 421 of the storage means 102 operates the main scanning address management circuit 419.
Is initialized to 0, and the gate signal R. L. Gate is output. Thereby, the main scanning address management circuit 419
Starts counting up, and the image information R. Read VD1.

The image information R.R. VD1 is supplied to the gates 181, 182 and 185 of the combination output means 180 shown in FIG. VD2 is also input to the gates 181, 182 and 186 of the combining output means 180. Since the selection signals XO and AN are "0" in order to output the image information of only one of the storage units 102 and 103 by the image recording unit 104, NAN
D gates 184 and 187 are disabled, and NAND gates 185 and 186 are enabled. Further, the R.D.R. output only from the image recording unit 104 that outputs image information. F.
Gate 1 or 2 makes either the NAND gate 185 or 186 valid, and the NAND gate 188
, And is latched by the latch circuit 189 by VCLK and input to the image recording unit 104.

The video control circuit 74 of the image recording means 104
6 (FIG. 7) is an image information read start signal R.6 from the storage means 102 and 103. F. OR to input Gate1 and Gate2
The R.G. F. Gate is input, and image information R.Gate is input. VD and the gate signal R.V. L. Gate
, And the input R.R. L. Gate is input, and at the same time, the image information R.G. VD is input to a toggle buffer memory (not shown). Then, the next R. L. Gate and image information R.G. In a cycle in which VD is input to another toggle buffer memory, image information is read from the previously input toggle buffer memory, and the semiconductor laser (L) is synchronized with a position detection signal of scanning light based on this image information.
D) Modulate 642 to form an electrostatic latent image on photoconductor 537. Note that the created latent image is visualized on the roll recording paper 530 by a well-known imaging process, and the fixing roller pair 5
The sheets are fixed by 38a and 538b and discharged.

Next, when the trailing edge of the document 207 passes through the sensor S _1, the read control circuit 314, CCD driving circuit 31
5, the counting of the initialization signal (synchronization signal) of the CCD 313 is completed, and the original length is calculated as it is or from the original feeding speed and the reading density of the image information, and the result is sent to the system control means 105. outputs, also, after counting the passing time of the original 207 from the sensor S ₁ until the exposure slit 211 stops outputting of the read start signal Write. As a result, the image information processing circuit 316 stops inputting the image information of the CCD 313, and the reading start signal W. F. Gate and image information W.Gate. Stop output of VD. The memory control circuit 421 (426) of the recording means 102 and 103 outputs the read start signal W. F. Gat
e is stopped, the storage circuit 418 (42
The write operation of 3) is completed.

At this time, the storage means 102 stores the synchronization signal R.D. L. Each time Sync is input, the gate signal R. L. Gate and image information R.G. VD1 is output and the sub-scanning address management circuit 420 is output.
The address value of (425) is counted up. When the sub-scanning address value reaches the final value n, a signal NEXT notifying that the reading has been completed is output to the storage means 103, and the main scanning address "address 0" of the sub-scanning address "n" is changed to "r". The gate signal R. of the image information of the address ". L. Gate together with the next synchronization signal R.Gate.
L. When the sync signal is input, the read start signal R. F. G
ate output is stopped. The storage unit 103 stores the R.
L. Sync. L. When the Gate signal is output, the image information from the main scanning address 0 at the sub-scanning address n to the address r is sequentially read out, and the next R.G. L.
When Sync is input, the sub-scanning address management circuit 425 counts down, similarly reads out image information from address 0 to address r of the main scanning address, continues counting down the sub-scanning address sequentially, and continues the image information R.1. When the VD2 reading process is continued and the sub-scanning address value becomes the final value n, the main scanning address "z" of the sub-scanning address "n" is output to "r", and the same operation is performed. After the,
Read start signal R. F. Gate output is stopped. Other operations are the same as when the input from the input means 106 is a parallel mirror image. FIGS. 10 and 12 are timing charts of the operation when the input from the input means 106 is a column mirror image.

FIG. 9B shows the image information R.R. read out from the storage means 103 by the above operation. VD2, which indicates the image information R.V. VD
1 is the same as the original image (FIG. 9A), the output image information is as shown in FIG. 9C. That is, the normal image and the mirror image of the original image are continuously formed on the same recording paper. The image is recorded and output. In the present embodiment, a normal image is combined in front of the output image and a mirror image is combined in tandem with the output image, but the upside down may be reversed or the count-up and countdown of the sub-scanning address management circuit of the memory control circuit may be reversed. And it can be easily realized by setting the initial value to the opposite relationship.

In a digital copying machine, a device provided with a storage means composed of a plurality of blocks for storing image information and synthesizing and outputting it with other information has been put to practical use in the sense of taking advantage of digital. I have. In such an apparatus, the image information read by one reading operation as in the present embodiment is simultaneously written into the storage means of a plurality of blocks, and at the time of reading, the image information of the first storage means is followed by the second storage. By reading out the image information of the means upside down and recording the image on the same recording paper, it is possible to obtain a normal image and a mirror image of the original image on the same recording paper, without requiring any special hardware configuration, and furthermore, for editing. Without requiring any processing time. In the case of the conventional example, the image size that can be output in parallel is limited to １ ／ of the width of the recording paper (A3 portrait document → A2 landscape size). With such a configuration, the length direction can be made sufficiently large, and an A2 landscape document can be output up to an A1 portrait size.

[0040]

As described above, according to the image editing apparatus of the present invention, the image information read by one scanning is simultaneously written and stored in a plurality of blocks of the storage means, and the width of the original image or the recording output is performed. According to the width of the image, the image information is shifted in the main scanning direction from the first block of the storage means, the image information is shifted in the main scanning direction from the second block of the storage means, and the right and left are reversed. And simultaneously reading and synthesizing and recording an image on the same recording paper, or simultaneously writing and storing image information read by one scan in a plurality of blocks of the storage means, After reading the image information from the second block, the image information is read out from the second block of the storage unit by inverting the image information upside down, and the image is synthesized and recorded on the same recording paper. In parallel or in tandem with the draft image, can output a mirror image of the original image, it is possible to expand the width of the image editing process.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating a configuration of an image editing device according to the present invention.

FIG. 2 is an explanatory diagram illustrating a schematic configuration of a reading unit illustrated in FIG. 1;

FIG. 3 is a block diagram illustrating a control system of a reading unit illustrated in FIG. 2;

FIG. 4 is a block diagram illustrating a schematic configuration of a storage unit illustrated in FIG. 1;

FIG. 5 is an explanatory diagram illustrating a schematic configuration of an image recording unit illustrated in FIG. 1;

FIG. 6 is an explanatory diagram illustrating a schematic configuration of an image recording unit illustrated in FIG. 1;

FIG. 7 is a block diagram showing a control system of the image recording means shown in FIGS. 5 and 6;

FIG. 8 is an explanatory diagram showing an output example by the image editing device according to the present invention.

FIG. 9 is an explanatory diagram showing an output example by the image editing device according to the present invention.

FIG. 10 is a timing chart showing the operation of each unit of the image editing device according to the present invention.

FIG. 11 is a timing chart showing the operation of each unit of the image editing device according to the present invention.

FIG. 12 is a timing chart showing the operation of each unit of the image editing device according to the present invention.

[Explanation of symbols]

 101 reading means 102 storage means 103 storage means 104 image recording means 105 system control means 106 input means 180 synthesis output means 313 CCD 314 reading control circuit 315 CCD driving circuit 316 image information processing circuit 418 (423) storage circuit 419 (424) main Scanning address management circuit 420 (425) Sub-scanning address management circuit 421 (426) Memory control circuit 422 (427) Switching circuit 537 Photoconductor 642 Semiconductor laser 745 Image recording control circuit 746 Video control circuit

────────────────────────────────────────────────── ─── Continued on the front page (58) Fields investigated (Int. Cl. ⁷ , DB name) H04N 1/387-1/393 G06T 3/00-3/60 Patent file (PATOLIS)

Claims (2)

(57) [Claims] A reading means for digitally reading a document image; a storage means comprising a plurality of blocks capable of writing and reading processing of image information read by the reading means; and reading from the plurality of storage means. An image editing device comprising: a synthesizing output unit for synthesizing and outputting the image information obtained by the synthesizing unit; and an image recording unit for image-recording the output from the synthesizing output unit. Write and store in multiple blocks at the same time,
The image information is shifted in the main scanning direction from the first block of the storage unit in accordance with the width of the document image or the width of the image to be recorded, and the image information is shifted in the main scanning direction from the second block of the storage unit. An image editing apparatus characterized in that the image data is read out simultaneously by shifting, inverting left and right, and synthesizing on the same recording paper by the synthesizing output means. 2. An image forming apparatus according to claim 1, further comprising: input means for designating that the mirror images are arranged in a column, and when it is designated through the input means that the mirror images are arranged in a column, the image is read by one scan. The image information is simultaneously written and stored in a plurality of blocks of the storage means, and after the image information is read from the first block of the storage means, the second information of the storage means is read.
The image information is read upside down from the block of
2. The image editing apparatus according to claim 1, wherein the image is combined and recorded on the same recording paper by the combining output unit.