JP3102767B2 - Driving method of fluorescent display tube - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a fluorescent display tube (VFD:
Vacuum Fluorescent Display).

[0002]

2. Description of the Related Art A phosphor layer is fixed on a plurality of anodes provided on a display surface of a substrate, and electrons generated from a cathode located above the display surface are caused to collide with the phosphor layer. A fluorescent display tube of a type in which a phosphor layer selectively emits light is known. In such a fluorescent display tube, the operating voltage is low and the display is clear because the surface of the phosphor layer on which electrons generated from the cathode collide is located on the display side, and phosphor layers having different emission colors are prepared. Therefore, it is often used as a display component of a display panel of an audio device or an automobile because it has a feature that a color display can be performed.

[0003] In one kind of the above-mentioned fluorescent display tubes, instead of a mesh-like grid for controlling light emission of the fluorescent layers on a plurality of anodes provided on the display surface of the substrate, a fluorescent layer is provided. A rib-shaped wall is protruded from the periphery of the anode of the substrate so as to surround it, and a grid electrode is provided on the top, and a grid electrode positioned higher than the phosphor layer controls light emission of the phosphor layer. Proposed. For example, JP
Such a fluorescent display tube is disclosed in Japanese Patent Publication No. 290050/1990.

In the above-described rib grid type fluorescent display tube, thermions emitted from the cathode are applied to a grid electrode on the rib-like wall by a relatively low positive acceleration voltage of about several tens of volts. Thereby, the phosphor layer is accelerated and collided toward the phosphor layer located on the anode, so that the phosphor layer surrounded by the grid electrode emits light, so that dynamic driving is preferably performed. According to the fluorescent display tube of this type, since a mesh-shaped grid is not used, uneven brightness or short-circuit caused by thermal deformation of the grid when the emission pattern of the phosphor layer is enlarged as the size becomes larger. There is an advantage that display defects such as the above are eliminated, and that the brightness of the fluorescent display tube is reduced in relation to the aperture ratio of the mesh grid.

[0005]

By the way, the display pattern of the fluorescent display tube is a so-called character pattern (or segment pattern) in which an anode and a phosphor layer are provided in various predetermined shapes such as "day" and "△". Also called)
In recent years, a so-called dot matrix pattern (or a graphic pattern) in which dot-shaped pixels having dimensions and shapes of about 0.3 to 1.2 mm square, for example, are used for graphic display. Is also used. In this dot matrix pattern, since the dot-like anodes constituting minute pixels are densely arranged at a small pitch, they are related to display defects such as uneven brightness and short-circuit due to thermal deformation of the mesh-like grid and the aperture ratio thereof. To avoid a decrease in brightness, etc.
It is more preferable to adopt a structure in which a grid electrode is provided on a rib-like wall as described in the above publication.

On the other hand, as a driving method for efficiently and beautifully displaying a dot matrix pattern composed of a large number of pixels, an anode multi-matrix system represented by an anode quad matrix system is known. In the anode quad matrix system, one grid is assigned to every two columns of anodes arranged in a plurality of columns and a plurality of rows, and four grids are provided for each row of the anode, and four columns are arranged on the anode for each row. And a plurality of anode wirings respectively connected to a pair of grids adjacent to each other. A predetermined acceleration voltage is applied to a pair of grids for scanning, and four columns corresponding to the pair of grids are synchronized in synchronization with the scanning timing. A predetermined positive voltage is applied to predetermined anodes in two rows located inside of the anodes. According to such a driving method, two rows of anodes are driven at the same time, so that the duty ratio is twice as high as that in the case of driving each row, and the luminance is increased. The outer portions of the pair of grids, each corresponding to a row of anodes located on either side of the anode, substantially function as auxiliary grids for the driven two rows of anodes, so that adjacent grids to which the erase voltage is applied The influence of the negative electric field due to the grid is almost eliminated, and the generation of shades in the pixels to emit light is suppressed. In addition, since a positive voltage is not applied to the anode of the non-light-emitting pixel adjacent to the pixel to emit light, leakage light emission of the non-light-emitting pixel is suitably suppressed.

Therefore, a grid structure for applying the above-mentioned anode multi-matrix method has been proposed for the rib grid type fluorescent display tube. For example, Japanese Patent Application Laid-Open No. 6-251 filed by the applicant of the present application and published.
This is the grid for a fluorescent display tube described in Japanese Patent Publication No. 732 and the like. According to this technique, for example, FIG.
As shown in (b), a plurality of anodes 12 each having a phosphor layer 10 for forming a dot-shaped pixel fixed on the surface are arranged in a rectangle vertically and horizontally and along a predetermined direction. The entire periphery of each anode 12 is surrounded by a rib-shaped wall 14 provided in common for every two rows of anode rows composed of a plurality of anodes 12, and a grid electrode 1
6 are provided. Then, four anode wirings 18 for applying a positive voltage to each anode 12 are provided for each row of each anode 12 along the other direction (row direction) orthogonal to the above-mentioned one direction, and four in the other direction. A plurality of anodes 12 arranged in each row are connected to the same anode wiring 18 every fourth. In the drawing, only the anode wiring 18 corresponding to the anode 12 located in the uppermost row is shown. When driving this fluorescent display tube in the anode four-matrix system, a predetermined acceleration voltage is simultaneously applied to a pair of adjacent grid electrodes 16 and 16 at the same time to perform scanning, and the pair of grid electrodes 16 and 16 are synchronized in synchronization with the scanning timing. A predetermined positive voltage is applied to the anode wiring 18 corresponding to the pixel to be lit, that is, the cell 20, of the two columns located inside the four anode columns surrounded by the grid electrodes 16 and 16. As a result, the cell 20 to be lit is caused to emit light in a state in which the cell 20 is doubly surrounded by the grid electrode 16 to which the accelerating voltage is applied, thereby suppressing shading and surrounded by the grid electrode 16 to which the accelerating voltage is applied. Since no positive voltage is applied to the anodes 12 of the non-lighted cells 20 located in the outer two rows among the cells 20 that are not lit, leakage light emission is suppressed.

However, in the above-described fluorescent display tube shown in FIG.
6 are surrounded by the whole,
As is apparent from the figure, between the pair of adjacent anode rows surrounded by different grid electrodes 16, two rib-shaped walls 14 and the grid electrode 16 exist, and the adjacent grid electrodes 16 In order to prevent a short circuit between the 16, 16, it is necessary to provide a sufficient space between them. Therefore, among the intervals between the adjacent cells 20, the interval f between the cells 20 surrounded by the different grid electrodes 16, 16 is about three times the interval g between the cells 20 surrounded by one grid electrode 16. There is a problem that becomes large. That is, in this grid structure, in order to provide a uniform cell interval desired for graphic display, the above-mentioned interval g, that is, the rib-shaped wall
4 had to be increased in accordance with the interval f, and it was difficult to make the cell pitch sufficiently small.

In view of the above, the applicant of the present application further discloses in Japanese Patent Application No. 8-212218 (not disclosed) that the anode of a cell to be turned on by a pair of grid electrodes electrically insulated from each other. A part and the rest of the outer periphery of the predetermined row of anodes, and a part of the outer circumference of the anodes of the adjacent rows on both sides of the predetermined row not including the anode of the cell to be lighted, respectively, and a pair of these grids A grid structure has been proposed in which an acceleration voltage is simultaneously applied to the electrodes so that the entire periphery of the predetermined row of anodes is surrounded by the grid electrode to which the acceleration voltage is applied. According to this grid structure, for example, as shown in FIG. 2, for every two anode rows including cells to be turned on, for example, the anode rows 22aB,
As illustrated below, one anode row 22aA of a pair of anode rows 22aA and 22bB adjacent to both sides thereof and the anode rows 22aB and 22b to be turned on, as illustrated below.
The anode row 22 which is provided between and turns on
aB, a grid electrode 26a positioned so as to surround a part of the outer periphery of each of the plurality of anodes 24 constituting the 22bA
Is electrically insulated from the grid electrode 26a, and the other anode row 2 of a pair of anode rows 22aA and 22bB adjacent to both sides of the anode rows 22aB and 22bA to be turned on.
2bB and the anode rows 22aB, 22bA, which are provided between the anode rows 22aB, 22bA to be turned on.
A grid electrode 26b is provided so as to surround the rest of the outer periphery of each of the plurality of anodes 24 constituting the 22bA and not surrounded by the grid electrode 26a.

Therefore, as is apparent from the drawing, the drive timing at which the cells included in the anode rows 22aB and 22bA indicated by oblique lines are turned on, that is, the grid electrode 2
A predetermined accelerating voltage is applied to each of the anode wirings 28a, 26b (four rows, one for each of the anode wires 28 (1A to 1D provided for the first row).
Considering the drive timing at which a predetermined positive voltage is applied to 1B to nB and 1C to nC in FIG.
The anodes 2aB and 22bA are respectively surrounded by grid electrodes 26a and 26b to which the accelerating voltage is applied, and the anode rows 22aA and 22bB located on both sides thereof are partially surrounded by the grid electrodes 26a and 26b. It will be in a state where it was lost. Therefore, the influence of the negative electric field due to the grid electrode 26c or the like to which the erasing voltage is applied is caused by the grid electrode 2 surrounding the anode rows 22aA and 22bB not including the cell to be turned on.
6a and 26b, the gap between the anodes 24, that is, the cell pitch is made sufficiently small and uniform, and the shade and leakage light emission are suppressed, so that high display quality can be obtained. This is apparent from consideration of the positional relationship between the grid electrodes 26a and 26b to which the acceleration voltage is applied and the grid electrode 26c to which the erase voltage is applied for each anode 24. For example, as for the anode 24a shown in the figure, five of the six anodes 24 surrounding it are surrounded by grid electrodes 26a and 26b all around, and the other one is placed on one side of the grid electrode 26a farthest from the anode 24a.
c is only located. The anode 24b
, Three of the six anodes 24 surrounding it are surrounded by grid electrodes 26a and 26b all around,
Only the grid electrodes 26c are located on one side of each of the remaining three electrodes sufficiently separated from the anode 24b. Therefore, each of the anodes 24a, 24b has a grid electrode 26a, 26 around the anode 24 located therearound.
The effect of the negative electric field formed by the grid electrode 26c is suppressed by b. Regarding the other anodes 24, the positional relationship with the surrounding anodes 24 is any of the anodes 24 a and 24.
Same as b.

However, the positional relationship between the anode 24 and the grid electrode 26 as described above is such that the hexagonal anodes 24 are arranged in a staggered manner along the grid electrode 26 as shown in FIG. R (red), G
(Green) and B (blue) are realized by a delta arrangement to be assigned. Therefore, in a method of arranging pixels such as a quartet arrangement or a stripe arrangement in which R, G, and B are assigned to four pixels adjacent to each other vertically and horizontally or three pixels arranged in the vertical direction or the horizontal direction, for example, as shown in FIG. Since the pixels are arranged vertically and horizontally, each anode 12 has a structure capable of sufficiently suppressing the influence of the erase voltage applied to the adjacent grid electrode 16.
It is difficult to reduce the number of grid electrodes 16 located between the cells (that is, the cells 20) to one.

For example, FIG. 3 corresponds to a structure in which the left portions of the plurality of grid electrodes 16 shown in FIG. 1 extending along the column direction of the anodes 12 (vertical direction in the figure) are removed. . In this grid structure, the anodes 34 on the right side of the anode rows 32b, 32d, 32f,... Of the two anode rows 32 surrounded by each grid electrode 30 are:
Each of the grid electrodes 30a, 30b, 30c,.
The anode row 32 on the left, completely surrounded by
The anodes 34a, 32c, 32e,.
As shown in the figure for c and 32e, grid electrodes 30a and 30b on the left side are located on one side of each. For this reason, for example, an acceleration voltage is applied to the grid electrodes 30b and 30c, and the anode row 32 indicated by oblique lines in the drawing is applied.
Considering the drive timing at which the pixels included in the anode rows 32d and 32e are turned on, the anode 34 in the anode rows 32d and the anodes 34 in the anode rows 32d and 32f located on both sides thereof are connected to the grid electrodes 30b to which the acceleration voltage is applied. , 30c, the influence of the grid electrode 30a and the like to which the erase voltage is applied is suppressed, and a good lighting state can be obtained. On the other hand, the anode 34 in the anode row 32d is influenced by the negative electric field formed by the grid electrode 30a to which the erasing voltage is applied is located on one side of the anode 34 in the anode row 32c adjacent to the left side. Is not sufficiently suppressed, and a part of the grid electrode 30a side is shaded. That is, the effect of the grid structure described in Japanese Patent Application No. 8-212218 is affected by the pixel arrangement, particularly when the pixels, that is, the anodes 34 are arranged vertically and horizontally to form a quartet arrangement or a stripe arrangement. In some cases, since the way in which the grid electrode 30 surrounds the anode 34 in each column is not uniform, a uniform lighting state may not be obtained.

The present invention has been made in view of the above circumstances, and an object of the present invention is to make it possible to sufficiently reduce the cell pitch by surrounding a part of the outer periphery of the anode with an adjacent grid electrode. It is an object of the present invention to provide a driving method capable of suitably suppressing the occurrence of shade due to a pixel array in a fluorescent display tube.

[0014]

In order to achieve the above object, the gist of the present invention is that a phosphor layer for forming a dot-shaped pixel is fixed on the surface of each of the phosphor layers and is provided on the display surface of the substrate. A plurality of anodes arranged at a predetermined distance from each other in a plurality of columns along a first direction and in a plurality of rows along a second direction intersecting the first direction; and surrounding and surrounding the plurality of anodes, respectively. A rib-like wall protruding above the phosphor layer so as to be continuous with each other in a first direction, and formed on the top of the rib-like wall along the first direction to be electrically insulated from each other; The driving unit anode row is adjacent to both sides of the driving unit anode row and the driving unit anode row for each driving unit anode row that is driven at a time among the plurality of rows of anode rows along the first direction. Provided between one of a pair of adjacent anode rows A first grid electrode positioned so as to surround at least a part of the outer periphery of each of the plurality of anodes constituting one of the driving unit anode row and the adjacent anode row, the driving unit anode row and the adjacent anode The remaining portion of the outer periphery of each of the plurality of anodes, which is provided between the other of the columns and constitutes the driving unit anode row, which is not surrounded by the first grid electrode, and the other of the adjacent anode rows. A plurality of grid electrodes including a second grid electrode positioned to surround at least a part of the outer periphery of each of the plurality of anodes constituting the plurality of anodes; and a cathode positioned above the plurality of grid electrodes. And a plurality of anodes provided in a predetermined number for each of the plurality of rows of the anodes located along the second direction and connected to the anodes at predetermined intervals for each of the rows. And a predetermined accelerating voltage to two or more adjacent predetermined grid electrodes surrounding the entire circumference of each anode in the drive unit anode row of the plurality of grid electrodes, A scanning step of controlling electrons generated from the cathode by sequentially applying a predetermined erasing voltage to the grid electrodes and sequentially scanning the driving unit anode rows, and a grid to which an acceleration voltage is applied in the scanning step. By applying a predetermined positive voltage to a predetermined anode wiring to which a predetermined driving unit anode row surrounded by electrodes is connected in synchronization with the scanning timing of the scanning step, the fluorescent light on the predetermined driving unit anode row is A positive voltage application step of sequentially emitting light from the body layer, comprising: (a) applying the predetermined acceleration voltage in the scanning step in the predetermined drive unit anode row. The positive voltage due to the negative electric field formed by the other grid electrode to which the erase voltage is applied, which is located adjacent to one of the predetermined grid electrodes directly surrounding the predetermined drive unit anode row. The application of the predetermined acceleration voltage is synchronized with the timing at which the predetermined acceleration voltage is applied to the other grid electrodes and the predetermined grid electrodes directly surrounding the brightness reduction anodes, in the row of the brightness reduction anodes in which the brightness is partially reduced in the application step. The method further includes an auxiliary light emitting step of applying a predetermined auxiliary positive voltage to cause the luminance lowering anode to perform auxiliary light emission.

[0015]

In this manner, a part and the rest of the outer periphery of the anode in the drive unit anode row and both sides of the drive unit anode row are formed by the predetermined grid electrodes electrically insulated from each other. A grid electrode that surrounds at least a part of the outer periphery of the anode in an adjacent row and applies an acceleration voltage to the predetermined grid electrodes at the same time so that the entire circumference of the anode in the drive unit anode row is applied with the acceleration voltage When a fluorescent display tube having a grid structure to be surrounded by and capable of sufficiently reducing the cell pitch is dynamically driven by a so-called anode multi-matrix system, the scanning is performed in a predetermined drive unit anode row that is sequentially lit. In the process, a predetermined grid electrode to which a predetermined acceleration voltage is applied is adjacent to one directly surrounding the predetermined drive unit anode row. Partially in luminance reduction anode columns luminance is lowered in the positive voltage application step by the negative electric field formed by the other grid electrodes erase voltage to location is applied,
In the auxiliary light emitting step, a predetermined auxiliary positive voltage is applied in synchronization with a timing at which a predetermined acceleration voltage is applied to the other grid electrode and the predetermined grid electrode directly surrounding the brightness reduction anode, The lower brightness anode row emits auxiliary light. Therefore, the luminance at which the shade occurs in the positive voltage application process due to the insufficient grid electrode functioning as an auxiliary grid for suppressing the influence of the negative electric field formed by the grid electrode to which the erase voltage is applied is generated. The reduced anode row is to be subjected to auxiliary light emission in the auxiliary light emission step. At this time, the shading is caused by the grid electrode to which the erasing voltage is applied adjacent to a part of the grid electrode to which the acceleration voltage is applied, which directly surrounds the brightness lowering anode row in the peripheral portion of the brightness lowering anode row. Is generated at the portion where the erasing voltage along the first direction is applied, that is, at the end on the side of the grid electrode to which the erasing voltage is applied, while the grid electrode and the grid electrode that directly surrounds the brightness-reducing anode row are provided. When a predetermined auxiliary positive voltage is applied to the reduced brightness anode row in synchronization with the timing at which the acceleration voltage is applied, the grid electrode located on the opposite side to the other grid electrodes with respect to the reduced brightness anode row Since the erasing voltage is applied to, the other grid electrode side end is lit exclusively by the influence of the negative electric field formed by the grid electrode. In other words, the brightness-reduced anode row partially reduced in brightness is different from the normal scanning timing, and the grid electrode to which the acceleration voltage is applied directly surrounds the brightness-reduced anode row and the erase voltage is reduced. At the timing when the applied grid electrode is positioned adjacent to the opposite side of the brightness lowering portion, an auxiliary positive voltage is applied to the brightness lowering anode line, whereby the brightness lowering portion of the brightness lowering anode line emits auxiliary light. Let me do. As a result, a part and the remaining part of the brightness lowering anode row are sequentially turned on, and the whole is substantially uniformly turned on by the afterimage phenomenon. Therefore, in a fluorescent display tube in which the cell pitch can be sufficiently reduced by surrounding a part of the outer periphery of the anode with the adjacent grid electrode, generation of shading due to the pixel arrangement is suitably suppressed.

It should be noted that "a predetermined grid electrode to which a predetermined accelerating voltage is applied and a grid electrode of another grid electrode to which an erasing voltage is applied, which is located adjacent to a grid electrode directly surrounding a predetermined driving unit anode row", are disposed. The brightness-reduced anode array, in which the brightness is partially reduced in the positive voltage application process due to the influence of the negative electric field that is formed, generally includes a grid electrode directly surrounding a predetermined drive unit anode array and an erase voltage applied. This is caused by a portion where the grid electrode to which the accelerating voltage functioning as the auxiliary grid is applied is not positioned between the grid electrode and the set grid electrode, that is, a portion where the auxiliary grid is missing. However, practically, even if such an auxiliary grid missing portion exists, a negative electric field formed by the grid electrode to which the erasing voltage is applied causes a predetermined anode to be generated by the grid electrode to which the accelerating voltage is applied. When the influence on the directly surrounding grid electrode is suppressed, the brightness lowering anode row does not occur. Therefore, as a result, when a part of the anode is shaded by the influence of the negative electric field, the auxiliary grid is substantially missing.

In the above-mentioned auxiliary light emitting step, when a brightness-reduced portion, that is, a shade of the brightness-reduced anode row is formed on the scanning direction side, a drive unit anode row including the brightness-reduced anode row is driven. Scan timing, that is, performed following the positive voltage application step to the drive unit anode row,
On the other hand, when it is formed on the opposite side in the scanning direction, it is performed immediately before the positive voltage application step.

[0018]

In another embodiment of the present invention, preferably, in the auxiliary light emitting step, an application time of a predetermined auxiliary positive voltage applied to the luminance lowering anode row is set to a magnitude of a luminance lowering portion in the positive voltage applying step. The setting is made independently of the predetermined positive voltage application time in the positive voltage application step. With this configuration, since the application time of the auxiliary positive voltage is set based on the magnitude of the shadow in the positive voltage application step, the luminance that can be divided and emitted in the positive voltage application step and the auxiliary light emission step Since the brightness of the reduced anode row can be set as appropriate, the brightness of the brightness reduced anode row to which the auxiliary positive voltage is applied can be made similar to the brightness of the anode row to which no auxiliary positive voltage is applied without causing the shade, and the brightness of the fluorescent display tube can be reduced. It is possible to obtain uniform brightness over the entire surface.

Preferably, the driving unit anode row is a two-row anode row composed of the plurality of anodes arranged adjacent to each other and arranged in two rows, and the first grid electrode is formed of the two rows. A plurality of anodes in the anode row, and at least a portion of the outer periphery of each of the plurality of anodes in one adjacent anode row of the pair of anode rows adjacent to both sides of the two anode rows. Wherein the second grid electrode comprises a remaining portion of the outer periphery of each of the plurality of anodes in the two rows of anodes, which is not surrounded by the first grid electrode, and The anodes are positioned so as to surround at least a part of the outer periphery of each of the plurality of anodes in the other adjacent anode row of the pair of anode rows adjacent to both sides of the two anode rows. In this manner, by appropriately setting the number of anode wirings provided for each of the plurality of anode rows, the driving method of the fluorescent display tube can be increased in duty ratio to improve the brightness, that is, a so-called anode. A quad matrix system or the like can be used.

[0020]

DESCRIPTION OF THE PREFERRED EMBODIMENTS One embodiment of the present invention will be described below with reference to the drawings.

FIG. 4 shows a fluorescent display tube 5 according to one embodiment of the present invention.
FIG. 2 is a perspective view showing a part of the reference numeral 0 cut away. In the figure,
The fluorescent display tube 50 includes a substrate 54 made of an insulating material such as glass, ceramics, and enamel provided with a large number of dot-shaped cells 52 on one surface, a glass spacer 56 formed in a frame shape, and a transparent A cover glass plate 58, a plurality of anode terminals 60, a plurality of grid terminals 62, and a cathode terminal 64 are provided, and the substrate 54, the spacer 56, and the cover glass plate 58 are mutually glass-sealed. Thus, a vacuum space surrounded by these members is formed.

One surface of the substrate 54 covered by the vacuum space functions as a display surface of the fluorescent display tube 50. The plurality of dot-shaped cells 52 provided on the display surface have a polygonal shape similar to each other, that is, for example, a side along the longitudinal direction of the substrate 54 is about 400 (μm), and one direction substantially orthogonal thereto. Has a square shape of about 400 (μm) along the entire surface of each cell 52 by a plurality of grid electrodes 66 of the same shape provided on the display surface so as to be entirely in a grid shape. Each circumference is enclosed.
The plurality of grid electrodes 66 are arranged such that the cells surrounding each cell 52 are connected to each other in units of two rows of cells 52 adjacent to each other arranged in one direction.
Connected to two grid terminals 62. That is, the cell 52 is surrounded by the common grid electrode 66 for every two rows of units in the one direction. In this embodiment, the one direction corresponds to the first direction.

FIG. 5 is a perspective view showing a part of the display surface of the substrate 54 in an enlarged manner. As shown in the figure, a rib-shaped wall 68 whose entire shape forms a lattice shape protrudes from the display surface of the substrate 54, and the grid electrode 66 is provided on the top of the rib-shaped wall 68, for example. The thickness is about 20 (μm). The rib-shaped wall 68 is made of, for example, an insulating material such as low-melting glass containing an inorganic filler such as alumina particles, and has a width dimension of, for example, about 60 to 150 (μm), and That is, it is formed at a height of, for example, about 150 to 300 (μm) higher than the phosphor layer 72 described below.

Each of the cells 52 has a phosphor layer 72 of the same shape on an anode 70 of the same shape provided on the display surface of the substrate, as shown in FIG. Are laminated. This anode 70 is, for example,
It is composed of a graphite layer having a thickness of about 30 (μm), and is provided on the substrate 54 independently for each cell 52, that is, in a state of being insulated from each other.
The phosphor layer 72 has a thickness of, for example, about 30 (μm) and is made of one or several kinds of phosphors corresponding to a desired emission color. For example, when a color display is performed in three colors of RGB, for example, the phosphor layers corresponding to the three colors of RGB are sequentially arranged for each cell 52 in the other direction orthogonal to the one direction, that is, each row along the longitudinal direction of the substrate 54. The phosphor layers 72 corresponding to the four colors of RGGB are provided in four rectangular cells 52 adjacent to each other and arranged in a quartet arrangement. One pixel of the fluorescent display tube 50 has three or four light emitting colors different from each other arranged in a stripe shape or a rectangular shape adjacent to each other (however, in the case of four, two light colors are the same). It is constituted by a cell 52. That is, in this embodiment, the plurality of anodes 70 are each provided with a phosphor layer 72 for forming a dot-shaped pixel fixed to the surface thereof and provided on the display surface of the substrate 54 at a predetermined distance from each other.

FIG. 6 is a diagram showing a planar shape of the grid electrode 66 and a connection state of each anode 70. The horizontal direction in the figure corresponds to the longitudinal direction of the substrate 54. As is clear from the figure, a plurality of grid electrodes 6 arranged along the column direction of the anode 70 orthogonal to the longitudinal direction of the substrate 54
6 are all formed in a similar shape. The plurality of grid electrodes 66 are formed of a plurality of anode rows 73aA and 73a each including a plurality of anodes 70 arranged in the column direction.
B, up to 73 nA (up to 73 eA; hereinafter, unless otherwise specified, simply referred to as anode row 73), for each two adjacent rows (for example, 73 aA and 73 aB, 73 bA and 73 bB,...) , Extending in the column direction through the left side of the anode columns 73aA, 73bA,... Located between and between the respective anodes 70 in each anode column 73. Direction, that is, in the longitudinal direction of the substrate 54, and the anode rows 73 aA and 73 bA on the left side of the two anode rows 73.
The anode 70 is located on the four sides of the outer periphery of the anode 70 to 73 nA, that is, the entire periphery thereof, and the three sides of the outer periphery of the anode 70 in the right anode rows 73 aB, 73 bB, and 73 nB.

As will be apparent from the following description of the driving method, in the fluorescent display tube 50 of the present embodiment, for example, two anode rows 73aB
And 73bA, that is, one of a pair of anode rows 73aA and 73aB surrounding each anode 70 by a certain grid electrode 66a, an anode row 73aB surrounding three sides of each anode 70, and a grid thereof. A pair of anodes 70 surrounded by another grid electrode 66b surrounding one remaining side of each anode 70 of the anode row 73aB, which is one of the pair of anode rows 73aA and 73aB, adjacent to the electrode 66a. One of the anode rows 73bA and 73bB adjacent to one of the anode rows 73aB and the anode row 73bA surrounded on four sides is an anode row composed of anodes that can be simultaneously turned on at a certain moment. ". Since the grid electrodes 66 are all formed in the same shape, if the above is generalized, of the four anode rows 73 surrounded by a pair of grid electrodes 66 adjacent to each other, Are equivalent to a "drive unit anode row".

Therefore, the plurality of grid electrodes 66
A pair of anode rows 73 adjacent to both sides of the drive unit anode rows 73aB and 73bA, 73cB and 73dA,.
aA and 73bB, 73cA and 73dB, ...
(73aA, 73cA,...) And their driving unit anode rows 73aB and 73bA, 73cB and 73d
, And the drive unit anode rows 73aB and 73bA, 73cB and 73dA,
, Which correspond to the first grid electrode and are positioned so as to surround at least a part of the outer periphery of each of the plurality of anodes 70 constituting ...
Are electrically insulated from the grid electrodes 66a, 66c,.
The other of the pair of anode rows 73aA and 73bB, 73cA and 73dB,... (73bB, 73d) adjacent to both sides of bA, 73cB and 73dA,.
B,...) And their driving unit anode rows 73aB and 73a
bA, 73cB and 73dA, and the drive unit anode rows 73aB and 73b
A, 73cB and 73dA,... Are located at the rest of the outer periphery of each of the plurality of anodes 70 that are not surrounded by the grid electrodes 66a, 66c,. , And grid electrodes 66b, 66d,... Corresponding to the second grid electrodes.

More specifically, a plurality of grid electrodes 6
6 denotes the drive unit anode rows 73aB and 73bA, 7
3cB and 73dA,... Corresponding to one of the first anode rows constituting 73dA,.
.., A grid electrode 66 corresponding to a first grid electrode surrounding a part of the outer periphery of each of the plurality of anodes 70 in a predetermined shape (in this embodiment, one side of a square).
, a, 66c,... and anode rows 73bA, 73dA, which correspond to the other second anode row constituting the driving unit anode row.
... enclosing the entire circumference of each of the plurality of anodes 70 inside,
Anode rows 73aB, 73c corresponding to the first anode row
B,... Surround a part (that is, one side) of the outer periphery of each of the plurality of anodes 70 in the predetermined shape.
Grid electrodes 66b and 66 corresponding to the grid electrodes
are alternately arranged along the one direction, that is, the first direction.

As is apparent from the above description, the "drive unit anode row" includes two anode rows 73aB and 73bA, each of which includes a plurality of anodes 70 arranged adjacent to each other in two rows.
73cB and 73dA,..., The structure of the grid electrode 66 can be further described in other words.
Grid electrodes 66a, 66 corresponding to the grid electrodes
c,... represent the two anode rows 73aB and 73b.
A, 73cB and a plurality of anodes 7 in 73dA,.
0, and the two anode rows 73aB and 73bA,
... in the anode rows 73aA, 73cA, ... corresponding to one of the pair of anode rows 73aA and 73bB, 73cA and 73dB, ... adjacent to both sides of 73cB and 73dA, ... Multiple anodes 70
At least a portion of each of the outer circumferences (in the present embodiment,
The grid electrodes 66b, 66d,... Corresponding to the second grid electrodes are positioned so as to surround the entire periphery or three sides of the square.
3aB and 73bA, 73cB and 73dA,.
Of the outer circumferences of the plurality of anodes 70 in the grid electrodes 66a, 66c,
, And a pair of anode rows 73aA, 73bB, 73cA adjacent to both sides of the two anode rows 73bA, 73cB, 73dA,.
And the other adjacent anode row 73 of 73 dB,.
are positioned so as to surround at least a part of the outer periphery of each of the plurality of anodes 70 in bB, 73 dB,.

Therefore, in this embodiment, the fluorescent display tube 50 is incompletely surrounded by one grid electrode 66, and is entirely surrounded by the grid electrode 66 and the grid electrode 66 adjacent thereto. Anode 7
0, that is, the anode row 73 located on the right side of the two anode rows 73 surrounded by the grid electrodes 66, respectively.
ab, 73bB, and up to 73 nB.

In the above description, the grid electrodes 66a, 66c,... Correspond to the first grid electrode, and the grid electrodes 66b, 66d,. However, as described above, since the plurality of grid electrodes 66 are all formed in the same shape, in the relationship between the grid electrodes 66b and the grid electrodes 66c, for example, the former is the first grid electrode and the latter is the first grid electrode. Each cell 52 of the anode rows 73bB and 73cA corresponding to the second grid electrode and located therebetween.
Similarly to the above-described anode rows 73aB and 73bA, the whole outer periphery is surrounded by one grid electrode 66 alone or two adjacent grid electrodes 66.
Therefore, in this embodiment, the grid electrodes 66a, 66c, 66f,... Arranged along the column direction are provided on one of the first grid electrode and the second grid electrode, and the grid electrodes 66b, 66d. , 66e, ...
Corresponds to the other of the first grid electrode and the second grid electrode, and it is not particularly necessary to distinguish between the two.

As is clear from FIG. 6 and the like, each side of the tip of each grid electrode 66 toward the adjacent grid electrode 66 is slightly shorter than the other sides, and , 66 between each other, for example, 10
An interval d _{G of} about 0 (μm) is provided, thereby preventing a short circuit between the adjacent grid electrodes 66 and the first grid electrode 66.
And the second grid electrode is electrically insulated.

Each anode 70 is connected to four anode wires 78 provided for each row along the longitudinal direction (ie, the second direction) of the substrate 54 by connecting wires to each anode 70 in the column direction.
The anode electrodes 78 are connected to each other so that the same anode wiring 78 is provided for every fourth one. That is, the anode wiring 78 of each row is composed of four wirings A to D, and each row of the anode 70 arranged in a plurality of rows has 1A to 1D in the first row and 2A to 2D in the second row. 2D has nA in row n
To nD. The anodes 70 of the anodes 70 in each row are connected to the anode wires 78 of 1A, 1B, 1C, and 1D in the column direction as shown in the first row in the figure. In the figure, the anode wiring 78 (1A to 1A) in the first row is shown.
Although only D) is shown, the connection state of each of the second and subsequent rows is the same as that of the first row. That is, in the present embodiment, the anode wirings 78 are provided independently for each row, and the anodes 70 are allocated to four wirings for each row, and the number of the anode wirings 78 is four times (4 times the number n of rows).
n).

It should be noted that in FIG.
Although the drawing 8 is illustrated as being located on the side (upper side of the figure) of the anode 70, the anode wiring 78 is actually provided below each anode 70. That is, the anode wiring 78 is
Are arranged along the row direction of the anode 70 parallel to the longitudinal direction of the substrate 54 (4n).
Each of the anodes 70 is provided above an insulating layer (not shown) made of a low-melting glass or the like containing a coloring pigment, which is formed of an aluminum thin film and the like that is fixed and is provided so as to cover the entire anode wiring 78. I have. A through-hole (not shown) is provided at a position directly below the anode 70 in the insulating layer, and a part of the graphite layer constituting the anode 70 enters the through-hole.
Are electrically connected to a desired anode wiring 78.

The distance between the anodes 70 is such that the two anode rows 73, 73, which are surrounded by one grid electrode 66, are arranged in the respective anode rows 73.
Between the anodes 70 along the row direction inside and between the anodes 70 along the row direction within two adjacent anode columns 73, 73 which are respectively surrounded by grid electrodes 66, 66 adjacent to each other. In each case, a similar interval d _A
= About 60 to 150 (μm). That is, cell 52
The mutual center interval (cell pitch) is set to the same constant value in both the column direction and the row direction. In the present embodiment, as described later, since a pair of grid electrodes 66, 66 adjacent to each other form a grid structure in which an anode 70 that surrounds a part of the outer periphery and the rest is provided, , Only one grid electrode 66 exists, thereby realizing the uniform and small cell pitch as described above. In FIG. 6, the anode 70, that is, the cell 52 is drawn in a square shape. For example, when color display is performed in three colors of RGB, when the colors are arranged in a stripe array, the cells 52 corresponding to the three colors are formed. In the direction in which the cells 52
Is preferably shortened to about 1/3 in order to make the shape of one pixel closer to a square. Further, in the drawing, the grid electrode 66 is drawn apart from the anode 70 for convenience of explanation, but in actuality, the grid electrode 66 is provided at a position close to the anode 70 as shown in FIG. I have. Therefore, the distance d _A between the anodes 70 is equal to the width of the grid electrode 66 and the rib-shaped wall 68.

Returning to FIG. 4, a pair of filament supporting frames 74 each having the cathode terminal 64 are fixedly provided at both ends of the substrate 54, and a direct heat is applied between the filament supporting frames 74. A thin-line cathode (filament) 76 functioning as a mold cathode is stretched so as to be at a predetermined height parallel to the longitudinal direction of the substrate 54 and separated from the display surface of the substrate 54.

Therefore, the thermoelectrons emitted from the cathode 76 are accelerated by the grid electrode 66 to which a positive voltage (acceleration voltage) of about 60 (V) is applied to the 0 (V) cathode 76, for example. Therefore, if a positive voltage is also applied to the anode 70 of the cell 52 surrounded by the grid electrode 66 to which the accelerating voltage is applied, the thermoelectrons generate the phosphor layer 7 of the cell 52.
2, the phosphor layer 72 emits light. Even if a positive voltage is applied to the anode 70, the grid electrode 66 surrounding the anode 70 has a negative erasing voltage of about several (V) with respect to the cathode 76. When (cut-off bias) is applied, thermal electrons do not reach the anode 70 and the phosphor layer 72 does not emit light. Therefore, in a state where the thermoelectrons are emitted by the current flowing through the cathode 76, a desired one of the anodes 70 of the cells 52 is synchronized with the timing at which the accelerating voltage is sequentially applied to the grid electrode 66. When a positive voltage is applied to the LED, light-emitting display is performed in a desired pattern by so-called dynamic driving.

The fluorescent display tube 50 constructed as described above.
Is driven by a so-called anode quad matrix method, and a driving method thereof will be described with reference to FIG. 6 and FIG. 7 showing a timing chart for applying a voltage to the grid electrode 66 and the anode wiring 78. I do.

At time t0, all the grid electrodes 66 are in the OFF state, that is, the erase voltage is applied.
All the cells 52 are in a non-lighting state. At time t1, the grid electrodes 66a and 66b are turned on, that is, an accelerating voltage is applied to the grid electrodes 66a and 66b, and at the same time, the 1
A predetermined positive voltage is applied to one of the cells B to nB and 1C to nC in which the cell 52 to be lit exists, so that the predetermined cell 52 (in the present embodiment, the anode indicated by hatching in FIG. 6). Only the cells 52) in the columns 73aB and 73bA are turned on. FIG. 7 is a timing chart when all of the plurality of cells 52 are turned on.
Although a positive voltage is applied to all of 1B to nB and 1C to nC, if only some of the cells 52 in the anode rows 73aB and 73bA are to be turned on, some of the anode wirings corresponding to the cells 52 A predetermined positive voltage is applied to only 78.

At this time, of the four anode rows 73aA to 73bB surrounded by the grid electrodes 66a and 66b on four sides or three sides of the anode 70 (cell 52), two anode rows 73aB and 73bA located inside are arranged. Each anode 70 in
Is surrounded by the pair of grids 66a and 66b on its entire circumference, and furthermore, is positioned on both sides thereof.
Among the anode rows 73aA and 73bB of the rows, each anode 70 in the anode row 73aA located on the left is also surrounded by the grid electrode 66a to which the acceleration voltage is applied. That is, the two anode rows 73a located inside
B, a cell 52 composed of each anode 70 in an anode row 73aB adjacent to the anode row 73aA of the 73bA.
Are doubly surrounded by the grid electrode 66 to which the acceleration voltage is applied. Therefore, the grid electrode 66
When an unillustrated grid electrode 66 to which an erase voltage is applied is provided on the left side of
6, another part of the grid electrode 66a or a part of the grid electrode 66b is located between the grid electrode 66c and a part of the grid electrode 66a directly surrounding the anode 70 in the anode row 73aB. From the anode row 7
A part of the grid electrode 66a surrounding each anode 70 in 3aA is connected to each anode 7 in one anode row 73aB located inside.
Since it functions as an auxiliary grid electrode for canceling a negative electric field formed by the grid electrode 66c or the like to which the erasing voltage around 0 is applied, shading due to the influence of the negative electric field does not occur.

On the other hand, each anode 70 in the anode row 73bB located at the right end of the four rows has only three sides surrounded by a grid electrode 66b, and the other side has a grid to which an erase voltage is applied. The electrode 66c is located.
That is, the two anode rows 73aB, 73
Anode row 73 of bA adjacent to its anode row 73bB
The cell 52 composed of the respective anodes 70 in bA is not partially doubly surrounded by the grid electrode 66 to which the acceleration voltage has been applied. Therefore, on the left side of each cell 52, the grid electrode 66a to which the acceleration voltage is applied is positioned between the grid electrode 66b directly surrounding the anode 70 and the grid electrode (not shown) to which the erase voltage is applied. Therefore, the negative electric field formed by the grid electrode 66 (not shown) to which the erasing voltage is applied is canceled to emit light, but the right portion is adjacent to a part of the grid electrode 66b directly surrounding the anode 70, Since the grid electrode 66c to which the erase voltage has been applied is located,
The brightness of the right part thereof, that is, a part of each cell 52 (anode 70) shown by oblique lines falling to the right in FIG. That is, the anode 70 in the anode row 73bA has a part of the grid electrode 66c to which the erase voltage is applied positioned adjacent to a part of the grid electrode 66b to which the acceleration voltage is applied directly surrounding the grid electrode 66b. That the brightness is partially reduced,
In this embodiment, the anode 70 in the anode row 73bA is used.
Corresponds to the brightness reduction anode row.

The above four anode rows 73aA to 73b
B, two anode rows 73aA and 73 located outside
The grid electrodes 66a and 66b to which the accelerating voltage is applied are located on one side to four sides of the anodes bB and the anodes 70 (not shown) adjacent to the anode rows 73aA on the outer side. The anodes 70 of any of the cells 52 are not connected to the anode wiring 78 to which the positive voltage is applied (the anodes in the left anode row (not shown) are connected to the anode wiring 1D). None of the cells 52 in a total of three anode rows 73 located outside are allowed to emit light. Then, an anode row 73c adjacent to them further outside
B and the like are connected to the anode wiring 78 to which a positive voltage is applied.
1B to nB and 1C to nC, the erasing voltage is applied to all the grid electrodes 66 surrounding the respective anodes 70, so that the cells 52 constituted by the respective anodes 70 also emit light. I can't. That is, only the cell 52 constituted by the two rows of anodes 70 indicated by oblique lines in FIG. 6 can emit light at this time t1, and leakage light emission is suitably suppressed.

At a time t2 following the time t1, an acceleration voltage is applied to the grid electrodes 66b and 66c, and at the same time, the light is turned on in the anode columns 73bB and 73cA of the anode wirings 1A to nA and 1D to nD of each row. A predetermined positive voltage is applied to the cell where the anode 70 constituting the power cell 52 exists, and the positive voltage is further applied at time t1 among the 1C to nC of the anode wiring 78 connected to the anode 70 in the anode row 73bA. A predetermined positive voltage is applied to the cell 52 that has been applied and turned on, that is, the cell corresponding to the cell 52 in which a part of the cell 52 has been shaded. Thereby, the anode row 73b
In B and 73cA, the predetermined cell 52 to which a positive voltage is applied to the anode 70 is turned on. At this time, as in the case of time t1, the anode row located on the right side of the anode rows 73bB and 73cA Shading occurs on the right side of each cell 52 in 73cA.

On the other hand, among the cells 52 in the anode row 73bA, those having a positive voltage applied to the anodes 70 are surrounded by the grid electrodes 66b to which the respective anodes 70 in the anode row 73bA are applied with the acceleration voltage. It is lit because it is. At this time, contrary to the case at time t1, the anode 7
The grid electrode 66c is located on the right side of each anode 70 between a part of the grid electrode 66b directly surrounding the zero and the grid electrodes 66a, 66d and the like to which the erase voltage is applied.
However, the grid electrode 66 to which the acceleration voltage is applied is not positioned on the left side, and the grid electrode 66a to which the erase voltage is applied is part of the grid electrode 66b directly surrounding the anode 70. It is located adjacent to. Therefore, at the time t2, the left side of the cell 52 in the anode row 73bA, which is not shown by the diagonally downward slanted line in FIG. 6, is shaded. That is, the portion that was shaded at time t1 is caused to emit light, and the portion that was emitting light is shaded. On the contrary, in this embodiment, the emission of the shaded portion corresponds to auxiliary emission,
The step of causing the auxiliary light emission corresponds to the auxiliary light emission step. As a result, the cells 52 in the anode row 73bA store all grid electrodes 66a to 66n, that is, all the anode rows 7b.
In one scanning period for driving 3aA to 73nA, a part and a remaining part are divided at two successive drive timings to emit light sequentially. However, since the fluorescent display tube 50 is driven at a cycle of, for example, about 60 (Hz) in order to prevent flicker caused by dynamic driving, one scanning period is as short as about 16.7 (ms). Cell 5 which is divided into two and emits light
In No. 2, each shade is compensated for by the afterimage phenomenon, and substantially complete lighting is performed. The anode row 73
The light emission of the cell 52 in the bA is the see-through light emission from the anode arrays 73bB and 73aC which are the drive unit anode arrays at the time t2. The auxiliary light emission is not substantially leaked light since the cell 52 is limited. That is, in the present embodiment, at least a part of the anode row 73 adjacent to the driving unit anode row is directly surrounded by the grid electrode 66 to which the acceleration voltage is applied, so that leakage light emission is actively utilized. By doing so, the occurrence of shade is suppressed.

Then, at the subsequent time t3, the cells 52 in the anode row 73cA where the shade has occurred at the above-mentioned time t2 are also partially emitted in the same manner to compensate for the shade. “S” shown in the timing chart of FIG. 7 indicates that the positive voltage applied to the anode wiring 78 is an auxiliary positive voltage for compensating for such a shadow. In the present embodiment, 1A to n of the anode wiring 78
A, 1C to nC, that is, the anode wiring 78 connected to the anode 70 in the cell 52 completely surrounded by the single grid electrode 66, at the drive timing following the original drive timing, which is not particularly marked. The auxiliary positive voltage is applied, and the voltage is the same as the voltage at the original drive timing.

As described above, in the present embodiment, at time t
In the process of repeatedly executing one scanning period from 0 to the end of the application of the voltage started at time tn, when the scanning is performed while sequentially shifting to two adjacent grid electrodes 66, an acceleration voltage is applied. At the same time, in synchronization with the scanning timing, a predetermined wiring is connected to the anode wiring 78 to which the desired anode 70 is connected among the anodes 70 in the two anode rows 73 located inside the two grid electrodes 66, 66. Is applied, and at that time, the cell 5 in which shading has occurred is applied.
By applying a predetermined positive voltage at the drive timing following the second anode 70, only the desired cell 52 is turned on without causing shade or leakage light emission. In the second and subsequent scanning periods, when it is necessary to compensate for the shadow of the cell 52 in the anode row 73 surrounded by the grid electrode 66n emitted at time tn, it is indicated by a dashed line at time t1. As shown in FIG.
An auxiliary positive voltage is applied to nA. Further, in the present embodiment, the portion excluding the application of the auxiliary positive voltage during the scanning period, that is, the process of applying a positive voltage to the anode wiring 78 at the original (or regular) drive timing is a positive voltage application process. The step of applying an accelerating voltage by scanning while sequentially shifting the grid electrode 66 corresponds to the scanning step. Therefore, the auxiliary light emission step is performed immediately after the positive voltage application step is performed for each anode row 73 while the positive voltage application step is repeatedly performed. However, the auxiliary light emission step is performed at regular driving timing. Grid electrode 66
Since the acceleration voltage applied to is used, the duty ratio is not reduced for performing the auxiliary light emission process.

The fluorescent display tube 50 of this embodiment is manufactured, for example, as follows. First, an aluminum thin film is provided on the substrate 54 by, for example, vapor deposition or the like, and the aluminum thin film is etched to form the anode wiring 78 described above. Next, an insulating layer is formed on the anode wiring 78 in a predetermined pattern by thick film screen printing or the like using, for example, a thick film insulating paste in which a coloring pigment is mixed with low melting glass. At this time, the insulating layer is provided with a through hole for electrically connecting the anode wiring 78 and the graphite layer forming the anode 70 as described above.

The rib-shaped wall 68 is formed on the insulating layer by repeatedly printing, drying and firing a low-melting glass paste containing an inorganic filler such as alumina particles in a predetermined pattern. At this time, in the present embodiment, since the rib-shaped walls 68 are printed and formed in a grid pattern so as to surround the square anodes 70 arranged vertically and horizontally, the width of the rib-shaped walls 68 is equal to all widths. Since the same applies to the position, the conditions for printing and laminating the low-melting glass paste are uniform over the entire surface, and the rib-shaped wall 68 having a uniform height can be easily obtained. Thereafter, for example, a thick film paste containing graphite as a main component and a phosphor paste are sequentially dropped and printed at a predetermined position between the rib-shaped walls 68, and further,
A thick film conductor paste is printed on the top of the rib-shaped wall 68 and is heated at a predetermined temperature to form the anode 70 and the phosphor layer 7.
2. A grid electrode 66 is formed. Further, the anode terminal 60
And a filament supporting frame 74, a cathode 76, and the like are provided at predetermined positions, and the spacer glass 56 and the cover glass plate 58 are glass-sealed to form a vacuum container.
The fluorescent display tube 50 is obtained. The manufacturing method is substantially the same as that of a well-known conventional fluorescent display tube, and is not necessarily required for understanding the present embodiment.

Here, in this embodiment, a pair of anode rows 73aB and 73bA, 73bB and 73cA, .about.73mB, which are drive unit anode rows, are formed by a pair of grid electrodes 66, 66 which are electrically insulated from each other. And the rest of the outer periphery of the anode 70 in the anode rows 73aB and 73nA and the anode rows 73aB and 73bA, 73bB and 73
anode rows 73aA and 73bB, 73bA and 73cB adjacent to both sides of cA, ~ 73nB and 73nA,
７３73 mA and 73 nB respectively surrounding at least a part of the outer periphery of the anode 70 and simultaneously applying an acceleration voltage to the pair of grid electrodes 66, 66 to thereby form a pair of anode rows 73 aB and 73 bA, 73 bB and 73 b.
The fluorescent display tube 50 having a grid structure in which the entire circumference of the anode in cA, ~ 73 mB and 73 nA is surrounded by grid electrodes 66, 66 to which the accelerating voltage is applied, and which can make the cell pitch sufficiently small, When dynamic driving is performed in a quad matrix system, the anode 70 in the anode row 73, which is a driving unit anode row that emits light sequentially.
Of the pair of grid electrodes 66 to which a predetermined accelerating voltage has been applied in the scanning step, an erase voltage positioned adjacent to the one directly surrounding the anode 70 in the driving unit anode row is applied. The anode rows 73aA, 73bA, -7 whose brightness is partially reduced in the positive voltage application step due to the influence of the negative electric field formed by the other grid electrode 66
In the auxiliary light emission step, the grid electrode 6 directly surrounding the anode 70 in the 3 nA (brightness reducing anode row) and the other grid electrode 66 and the anode 70 in the brightness reducing anode row.
When the auxiliary positive voltage is applied at the subsequent drive timing when a predetermined acceleration voltage is applied to the anode 6, the anode 70 whose brightness has been reduced emits auxiliary light.

[0050] Therefore, the anode that causes shading due to the lack of the grid electrode 66 functioning as an auxiliary grid for suppressing the influence of the negative electric field formed by the grid electrode 66 to which the erase voltage is applied is provided. Reference numeral 70 indicates auxiliary light emission in the auxiliary light emission step. At this time, the shading is caused by the grid electrode 6 to which the erasing voltage is applied adjacent to the grid electrode 66 to which the accelerating voltage is applied, which directly surrounds the anode 70 in the peripheral portion of the anode 70.
6 is generated at the right end where the grid electrode 6 is located, and a predetermined acceleration voltage is applied to the grid electrode 66 and the grid electrode 66 surrounding at least a part of the anode 70. When a positive voltage is applied, the other grid electrode 6
Since an erasing voltage is applied to the grid electrode 66 located on the opposite side to the grid electrode 6, the other grid electrode 66 is exclusively affected by the negative electric field formed by the grid electrode 66.
The right part of the side is lit. As a result, a part and the remaining part of the anode 70 whose brightness has been reduced are continuously illuminated, and the whole is substantially uniformly lit by the afterimage phenomenon. Therefore, in the fluorescent display tube 50 in which the cell pitch can be sufficiently reduced by surrounding a part of the outer periphery of the anode 70 with the adjacent grid electrode 66,
Generation of shading due to the pixel arrangement is suitably suppressed.

Furthermore, in this embodiment, the auxiliary light emitting step is appropriately performed during the regular scanning timing within one scanning period, so that the same high duty ratio as that of the normal anode quad matrix driving is maintained. Along with
Since the scan timing of the grid electrode 66 is not changed at all when the auxiliary light emission step is not performed, no change in the drive circuit or wiring is required, and only a change in the drive program (timing) of the anode wiring 78 is sufficient. There is also.

Next, another embodiment of the present invention will be described. In the following description, the same parts as those in the above-described embodiment will not be described.

FIG. 8 is a view for explaining another grid structure of the fluorescent display tube, and corresponds to FIG. 6 of the above-described embodiment. This grid structure is substantially the same as that of the fluorescent display tube 50, in which a plurality of anodes 70 are arranged in a matrix so as to be aligned vertically and horizontally, and four anode wires 78 are provided for each row of the anodes 70. And a plurality of anode rows 73aA, 73a arranged along a direction orthogonal to the longitudinal direction of the substrate 54.
Each anode 70 in 3aB, -73nB is connected to the same wiring every fourth row. Further, the plurality of anode rows 73
Represent one grid electrode 80a, 80b,
0n. As in the case of FIG. 6, this fluorescent display tube is also scanned in the right direction sequentially from the pair of grid electrodes 80a and 80b on the left side and driven by the anode quad matrix system.

At this time, in this embodiment, the anode row 73aA located on the left side of the pair of anode rows 73 surrounded by
The anode 70 in 73 bA, 73 nA is surrounded on one side on the left side by the grid electrode 80 located on the left side, while the anode rows 73 aB, 73 bB,-73 located on the right side.
The anode 70 in nB is surrounded all around. Therefore, similarly to the above-described embodiment, a predetermined acceleration voltage is applied to the pair of mutually adjacent grid electrodes 80, 80 to sequentially scan, and at the same time, the grid electrodes 80 are surrounded by the grid electrodes in synchronization with the scanning timing. When a predetermined positive voltage is applied to the anode wiring 78 connected to the pair of anode rows 73 located inside of the anode rows 73 of the row, predetermined cells of the pair of anode rows 73 located inside of 52 (anode 70) emits light. For example, at the timing when the acceleration voltage is applied to the grid electrodes 80a and 80b, the anode row 73
As illustrated in FIG.
The left end of one anode row 73aB located on the left side of the pair of anode rows 73aB and 73bA is shaded.

Therefore, in this embodiment, for example, as shown in FIG. 9, a pair of anode rows 73aA and 73aB,
Anode rows 73aB, 73bB, -73 located on the right side of 3bA and 73bB, -73nA and 73nB
1B-nB, 1D-n of anode wiring 78 connected to nB
An auxiliary positive voltage is sequentially applied to D. At this time, at time t2 following time t1 at which the positive voltage application step is performed for the anode row 73aB, no acceleration voltage is applied to the grid electrode 80a surrounding the anode row 73aB where shading occurs. Therefore, in this embodiment,
At time t1, as shown for 1D to nD of anode wiring 78, the auxiliary light emission step is performed prior to the positive voltage application step.

That is, at time t 1, the anode wiring 7
The anode 70 in the anode row 73bB connected to 1D of No. 8
Since the entire circumference is surrounded by the grid electrode 80b, light is emitted. A part of the grid electrode 80b directly surrounding the anode 70 and the grid electrode to which an erase voltage is applied adjacent to the right side thereof are applied. 80c
Since the grid electrode 80 to which the acceleration voltage is applied does not exist, the right end of the anode 70 in the anode row 73bB is shaded by the influence of the negative electric field formed by the grid electrode 80c. Then, at the following time t2,
When the positive voltage is applied to the anode wires 1A to nA and 1D to nD at the same time when the acceleration voltage is applied to the grid electrodes 80b and 80c, the anodes in the anode row 73bB at the time t1 are similar to the anode row 73aB at time t1. Reference numeral 70 indicates that the left end is shaded. Therefore, the cells 52 in the anode row 73 located on the right side of the pair of anode rows 73 surrounded by the grid electrodes 80 are partially and partially divided at the two drive timings as in the above-described embodiment. Light is emitted, and substantially the entire light is emitted by the afterimage phenomenon. Note that, in FIG.
Although the left end of the anode 70 in aB is shown as being shaded, this shade is caused by the grid electrode 80 (not shown) positioned on the left side of the grid electrode 80a and the grid electrode 80 (not shown).
At the timing when the acceleration voltage is applied to “a”, the auxiliary light emission is compensated by the application of the auxiliary positive voltage to 1B to nB of the anode wiring 78.

FIG. 10 is a diagram showing a grid structure according to still another embodiment. In this embodiment, the cells or anodes 82 are formed in a hexagonal shape, and are arranged in a staggered manner so that the intervals are the same as any other adjacent anodes 82. That is, the anodes 82 are arranged along a straight line in the row direction, but are bent and arranged in the column direction along a direction substantially orthogonal to the straight line, and are bent in the column direction by the bent anodes 82. A plurality of anode rows 84aA, 84aB,... The hexagonal anode 82 is entirely surrounded by a plurality of grid electrodes 86 of the same shape provided on the substrate 54 so as to form a honeycomb structure as a whole. The plurality of grid electrodes 86 correspond to two adjacent anode rows 84 arranged in the column direction.
For each row unit, those surrounding the entire circumference or a part of the anode 82 in each row are connected to each other. More specifically, the grid electrode 86a is connected to the anode row 84aA.
Side, anode row 84aB located on the right side of each anode 82
And the three grids located on the left side of each of the anodes 82 in the anode row 84bA, and the other grid electrodes 86 similarly have the anodes in one row of the predetermined anode row 84. 82 and the predetermined anode row 8 of each anode 82 in a pair of anode rows 84 adjacent to both sides of the predetermined anode row 84.
It is provided so as to surround three sides located on the four sides.

The anodes 82 have a hexagonal shape and are closely arranged. Therefore, as shown in the drawing, the arrangement of the anodes 82 in the direction along the one direction is staggered. Although it is not strictly arranged along the one direction, the arrangement direction is bent along the entire direction along the one direction. That is, in the present application, the "rows of cells or anodes along one direction" include those in which the anodes 82 are arranged along one direction as a whole.

The fluorescent display tube having the above-mentioned grid structure is also driven according to the timing chart shown in FIG. Therefore, as shown in FIG. 10, for example, the acceleration voltage is applied to the grid electrodes 86a and 86b, and at the same time, 1B to nB, 1C to
By applying a positive voltage to nC, the anode rows 84bA and 84b
When light is emitted from a predetermined anode 82 cell in B, the anode row 8 surrounding the entire periphery of the anode 82 is formed on the grid electrode 86b.
4bB, the right end is shaded by the influence of the negative electric field formed by the grid electrode 86c to which the erase voltage applied to the right side is applied. However, in the auxiliary light emission step following the positive voltage application step, the auxiliary positive voltage is applied. As a result, the shadow is compensated for, and substantially the entire cell emits light based on the afterimage phenomenon.

FIG. 11 shows the fluorescent display tube 50 shown in FIG.
13 is a timing chart illustrating another driving method. In the present embodiment, the auxiliary positive voltage is applied to the anode wiring 78 at the same drive timing as the timing chart shown in FIG. 7, but the application time of the auxiliary positive voltage is the application time in the positive voltage application step, that is, For example, the positive voltage application time to the anode wires 1B to nB and 1C to nC of the anode wiring 78 at the time t1 is set shorter. As described above, in the grid structure shown in FIG. 6 and the like, some cells 52 are shaded by the influence of the negative electric field formed by the grid electrode 66 to which the erase voltage is applied. The brightness does not always drop by half. This is the same in the auxiliary positive voltage application step. Therefore, when the application time of the auxiliary positive voltage is the same as that in the positive voltage application step, the luminance of the cell 52 to which the auxiliary positive voltage is applied may become too high. In such a case, if the application time of the auxiliary positive voltage is shortened as shown in FIG. 11, the luminance of the two types of cells 52 can be made substantially the same, and the substantially uniform luminance can be obtained over the entire surface of the fluorescent display tube 50. Can be obtained.

While the embodiment of the present invention has been described in detail with reference to the drawings, the present invention can be embodied in still another embodiment.

For example, in the above-described embodiment, the case where the present invention is applied to the fluorescent display tube 50 driven by a so-called anode quad matrix system has been described. Multiple anode rows 7 or more
3 and simultaneously apply a predetermined acceleration voltage to the plurality of grid electrodes 66 and the like surrounding the plurality of grid electrodes 66 for scanning, and a plurality of anode rows 7 surrounded by the grid electrodes 66 and the like to which the acceleration voltage is applied.
3, a predetermined anode 70 in the anode row 73 located inside.
By applying a predetermined positive voltage to the anode wiring 78 to which is connected in synchronization with the scanning timing, a predetermined cell 52 and the like are sequentially turned on. The present invention can be applied to a driving method of a fluorescent display tube provided with four or more anode wirings 78.
That is, the present invention can be applied to a fluorescent display tube in which five or more anode wirings 78 are provided for each row.

In the embodiment, the width of the rib-shaped wall 68 is about 60 to 150 (μm) and the height is about 150 to 300 (μm), and each of the anodes 70 surrounded by the rib-shaped wall 68 is formed. The length of the side was about 400 (μm), but these dimensions,
It is appropriately changed according to a desired cell pitch, display definition, or the like.

In the embodiment, the shape of the cells 52 and the like (the anodes 70 and 82 and the like) is square or hexagonal, but the shape may be changed as appropriate, and other polygonal shapes such as triangles and the like may be used. It may be formed in a circular shape or the like.
However, in order to increase the aperture ratio of the cell as much as possible, a square shape or a hexagonal shape is most preferable.

Further, in the embodiment shown in FIG. 11, the application time of the auxiliary positive voltage is shortened in order to lower the luminance of the cell 52 to which the auxiliary positive voltage is applied to the same level as the other cells 52. On the other hand, when the luminance of the cell 52 to which the auxiliary positive voltage is applied can be lower than that of the other cells 52, the application time of the positive voltage in the positive voltage application step may be shortened. Further, the auxiliary positive voltage is set to the same potential as the positive voltage applied in the positive voltage application step, but may be set to a different potential as long as appropriate luminance is obtained.

For example, in a grid structure as shown in FIG. 10, the anode row 8 for which an auxiliary positive voltage needs to be applied is required.
The arrangement of the grid electrode 86 to which the erase voltage is applied adjacent to a part of the grid electrode 86 directly surrounding each of the anodes 82 in the cell 4 differs between the cell located on the left side and the cell located on the right side. Because of the difference, the shading may be different. In such a case, it is preferable to adjust the luminance by setting the application time and voltage of the auxiliary positive voltage to be different for each row.

In the embodiment shown in FIG. 10, 1A to nA and 1D to nD of
B to nB and 1C to nC are 1
Although the positive voltage has been applied simultaneously at the scan timing, the combination may be changed. That is, 1A to n
A and 1B to nB and 1C to nC and 1D to nD may be driven as one set, respectively. In the case where the combination causes different shades on the rear side in the scanning direction, the auxiliary light emitting step is performed prior to the positive voltage applying step.

Although not specifically exemplified, the present invention can be variously modified without departing from the spirit thereof.

[Brief description of the drawings]

FIG. 1 is a diagram showing a main part configuration of a conventional fluorescent display tube;
(a) is a plan view, and (b) is a perspective view.

FIG. 2 is a diagram showing a grid structure of another conventional fluorescent display tube.

FIG. 3 is a diagram showing a grid structure of still another conventional fluorescent display tube.

FIG. 4 is a diagram showing a structure of a fluorescent display tube according to an embodiment of the present invention, with a part thereof being cut away.

5 is a perspective view showing a structure of a grid electrode, a cell and the like provided on a display surface of the fluorescent display tube of FIG. 4;

6 is a diagram illustrating the shape of grid electrodes and the connection state of anodes of the fluorescent display tube of FIG. 4;

FIG. 7 is a timing chart illustrating a driving method of the fluorescent display tube of FIG.

FIG. 8 is a plan view showing a structure of a grid electrode of a fluorescent display tube according to another embodiment of the present invention.

FIG. 9 is a timing chart illustrating a driving method of the fluorescent display tube of FIG.

FIG. 10 is a plan view showing a structure of a grid electrode of a fluorescent display tube according to still another embodiment of the present invention.

FIG. 11 is a timing chart for explaining another driving method of the fluorescent display tube of FIG. 4;

[Explanation of symbols]

 50: fluorescent display tube 66: grid electrode 70: anode 73: anode row

Continuation of front page (72) Inventor Kiyoji Matsumoto 2160, Yatsunami, Yasu-cho, Asakura-gun, Fukuoka Prefecture 2160 Kyushu Noritake Co., Ltd. (56) References JP-A-56-32181 (JP, A) (58) Field surveyed (Int.Cl. ⁷ , DB name) G09G 3/30

Claims (1)

(57) [Claims] 1. A plurality of rows along a first direction, each of which has a phosphor layer for forming a dot-shaped pixel fixed to a surface thereof and spaced apart from a display surface of a substrate by a predetermined distance.
A plurality of anodes arranged in a plurality of rows along a second direction intersecting the direction of
A rib-like wall protruding above the phosphor layer so as to be continuous with each other in a direction, and formed on the top of the rib-like wall along the first direction and electrically insulated from each other. A drive unit anode row serving as a unit driven at a time among a plurality of anode rows in the plurality of rows along the first direction, a pair of the drive unit anode rows and a pair of adjacent anode rows on both sides of the drive unit anode rows. A second electrode provided between one of the adjacent anode rows and positioned so as to surround at least a part of an outer periphery of each of the plurality of anodes constituting the driving unit anode row and one of the adjacent anode rows. One grid electrode and the first grid of the outer periphery of each of the plurality of anodes that are provided between the driving unit anode row and the other of the adjacent anode rows to form the driving unit anode row. Constituting the remainder not surrounded by the electrodes and the other of the adjacent anode rows A plurality of grid electrodes including a second grid electrode positioned so as to surround at least a part of the outer periphery of each of the plurality of anodes; and a cathode positioned above the plurality of grid electrodes. A plurality of anode wirings provided in a predetermined number for each of the plurality of rows of anodes located along the second direction, and a plurality of anode wirings respectively connected to the anodes in the predetermined number for each row. In the fluorescent display tube, a predetermined acceleration voltage is applied to two or more adjacent predetermined grid electrodes surrounding the entire circumference of each anode in the driving unit anode row of the plurality of grid electrodes, and a predetermined acceleration voltage is applied to other grid electrodes. A scanning step of controlling the electrons generated from the cathode by sequentially applying the erasing voltage to sequentially scan the driving unit anode rows, and surrounded by the grid electrode to which the accelerating voltage is applied in the scanning step. Place By applying a predetermined positive voltage to a predetermined drive unit anode rows of connected the anode wire in synchronism with scanning timing of the scanning process,
A positive voltage applying step of sequentially emitting light from the phosphor layers on the predetermined drive unit anode row, wherein the predetermined drive unit anode row includes the predetermined drive unit anode row. Of the negative electric field formed by another grid electrode to which the erase voltage is applied, which is located adjacent to one of the predetermined grid electrodes to which the acceleration voltage is applied and which directly surrounds the predetermined drive unit anode row. The predetermined acceleration voltage is applied to the other grid electrode and the predetermined grid electrode that directly surrounds the brightness reduction anode, to the row of the brightness reduction anodes whose brightness is partially reduced in the positive voltage application step due to the influence. A driving method for driving the fluorescent display tube, further comprising: an auxiliary light emission step of applying a predetermined auxiliary positive voltage in synchronization with the timing to perform auxiliary light emission of the brightness reduction anode.