JP3100699B2 - Method for etching compound semiconductor wafer - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for etching a compound semiconductor wafer, and more particularly, to a method for etching a warped wafer with good uniformity.

[0002]

2. Description of the Related Art When a silicon wafer is finished to a predetermined thickness, a polishing method is generally employed. However, compound semiconductor wafers (for example, GaAs
In the case of (e.g., a layer epitaxially grown), since it usually has a large warp, the polishing method cannot be used. Therefore, when a compound semiconductor wafer is finished to a predetermined thickness, an etching method is employed. Conventionally, as shown in FIG.
The glass plate (or silicon wafer) 103 was attached to the substrate by using the above method, and these were simply immersed in a predetermined etching solution stored in an etching tank to perform etching. The wafer surface (epitaxial growth surface) 101a is masked with the wax 102, and the wafer back surface 101b side is actually etched.

[0003]

However, since the above-mentioned conventional etching method is merely immersed in an etching solution, the uniformity of etching is poor at ± 40 μm or more, and the etching amount (and thus the finished thickness) is reduced. There is a problem that it cannot be controlled accurately. In addition, the internal stress of the wafer changes during the process of etching the back surface 101b of the wafer. However, since the wafer 101 is fixed with the wax 102, the stress caused by the change of the internal stress cannot be released. For this reason, the wafer 101 cracks,
There are problems that the number of man-hours in the post-process increases and that the yield decreases. In addition, the wafer 101 is
Wafer 1 on the wafer back surface 101b side
Since 02 may adhere, the wax 102 adhered to the wafer back surface 101b must be removed before starting the etching, and there is a problem that workability is poor.

SUMMARY OF THE INVENTION An object of the present invention is to provide a method for etching a compound semiconductor wafer which can etch a warped wafer with good etching accuracy, without cracking, and with good workability.

[0005]

In order to achieve the above object, a method for etching a compound semiconductor wafer according to the present invention provides an ultraviolet-curable pressure-sensitive adhesive sheet (hereinafter, referred to as a "UV sheet") having a peripheral portion held by a frame jig. ), A compound semiconductor wafer to be etched is attached, the compound semiconductor wafer is mounted on a predetermined carrier cassette via the frame jig, and the carrier cassette is rotated with a predetermined etching solution filled in an etching tank. The compound semiconductor wafer is etched by being immersed while being rocked, and the thickness of the compound semiconductor wafer is reduced in a wafer state. In one embodiment of the method for etching a compound semiconductor wafer, the compound semiconductor wafer is formed by epitaxially growing a GaAlAs layer on the surface of a GaAs substrate.
The surface side of the layer is attached to the UV sheet, and the back side of the GaAs substrate of the compound semiconductor wafer is etched with the etching solution.

[0006]

The compound semiconductor wafer mounted on the carrier cassette is etched by rotating and swinging the carrier cassette in a predetermined etching solution, so that the etching solution constantly stirred during the etching time. Contact the back of the wafer. Therefore, the uniformity of the etching is improved, and the accuracy of the etching amount is improved.

Also, the internal stress of the wafer changes during the process of etching the back surface of the wafer to reduce the thickness of the wafer in the wafer state, but the UV sheet is deformed in accordance with the warpage of the wafer. The stress associated with the change in is alleviated. Therefore, the wafer is not cracked by the etching, and an increase in the number of steps in a later process and a decrease in the yield do not occur.

[0008] Further, the UV sheet has tackiness in a state where it is not irradiated with ultraviolet rays. Therefore, it can be easily attached by bringing the compound semiconductor wafer to be etched into contact. Thereby, the surface of the compound semiconductor wafer is masked. Unlike the related art, there is no need to remove the wax on the back surface of the wafer, so workability is improved. After the etching, the adhesiveness of the UV sheet can be reduced by irradiating ultraviolet rays. Therefore, the wafer is easily removed.

[0009]

The method for etching a compound semiconductor wafer according to the present invention will be described in detail below with reference to examples.

First, as shown in FIG. 1A, a compound semiconductor wafer 1 to be etched is attached to a frame jig 3 by using a UV sheet 2 (FIG. 1B is a view similar to FIG. 1A). AA 'section is shown.) In this example, the compound semiconductor wafer 1 is obtained by epitaxially growing a GaAlAs layer on the surface of a GaAs substrate, and the wafer surface 1a side, that is, the GaAlAs layer side is attached to the adhesive surface of the UV sheet 2. Then, the peripheral portion of the UV sheet 2 is
To be held. Since the UV sheet 2 has adhesiveness in a state where it is not irradiated with ultraviolet rays, the UV sheet 2 can be easily attached by bringing the compound semiconductor wafer 1 into contact.
Thereby, the wafer surface 1a is masked. Unlike the related art, there is no need to remove the wax on the back surface of the wafer, so that the workability can be improved.

Next, the compound semiconductor wafer 1 is etched using an automatic etching apparatus 100 shown in FIG.
(Note that FIG. 1A shows the device 100 viewed from above, and FIG. 2B shows the device 100 viewed from the front.) The automatic etching apparatus 100 includes a Pyrex etching tank 4, an overflow type washing tank 40, and a quick dump rinse type washing tank 50.
So that the carrier cassette 5 can be driven by the arm 6 to be sequentially immersed in each of the tanks 4, 40, 50. The etching tank 4 has a double structure, and the inner wall 4
Many small holes 13 are provided in a. The etching tank 4 is previously filled with an alkaline etching solution. Then, the etching solution is circulated through the pipes 10 and 11 by the circulation-type temperature controller 9 to adjust the temperature of the etching solution to 30 ° C. ± 2 ° C., and an arrow “→” in FIG.
As shown in the figure, the etching solution is ejected from the small hole 13 of the inner wall 4a into the tank.

When performing etching, the compound semiconductor wafer 1 is mounted on a carrier cassette 5 via a frame jig 3 as shown in FIG. FIG. 2 shows an example in which only one set of the frame jig 3 (and the wafer 1) is mounted for simplicity. Then, arm 6
The carrier cassette 5 is immersed in the etching bath 4 to etch the compound semiconductor wafer 1. During the etching time, the carrier cassette 5 is swung up and down by the arm 6 and the carrier cassette 5 is rotated by the viton ring 7 and the roller 8 as shown by a double arrow "⇒" in FIG. Thus, the etching liquid that is constantly stirred during the etching time can be brought into contact with the wafer back surface 1b. Therefore, the uniformity of the etching can be improved, and the accuracy of the etching amount can be improved. Actually, the etching uniformity could be kept within ± 10 μm, that is, within 10% of the total etching amount. Also, wafer back surface 1
The internal stress of the wafer 1 changes in the process of etching the wafer b to reduce the thickness of the wafer in the wafer state.
Since the V sheet 2 is deformed in accordance with the warpage of the wafer 1, it is possible to reduce the stress caused by the change in the internal stress.
Therefore, it is possible to prevent the wafer 1 from being cracked by the etching, and to prevent an increase in the number of steps and a decrease in the yield in the post-process. After the etching is performed for a predetermined time, the carrier cassette 5 is taken out of the etching bath 4 by the arm 6 and immersed sequentially in the washing baths 40 and 50 to wash the compound semiconductor wafer 1 with water. Finally, UV light is applied
The adhesiveness of the sheet 2 is reduced, and the compound semiconductor wafer 1 is removed.

[0013]

As is apparent from the above description, the method of etching a compound semiconductor wafer of the present invention involves etching by attaching a compound semiconductor wafer to be etched to a UV sheet whose peripheral portion is held by a frame jig. , Workability can be improved. In addition, the compound semiconductor wafer is mounted on a predetermined carrier cassette via the frame jig, and immersed in a predetermined etching solution filled in an etching tank while rotating and swinging the carrier cassette to form the compound semiconductor wafer. Since the semiconductor wafer is etched, the agitated etchant can always be brought into contact with the wafer. Therefore, the uniformity of the etching can be improved, and the etching accuracy can be improved. Also, in the process of etching the back surface of the wafer to reduce the thickness of the wafer while keeping it in a wafer state,
Stress caused by a change in the internal stress of the wafer can be reduced by deformation of the UV sheet. Therefore, it is possible to prevent an increase in the number of steps and a decrease in the yield in the post-process.

[Brief description of the drawings]

FIG. 1 is a view showing a state where a compound semiconductor wafer is attached to a UV sheet in order to carry out the present invention.

FIG. 2 is a diagram showing a state in which the compound semiconductor wafer is etched.

FIG. 3 is a view showing an automatic etching apparatus used to carry out the present invention.

FIG. 4 is a diagram illustrating a conventional method for etching a compound semiconductor wafer.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 Compound semiconductor wafer 1a Wafer front surface 1b Wafer back surface 2 UV sheet 3 Frame jig 4 Etching tank 5 Carrier cassette 6 Arm 7 Viton ring 8 Roller 9 Circulation temperature controller 10,11
Piping 40,50 Rinse tank 100 Automatic etching equipment

Claims (2)

(57) [Claims] 1. A compound semiconductor wafer to be etched is attached to an ultraviolet-curable adhesive sheet whose peripheral portion is held by a frame jig, and the compound semiconductor wafer is mounted on a predetermined carrier cassette via the frame jig. Then, the carrier cassette is immersed in a predetermined etching solution filled in an etching tank while rotating and swinging to etch the compound semiconductor wafer, thereby reducing the thickness of the compound semiconductor wafer in a wafer state. A method for etching a compound semiconductor wafer, comprising: 2. The method for etching a compound semiconductor wafer according to claim 1, wherein said compound semiconductor wafer is formed on a surface of a GaAs substrate by a GaAs substrate.
The s layer is epitaxially grown, and the surface side of the GaAlAs layer of the compound semiconductor wafer is attached to the ultraviolet curing adhesive sheet, and the back side of the GaAs substrate of the compound semiconductor wafer is etched with the etching solution. Method for etching a compound semiconductor wafer.