JP3085840B2 - Multiplexer - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a technique for countermeasures against a failure in a multiplexing apparatus that realizes a line concentrating and cross-connect function.

[0002]

2. Description of the Related Art As a system for performing communication between apparatuses using a loop-shaped transmission line, for example, Japanese Patent Laid-Open No. 2-294 is disclosed.
No. 136 is known.

Further, in this system, a plurality of interface circuits are connected to each other by two transmission lines of a working system and a protection system for transmitting a signal in a direction opposite to the working system. When a failure occurs in a specific location, the active transmission line and the standby transmission line are connected by a device adjacent to the failed location to avoid the failed location.

[0004]

A multiplexing device for realizing a line concentrating and cross-connect function is provided by looping a plurality of interface circuits each containing an external transmission line included in an external line. It can be realized by connecting the internal lines between the interface circuits using a transmission line in which the interface circuits are connected in a loop and connected in a loop.

FIG. 11 shows an example of the configuration of such a multiplexer.

In the figure, reference numeral 100 denotes a multiplexing device. Each interface circuit 102, 103, 104, 105, 10
Numeral 6 is connected by two loop-shaped buses, A bus 107 and B bus 108, whose transmission directions are opposite to each other. On each bus, communication cells which each interface circuit sends to other interface circuits are time division multiplexed. An opening 109 is set in each bus. The opening is the most upstream part of the signal flow on the bus. The signal on the A bus is directed from the interface circuit 102 in which the opening is set to the interface circuit 106, and the interface on the B bus is the interface in which the opening is set. It flows only from the circuit 106 to the interface circuit 102. These signals are discarded when they return to the opening 109. By providing such an opening, it is not necessary for each interface circuit to recognize and discard a signal transmitted by itself in the past in order to prevent recirculation.

On the other hand, since such an opening is provided,
In such a multiplexing apparatus, for example, the interface circuits 104 to 103, 10
2 is set on the B bus 108 and sent from the interface circuit 104 to the interface.
An internal line for sending a communication cell to the communication circuits 105 and 106 is set on the A bus 107. Here, the setting of the opening and the setting of the internal line are performed by the connection line control device 101 via the control bus 110 to the interface circuits 102 and 106 for setting the opening, which are received on a specific bus. Specify cell discarding, or
This is performed by designating a bus for transmitting a communication cell to the communication circuit.

In such a multiplexing apparatus, for example, when a failure occurs in the interface circuit 103, as shown in FIG. 12, a signal flow sequentially flowing through the other interface circuits is secured. For this purpose, it is necessary to move the opening of each bus to the position of the interface circuits 102 and 104 one downstream of the failed interface circuit 103. In this case, since the opening moves, the internal line passing through the failed interface circuit 103 needs to switch the bus for setting the internal line. For example, the interface circuit 1
An internal line for transmitting a communication cell from 04, 105, 106 to the interface circuit 102 is from the B bus 108 to the A
It is necessary to switch to the bus 107. Also, the interface circuits 102 to 104, 10
It is necessary to switch from the A bus 107 to the B bus 108 for the internal line for sending a communication cell to the communication cells 5 and 106. The movement of the opening and the switching of the bus for setting the internal line are performed by the connection line control device 101 controlling each interface circuit via the control bus 110.

Here, if the connection line control device 101 and the control bus 110 are configured so that the control of the movement of the opening and the switching of the bus for setting the internal line can be performed at a time, the size and the size of the device are increased. Normally, such control is sequentially performed for each interface circuit because it leads to price increase. For this reason, the communication cell is inevitably lost until the switching is completed for all the interface circuits.

Therefore, the present invention is as described above. In a multiplexing apparatus using two loop-shaped transmission lines in which transmission directions are reversed in each of which an opening is set, a bus for setting an internal line, which is performed in order to avoid a failure point when a failure occurs. It is an object of the present invention to further reduce the amount of lost communication cells until the completion of the switching.

[0011]

To achieve the above object,
The present invention provides, for example, a multiplexer for accommodating a plurality of external transmission lines each including at least one external line for transmitting a communication cell, and performing cross-connection between the plurality of external lines on the accommodated external transmission lines. A plurality of interface circuits each accommodating one external transmission line, and two buses connecting the plurality of interface circuits in a loop shape, the transmission directions of which are opposite to each other, and 2 above
Two openings, which are non-transmission points of communication cells, which are virtually provided, are respectively set on two loops constructed by the system bus, and a specific interface circuit and another specific interface are provided. A control device for setting an internal line for transmitting a communication cell to a circuit on a bus of one of the systems according to a position of the two interface circuits with respect to the two openings, Each of the interface circuits has monitoring means for monitoring a traffic volume of a communication cell transmitting on the set internal line and reporting the traffic to the control device, wherein the control device is provided with one of the interface circuits. Means for resetting the two openings to a position immediately before the interface circuit one downstream downstream with respect to the transmission direction of the corresponding loop of the failed interface circuit when a failure occurs in the interface circuit. Failed Intafe - to internal lines which via the scan circuit does not exist, successively, failed Intafe - of the internal line that via the scan circuit,
For an interface circuit transmitting a communication cell to an internal line having the largest amount of traffic reported by the monitoring means of each interface, the interface circuit transmitting the communication cell to the internal line for which the interface circuit transmits a communication cell. Means for switching a bus system for setting each internal line passing through the failed interface circuit.

[0012]

According to the multiplexing device of the present invention, each of the interface circuits monitors the traffic volume of the communication cell transmitting on the set internal line, and reports the traffic to the control device. On the other hand, when a failure occurs in any of the interface circuits, the control device causes the two openings to be located one downstream of the failed interface circuit in the transmission direction of the corresponding loop. It is set at the position immediately before the interface circuit, and the internal lines passing through the failed interface circuit are sequentially changed until the internal line passing through the failed interface circuit no longer exists. The interface circuit transmitting the communication cell to the internal line having the largest traffic amount reported by the monitoring means of each interface has the faulty interface among the internal lines transmitting the communication cell. Switch the bus system for setting each internal line passing through the communication circuit.

That is, based on the report of the traffic volume from each interface circuit, the interface circuit using the internal line with a large traffic volume is changed in the setting bus of the internal line to avoid a failure. Therefore, it is possible to further reduce the amount of communication cells lost until the completion of the switching of the bus for setting the internal line, which is performed in order to avoid a failure location.

[0014]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiments of a multiplexing apparatus according to the present invention will be described below.
A description will be given of an example in which the present invention is applied to an ATM multiplexer that accommodates a plurality of transmission lines including an ATM line and performs cross-connection between ATM lines by exchanging the ATM line.

FIG. 1 shows the configuration of an ATM multiplexer according to this embodiment.

In the figure, reference numeral 100 denotes an ATM multiplexer.
As shown in the figure, the multiplexing apparatus 100 includes a connection line control device 101 for performing line management, a control bus 110, and interface circuits 102, 103, 104, 105, and 106. Further, two buses which connect the interface circuits 102 to 106 sequentially in a loop shape and have opposite transmission directions, that is, an A bus 107 and a B bus 108 are provided.

Each of the interface circuits 102 to 106
Are the network 1000 and the ATM terminal 1 respectively.
A transmission line 1302 including an ATM line between 100 and 100 etc.
１1306, and exchanges ATM cells with them. Also, on the buses 107 and 108,
An internal line between each interface circuit is set, and each interface circuit receives an A signal input from an accommodated ATM line.
The TM cell is time-division multiplexed on a bus in which an internal line to another interface circuit accommodating the ATM line of the destination of the ATM cell is set. One internal line connecting the two interface circuits is a one-way line that transmits ATM cells from one to the other. Accordingly, two internal lines are set for transmitting and receiving ATM cells between the two interface circuits.

Each of the interface circuits separates ATM cells addressed to itself from the bus on which the internal line is set, and sends out the ATM cells to the ATM line in which it is accommodated. Here, in the present embodiment, each of the interface circuits 102 to 106 includes:
A monitoring unit 1200 for monitoring the traffic volume of the output ATM cell is provided for each internal line. This traffic amount is transmitted to the connection line controller 101 via the control bus 110.
Sent to The traffic volume can be determined, for example, by counting the number of ATM cells output to the internal line during a predetermined unit time.

As described above, each bus 1
07 and 108 have openings 109a and 109b, respectively.
Is set. The opening is the most upstream part of the signal flow on the bus. The signal on the A bus is directed from the interface circuit 102 in which the opening is set to the interface circuit 106, and the interface on the B bus is the interface in which the opening is set. It flows only from the circuit 106 to the interface circuit 102. These signals are discarded when they return to the opening 109.

A maintenance terminal device 301 is connected to the connection line control device 101.
According to the operator's designation instructed via the maintenance terminal device 301, such an opening, an identification number of an interface circuit, an internal line, and an ATM at the time of congestion are transmitted via the control bus 110. Cell processing procedures and the like are set for each interface circuit. The setting of the internal line is performed for each interface.
This is performed by designating a bus for transmitting an ATM cell for each destination to the network circuit.

FIG. 2 shows the structure of an ATM cell.

As shown, the ATM cell 202 is 53
Byte. Each interface circuit transfers a cell 200 to which an additional header 201 for performing routing on the bus is added to the ATM cell 202. Additional header 2
In 01, an identification number of a destination interface circuit, a used bus (A bus or B bus), processing information of an ATM cell at the time of congestion, and the like are set.

Next, how an internal line is set in such a configuration will be described.

As shown in FIG. 1, the opening 109a of the A bus 107 is placed on the interface circuit 106 and the B bus 1
A case where the opening 109b 08 is set in the interface circuit 102 will be considered.

The internal lines for each interface circuit are mesh-connected. That is, an internal line is connected from one interface circuit to all other interface circuits.

Now, in this case, as shown in FIG.
All four internal lines for sending ATM cells to 3, 104, 105 and 106 are set on the A bus 107. Also, as shown in FIG.
From 03, an internal line for sending ATM cells to the interface circuit 102 is set on the B bus 108, and
An internal line for sending ATM cells to 05 and 106 is set on the A bus 107. Also, as shown in FIG.
From the interface circuit 104 to the interface circuit 10
An internal line for sending ATM cells to 1 and 102 is set on the B bus 108, and an internal line for sending ATM cells from the interface circuit 104 to the interface circuits 105 and 106 is set on the A bus 107. As shown in FIG. 3D, an internal line for sending ATM cells from the interface circuit 444 to the interface circuits 102, 103, and 104 is set on the B bus 108, and sends ATM cells from the interface circuit 105 to the interface circuit 106. Is set on the A bus 107. Also, as shown in FIG. 3D, the interface circuits 106 to 103, 103, 1
All four internal lines for sending ATM cells to 04 and 105 are set on the B bus 108.

Now, by using the internal lines set in this way, each interface circuit operates as shown in FIG.
Transmits and receives TM cells.

That is, for example, the interface circuit 1022 transmits, as an additional header, an ATM cell 306 to be exchanged to an internal line on the transmission line 1304 among ATM cells coming from the ATM line on the transmission line 1302 as an additional header. The identification number "3" of the interface circuit 104 accommodating the 1304 is added, and time-division multiplexing is performed on the A bus 107 in which an internal line to the interface circuit 104 is set. Among the ATM cells coming from the ATM line on the transmission line 1302, the ATM cell 307 exchanged for the internal line on the transmission line 1306 has, as an additional header, the identification number of the interface circuit 106 accommodating the transmission line 1306. "5" is added, and time division multiplexing is performed on the A bus 107 in which an internal line to the interface circuit 106 is set.

On the other hand, each interface circuit fetches an ATM cell whose identification number set in the additional header portion matches the identification number of its own interface circuit among the ATM cells on the buses 107 and 108. That is,
The cell 306 input from the interface circuit 1022 and having the additional header set to “3” is taken in by the interface circuit 104 through the A bus 107. Similarly, the cell 307 input from the interface circuit 102 and set to “5” in the additional header portion is taken in by the interface circuit 106. Similarly, the signal is input to the interface circuit 105 from the transmission line 1305,
The cell 308 whose additional header is set to “1” is taken in by the interface circuit 102 through the B bus 1080.

Each of the interface circuits removes the additional header of the ATM cell fetched from the bus in this way, and outputs the ATM cell to the transmission line for accommodating it.

Now, when a failure occurs in one of the interface circuits that has been operating normally in such a multiplexing apparatus, as described above, the flow of signals sequentially flowing through the other interface circuits is ensured. For this purpose, it is necessary to move the opening of each bus to the position of the interface circuit one downstream of the failed interface circuit.
In this case, since the opening moves, it is necessary to switch the bus for setting the internal line for the internal line passing through the failed interface circuit.

Here, it is assumed that two internal lines are connected in the multiplexer as shown in FIG. 5A.

In this case, the interface circuit 50 shown in FIG.
ATM cell input from the interface circuit 50
4 via the A bus 500. The ATM cells input from the interface circuit 505 are transmitted to the interface circuit 502 via the B bus 501. At this time, the traffic volume of the ATM cell of the internal line 507 set on the B bus
Is larger than the number of internal lines 506 using

In this situation, when a failure occurs in the interface circuit 503, the interface circuit 5 set on the A bus 500 as shown in FIG.
The internal line from 02 to the interface circuit 504 must be reset to the B bus 501 so as to avoid the failed interface circuit 503. Also, the internal line from the interface circuit 505 set on the B bus 501 to the interface circuit 502 is connected to the A bus 5 so as to avoid the failed interface circuit 503.
Must be reset to 00.

Here, when considering which of the internal lines 506 and 507 is to be re-set first, re-setting the internal line of 507 saves more cells. You can see that it can be done. In other words, when the interface circuit fails, if the switching in the bus direction is performed in order from the interface circuit having the largest traffic of the ATM cell, the discard of the ATM cell in the internal line passing through the failed interface circuit is reduced.

Therefore, in the present embodiment, the internal line is reset as follows.

That is, when a fault occurs in the interface circuit, the setting internal line controller 101 first places the opening of each bus at the position of the interface circuit one downstream of the faulty interface circuit. Moving.

Then, as shown in FIG. 6, ATM cell traffic information is collected from each interface circuit for each input internal line (601). Next, an interface circuit for transmitting the ATM cell to the internal line having the largest traffic volume is selected (602). Thereafter, the internal line information for switching the bus for setting the internal line for the selected interface circuit is edited (603). And
The switching of the bus for setting the internal line from the selected interface circuit to another interface circuit is instructed to the selected interface circuit (604).

Then, it is determined whether or not the processing has been completed for all the interface circuits (605). If the processing has not been completed, the processing returns to (601), and the processing is repeated until there are no more interface circuits for which the bus must be switched. .

In this example, the determination of the traffic amount is performed only once at the first time. However, it is needless to say that the determination may be performed every time the processing for each interface circuit is completed.

As shown in FIGS. 7A and 7I, in an ATM multiplexer having interface circuits 712, 722, 732, and 742, an interface circuit 71 is provided.
Let us consider a case where a failure has occurred in 2.

In this case, in order to avoid the interface circuit 712, it is necessary to first move the opening of the bus to the interface circuits before and after the interface circuit 712 to ensure the continuity of the bus.

As shown in FIGS. 7A and ii, the interface circuits 711 to 713 and 71
The internal lines set on the A bus 700 to 4, 715 need to be switched to the B bus 701 so as to avoid the interface circuit 712. In other words, of the internal lines going from the interface circuit 711 to the other interface circuits, the interface circuits 71
Bus switching must be performed for three internal lines to 3, 714 and 715.

On the other hand, looking at the internal lines going from the interface circuit 723 to the other interface circuits, as shown in FIGS.
Before the failure occurs in the B bus 70, the internal line from the interface circuit 723 to the interface circuit 721 is connected to the B bus 70.
1 and the internal lines to the interface circuits 724 and 725 are set on the A bus 700.

When a failure occurs in the interface circuit 722, the internal lines to the interface circuits 724 and 725 do not need to switch the bus because they do not pass through the failed interface circuit 722 as shown in FIGS. The internal line to the interface circuit 721 is connected to the A bus 70 so as to avoid the faulty interface circuit 722.
Must be reset to 0. Therefore, in this case, it is only necessary to switch one internal line from the interface circuit 723 to another interface circuit. Similarly, the interface circuit 734
And 745 only need to switch one internal line (see FIGS. 7c and 7d).

As described above, when a fault occurs in the interface circuit, the number of times that the bus for setting the internal line used by each interface circuit must be switched depends on the position of the faulty interface circuit. . Here, since it is estimated that there is a proportional relationship between the number of bus switching and the cell discard amount, when an interface circuit failure occurs, switching is performed in order from the interface circuit having the largest number of internal circuits for transmission, which needs to switch the bus. For example,
It can be seen that discarding of ATM cells is reduced in the internal line passing through the failed interface circuit.

Therefore, resetting of the internal line when a failure occurs may be performed as follows. That is, as shown in FIG. 8, when a failure occurs in the interface circuit (800), the setting internal line control device 101 calculates the interface circuit having the largest number of transmission internal lines that need to switch the bus to be set (800). 801), and select (802). Then, the internal line information of the interface circuit is edited to switch the bus for the selected interface circuit (803). Then, the selected interface circuit is instructed to switch a bus for setting an internal line from the selected interface circuit to another interface circuit (804).

Then, it is determined whether or not the processing has been completed for all the interface circuits (805). If the processing has not been completed, the processing returns to (801) and the processing is repeated until there are no more interface circuits for which the bus must be switched. . The selected bus is switched for the edited interface circuit (804).

Incidentally, the required number of bus switching for each interface circuit can be calculated directly from the positional relationship between the opening before the movement and the opening after the movement.

This will be described with reference to FIG.

In FIG. 9, the position of the opening on the bus in the normal state is that the A bus 900 is the interface circuit 902,
The B bus 901 is the interface circuit 906. When a failure occurs in the interface circuit 903, the A bus 900
The upper opening 907 is the faulty interface circuit 903.
The interface 902 on the B bus 901 needs to move to the interface circuit 906 one downstream of the failed interface circuit 903.

That is, when the interface circuit 903 fails, in order to ensure continuity except for the opening of the bus, the positions of the opening of each bus are determined by setting the A bus 900 to the interface circuit 904 and the B bus 901 to the interface circuit 9.
Move to 02. Thus, the opening 908 of the A bus 900 is placed on the interface circuit 904 and the B bus 901
Opening 908 moves onto interface circuit 902.

Here, considering the interface circuit between the opening before the movement and the opening after the movement with respect to the transmission direction of each bus for each bus, the A bus 90
Considering the number of internal lines that require a bus switch for the interface circuit (interface circuit 902) between the opening before the movement of 0 and the opening after the movement, the number becomes three per interface circuit. . In contrast, an interface circuit (interface circuit 9) between the opening before the movement of the B bus 901 and the opening after the movement.
04, 905, and 906), the number of internal lines that require switching in the bus direction is one per interface circuit. Here, the opening is regarded as being set at the entrance of the bus of the interface circuit in which the opening is set, and the interface circuit between the opening before the movement and the opening after the movement is defined. thinking. Accordingly, when only one bus is considered, the interface circuit in which the opening before the movement is set becomes an interface circuit between the opening before the movement and the opening after the movement. Conversely, the interface where the opening after movement was set
The interface circuit is not an interface circuit between the opening before the movement and the opening after the movement.

As described above, in the transmission direction, the smaller the number of interface circuits between the opening 907 before the movement and the opening 908 after the movement, the more the internal transmission circuit of the interface circuit between them is located. There are many line bus switches. That is, no matter where the faulty interface circuit is located, the smaller the number of interface circuits between the opening before and after the movement in the transmission direction, the smaller the number of interface circuits between them. It can be said that the number of bus switching of the transmission internal line is large.

Therefore, the required number of bus switching for each interface circuit is directly obtained from the positional relationship between the opening before the movement and the opening after the movement, and the transmission direction of the bus and the opening before the movement and the movement after the movement are determined. The switching in the bus direction may be performed in order from the side with the smaller number of interface circuits between the opening and the opening by, for example, a process as shown in FIG.

That is, when a failure occurs in the interface circuit (1000), the interface circuit between the opening before the movement and the opening after the movement that has a smaller number of interface circuits is given priority. Then, the interface circuits are sequentially selected (1001). The internal line information of the interface circuit is edited to switch the bus for the selected interface circuit (1003).
Then, switching of a bus for setting an internal line from the selected interface circuit to another interface circuit is performed.
An instruction is given to the selected interface circuit (1004).

Then, it is determined whether or not the processing has been completed for all interface circuits (1004). If not completed, the processing returns to (1001), and the processing is repeated until there are no more interface circuits for which the bus needs to be switched.

As described above, according to the present embodiment, the ATM bus is multiplexed on the loop bus, and the selected bus is switched when the interface circuit in the ATM multiplexer which realizes the line concentrator / cross connect function fails. In the internal line switching process for switching, by switching the bus that sets the internal line from the interface circuit, which has the largest amount of ATM cell traffic, the number of discarded cells during the switching process can be reduced, so high reliability is achieved. can get.

[0059]

As described above, according to the present invention, in a multiplexing apparatus using two loop-shaped transmission paths, each of which has an opening and whose transmission direction is reversed, when a fault occurs. Thus, the amount of lost communication cells until the completion of the switching of the bus for setting the internal line, which is performed in order to avoid a failure point, can be further reduced.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating a configuration of an ATM multiplexer according to an embodiment of the present invention.

FIG. 2 is an explanatory diagram showing a configuration of an ATM cell for transferring between interface circuits in an ATM multiplexer in an embodiment of the present invention.

FIG. 3 is an explanatory diagram showing a state of internal line connection in a normal state in the ATM multiplexer according to the embodiment of the present invention.

FIG. 4 is an explanatory diagram showing a flow of an ATM cell in the ATM multiplexer according to the embodiment of the present invention;

FIG. 5 is an explanatory diagram showing an internal line setting bus switching process when an interface circuit fails in the ATM multiplexer according to the embodiment of the present invention.

FIG. 6 is a flowchart showing a first procedure of an internal line setting bus switching process according to the embodiment of the present invention.

FIG. 7 is an explanatory diagram showing how an internal line setting is changed when a failure occurs in an interface circuit in an ATM multiplexer according to an embodiment of the present invention.

FIG. 8 is a flowchart showing a second procedure of the internal line setting bus switching process according to the embodiment of the present invention.

FIG. 9 is an explanatory diagram showing the relationship between the movement of the opening and the number of changes in the internal line setting in the multiplexer according to the embodiment of the present invention.

FIG. 10 is a flowchart illustrating a third procedure of an internal line setting bus switching process according to the embodiment of the present invention.

FIG. 11 is an explanatory diagram illustrating a configuration of a multiplexing device.

FIG. 12 is an explanatory diagram showing how an internal line setting is changed when a failure occurs in an interface circuit in a multiplexer.

[Explanation of symbols]

Reference Signs List 100 ATM multiplexer 101 Connection internal line controller 102, 103, 104, 105, 106, interface circuit 107 A bus 108 B bus 109 Opening of bus 110 Control bus 200, 306, 307, 308 Cell 201 addition on bus Header 202 ATM cell 301 Maintenance terminal 506 Internal line on A bus 507 Internal line on B bus

──────────────────────────────────────────────────続 き Continuing from the front page (72) Inventor Miho Iino 216 Totsuka-cho, Totsuka-ku, Yokohama-shi, Kanagawa Prefecture Inside the Information and Communication Division, Hitachi, Ltd. (72) Yoshiaki Nishimura 180, Totsuka-cho, Totsuka-ku, Yokohama-shi, Hitachi Within Communication Systems Co., Ltd. (72) Inventor Eiji Morito 6-81, Onoe-cho, Naka-ku, Yokohama-shi, Kanagawa Prefecture Within Hitachi Software Engineering Co., Ltd. (58) Field surveyed (Int. Cl. ⁷ , DB name) H04L 12 / 437 H04Q 11/04

Claims (4)

(57) [Claims] A multiplexing apparatus for accommodating a plurality of external transmission lines each including at least one external line for transmitting a communication cell, and for performing cross-connection between a plurality of external lines on the accommodated external transmission lines. A plurality of interface circuits each accommodating one external transmission path, two buses for connecting the plurality of interface circuits in a loop shape, and having two transmission directions opposite to each other; Two openings, which are non-transmission points of communication cells, which are virtually provided, are respectively set on two loops formed by two systems of buses, and a specific interface circuit switches to another specific interface. A control device for setting an internal line for transmitting a communication cell to the interface circuit on one of the buses in accordance with the position of the two interface circuits with respect to the two openings. Each of the interface circuits has monitoring means for monitoring a traffic volume of a communication cell transmitting on a set internal line and reporting the traffic amount to the control device. In the event of a fault in the interface circuit, the two openings are set at positions immediately before the interface circuit one downstream of the faulty interface circuit in the direction of transmission of the corresponding loop. And a monitoring means for each interface among the internal lines passing through the failed interface circuit until the internal line passing through the failed interface circuit no longer exists. For an interface circuit transmitting a communication cell to the internal line with the largest reported traffic volume, of the internal lines transmitting the communication cell to the interface circuit, The failed Intafe - multiplexing apparatus characterized by a means for switching the system bus to configure each internal line that via the scan circuit. 2. A multiplexing apparatus for accommodating a plurality of external transmission lines each including at least one external line for transmitting a communication cell, and for performing cross-connection between a plurality of external lines on the accommodated external transmission lines. A plurality of interface circuits each accommodating one external transmission path, two buses for connecting the plurality of interface circuits in a loop shape, and having two transmission directions opposite to each other; Two openings, which are non-transmission points of communication cells, which are virtually provided, are respectively set on two loops formed by two systems of buses, and a specific interface circuit switches to another specific interface. A control device for setting an internal line for transmitting a communication cell to the interface circuit on one of the buses in accordance with the position of the two interface circuits with respect to the two openings. The control device, when a failure occurs in any of the interface circuits, places the two openings one downstream in the transmission direction of the corresponding loop of the failed interface circuit. Means for resetting the interface circuit to a position immediately before the interface circuit, and for each interface circuit, via the failed interface circuit among the internal lines for transmitting the communication cells by the interface circuit. Calculating means for calculating the number of internal lines which are present, and the faulty interface circuit among the internal lines to which each interface circuit is transmitting a communication cell in order from the one having the higher number of calculated internal lines. Means for switching a system of a bus for setting each internal line passing therethrough. 3. A multiplexing apparatus for accommodating a plurality of external transmission lines each including at least one external line for transmitting a communication cell, and for performing cross-connection between a plurality of external lines on the accommodated external transmission lines. A plurality of interface circuits each accommodating one external transmission path, two buses for connecting the plurality of interface circuits in a loop shape, and having two transmission directions opposite to each other; Two openings, which are non-transmission points of communication cells, which are virtually provided, are respectively set on two loops formed by two systems of buses, and a specific interface circuit switches to another specific interface. A control device for setting an internal line for transmitting a communication cell to the interface circuit on one of the buses in accordance with the position of the two interface circuits with respect to the two openings. The control device, when a failure occurs in any of the interface circuits, places the two openings one downstream in the transmission direction of the corresponding loop of the failed interface circuit. Means for resetting the loop circuit to the position immediately before the interface circuit, and for each loop, the loop from the position of the opening before the occurrence of the failure to the position of the opening reset after the occurrence of the failure. Calculating means for calculating the number of interface circuits passing while traveling in the transmission direction, and resetting after the occurrence of a failure from the position of the opening of the loop having the smaller number of interface circuits before the occurrence of the failure. Up to the position of the opening that has been passed while traveling in the transmission direction of the loop.
Each of the internal circuits passing through the failed interface circuit among the internal circuits transmitting each communication cell, so that the interface circuit takes precedence over the other interface circuits. Switching means for switching a bus system for setting the multiplexing device. 4. The multiplexing device according to claim 1, wherein said communication cell is a fixed-length communication cell, and said external line transmits said communication cell in an asynchronous transfer mode. A multiplexing device, characterized in that the line is a multiplexed line.