JP3080046B2 - Secondary battery protection circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a secondary battery protection circuit, and more particularly to a secondary battery protection circuit for preventing a secondary battery from being damaged by overvoltage charging.

[0002]

2. Description of the Related Art In many cases, a lithium ion battery is used as a secondary battery that can be repeatedly used by charging. In a lithium ion battery, when the temperature rises due to overcharge or overload, the lithium ions may be metallized and ignite. For this reason, a battery pack using a lithium ion battery generally has a built-in overvoltage charge protection integrated circuit (IC) and a temperature fuse.

FIG. 5 is a circuit diagram showing an example of a conventional secondary battery protection circuit. This conventional circuit protects the rechargeable battery 11 from overvoltage charging, so that the overvoltage charging protection IC 1
2. Charging MOS field effect transistor (FET) Q
1. Discharge MOS field effect transistor (FET) Q
2, a temperature fuse F1 and a charger 13. The charger 13 is connected to an AC power supply 14.

The overvoltage protection IC 12 includes a comparator 121 having an inverting input terminal connected to the positive terminal of the secondary battery 11, a positive terminal connected to the non-inverting input terminal of the comparator 121, and a negative terminal. Side terminal is secondary battery 1
1, a PNP transistor 123 having an output terminal connected to the base, a collector connected to the gate of Q1, and an emitter grounded, a transistor Q1,
It comprises an on / off control circuit 124 connected to the gate of Q2 and the charger 13.

Next, the operation of the conventional circuit will be described. First, at the time of charging, the transistors Q1 and Q2 are turned on by the output signal of the on / off control circuit 124. As a result, the positive terminal of the charger 13 → the temperature fuse F1 → the secondary battery 11 → the transistor Q2 → the transistor Q1 → A closed loop (charging loop) of the negative terminal of the charger 13 is formed, and the charging current I from the charger 13
_The secondary battery 11 is charged by the charge.

On the other hand, the comparator 121 is connected to the secondary battery 11.
Charging voltage is compared with the reference voltage _{V REF} from _{V BAT} and the reference voltage source 122 _outputs a high level signal when the V BAT _{<V REF} and turning off the transistor 123 and subsequently turning on / off the transistor Q1 The on state is maintained by the output signal of the control circuit 124, and the charging of the secondary battery 11 is continued. Thereby, the charging voltage V
_{When BAT} rises and reaches V _BAT > V _REF , the output signal of the comparator 121 goes low, the transistor 123 turns on, and the transistor Q
Turn 1 off. As a result, the charging loop is opened, and current cannot be supplied to the secondary battery 11, so that the secondary battery 11 can be protected from overvoltage charging.

However, for some reason, the transistor Q1
When the battery is short-circuited, even if V _BAT > V _REF , the charging loop is not opened, so that the secondary battery 11 is further charged, and the charging voltage rises and heat is generated. Conventionally, as a protection against this phenomenon, the charging loop is mechanically opened by blowing the thermal fuse F1.

[0008]

However, the above-described conventional secondary battery protection circuit has a problem that the mounting substrate is large because the overvoltage protection IC 12 and the temperature fuse F1 are required.

The present invention has been made in view of the above points,
A small mounting board can prevent overvoltage charging of a secondary battery 2
A secondary battery protection circuit is provided.

Another object of the present invention is to provide a secondary battery protection circuit capable of reducing external elements.

[0011]

In order to achieve the above object, the present invention provides a charger which supplies a charging current and a charging voltage to a secondary battery and whose operation can be controlled by an external signal.
A semiconductor switching element that is turned on during charging to form a charging loop that supplies a charging current and a charging voltage from a charger to the secondary battery, and compares the charging voltage of the secondary battery with a first reference voltage; First comparing means for outputting a detection signal when detecting that the charging voltage has exceeded the first reference voltage and controlling the semiconductor switching element to be turned off; And an output of an error pulse when the voltage drop exceeds the voltage range to forcibly stop the operation of the charger. .

According to the present invention, the voltage drop of the semiconductor switching element becomes a value larger than the upper limit value or smaller than the lower limit value of the predetermined voltage range when the semiconductor switching element is short-circuited or overheated. Focusing attention, when the voltage drop of the semiconductor switching element exceeds this predetermined voltage range, an error pulse is output and the operation of the charger is forcibly stopped, so that the charging loop is opened by outputting the error pulse. be able to.

Here, the semiconductor switching element in the present invention is a field-effect transistor, and the second comparing means determines that the on-resistance between the drain and source of the field-effect transistor and the voltage drop due to the charging current are predetermined. It is desirable that the detecting means is a means for detecting whether or not the voltage is within the voltage range.

[0014]

Next, embodiments of the present invention will be described with reference to the drawings. FIG. 1 is a circuit configuration diagram of an embodiment of a secondary battery protection circuit according to the present invention, FIG. 2 is an explanatory diagram of an on-resistance, FIG. 3 is a circuit configuration diagram of an example of a window comparator, and FIG. 4 shows a timing chart for explanation. 1, the same components as those of FIG. 5 are denoted by the same reference numerals.

In the embodiment shown in FIG. 1, an overvoltage charge protection IC 1 is provided to protect the secondary battery 11 from overvoltage charge.
5, a charging N-channel MOS field effect transistor (FET) Q1, a discharging N-channel MOS field effect transistor (FET) Q2, and a charger 16. Charger 16 is connected to AC power supply 14. The secondary battery 11, the overvoltage charge protection IC 15, and the transistors Q1 and Q2 are built in the battery pack.

The overvoltage protection IC 15 includes an overcharge detection comparator 121 and a first reference voltage source 122.
, An on / off control circuit 124, an FET abnormality detection window comparator 151, a second reference voltage source 152, and an AND circuit 153 having an output terminal connected to the gate of the transistor Q1.

Next, the operation at the time of charging according to this embodiment includes (1) an operation at the time of normal operation, (2) an operation at the time of Q1 destruction,
(3) The operation when overheating is detected will be described separately.

(1) Normal Operation In FIG. 1, when the charger 16 is connected to the + terminal and the-terminal of the battery pack, the on / off control circuit 12
4 from the two output terminals, one of the ON signals is directly supplied to the gate of the transistor Q2 to turn it on, and the other ON signal is the one of the two-input AND circuit 153. It is supplied to the input terminal. At the same time, the comparator 121 compares the charging voltage V _BAT of the secondary battery 11 with the reference voltage V _REF1 from the reference voltage source 122, and before charging is completed, V _BAT <
A V _REF1, the comparator 121 in this case provides a high level signal to the other input terminal of the AND circuit 153. Accordingly, an ON signal is applied to the gate of the transistor Q1 through the AND circuit 153, and the transistor Q1 is turned on.

As a result, a closed loop (charging loop) of the positive terminal of the charger 16 → the secondary battery 11 → the transistor Q2 → the transistor Q1 → the negative terminal of the charger 16 is formed, and the charging current from the charger 16 2 by I _charge
The next battery 11 is charged. In general, charging is performed by a constant current-constant voltage method (constant current charging up to about 80%, and then constant voltage charging until full charge).

The charging voltage V _BAT of the secondary battery 11 rises due to the continuation of the charging, and V _BAT > V _REF1
, The output signal of the comparator 121 that compares the charging voltage V _BAT with the reference voltage V _REF1 from the reference voltage source 122 goes low, so that the output signal of the AND circuit 153 goes low.
When the gate voltage of the transistor Q1 goes low, Q1 turns off. By this operation, the charging loop is opened, so that charging of the secondary battery 11 is stopped, and the secondary battery 11 is not destroyed.

When the charging of the secondary battery 11 is stopped, the charging voltage V _BAT decreases due to discharging, and V _BAT <V
_{When REF1} is _reached , the charging voltage V _BAT and the reference voltage source 12
2, the output signal of the comparator 121 comparing the reference voltage V _REF1 with the reference voltage V _REF1 becomes high level.
When the output signal of the circuit 153 goes high and the gate voltage of the transistor Q1 goes high, Q1
Turns on. By this operation, the above-described charging loop is formed again, so that charging of the secondary battery 11 is restarted.
Thereafter, the same operation as above is repeated, and the charging voltage V _BAT
Is maintained near the reference voltage V _REF1 .

During this normal operation, the charging voltage of the charger 16, the output signal of the on / off control circuit 124, the on / off operation of the transistor Q1, and the charging current I
_charge and the charging voltage V _BAT are respectively shown in FIG.
(A) shows BCH, CONT, Q1, _Icharge , V
_Indicated by _BAT . Note that the high level of Q1 shown in FIG. 4A indicates that the transistor Q1 is on, and the low level indicates that the transistor Q1 is off.

(2) Operation when Q1 is destroyed If the transistor Q1 is destroyed for some reason,
Since the control of the transistor Q1 becomes impossible, the overvoltage charging protection method for the secondary battery 11 during the normal operation cannot be used. Therefore, in this case, in the present embodiment, the destruction of the transistor Q1 is detected and the destruction signal is fed back to the charger 16 to stop the operation of the charger 16 itself (or stand-by state) so that the secondary battery 11 To protect. The detection of the destruction of the transistor Q1 is performed as follows.

The transistor Q1 is a MOS FET, and has an ON resistance R _ON inherent to the element when conducting. FIG. 2 is an explanatory diagram of this on-resistance. In the figure, a low-concentration N-type epitaxial layer 22 is stacked on an N ⁺ -type substrate 21, a P layer 23 is further formed, and an N ⁺ diffusion layer 24 is formed therein.
Are formed. An oxide film 25 is formed on the surface of the P layer 23 and the N ⁺ diffusion layer 24, a gate electrode 26 is formed therein, and a source electrode 27 is formed on the surface of the oxide film 25 and the like. The drain 2 is provided on the surface of the substrate 21.
8 are formed.

Such a known MOS type FE having a double diffusion structure.
At T, when on, an on-resistance R _{ON including a} channel resistance R _CH , a junction pinch resistance R _JFET , an epitaxial layer resistance and a substrate resistance R _bulk is generated between the drain and the source.
This ON resistance R _ON shows a value of several mΩ to several Ω in a discrete device.

[0026] When the transistor Q1 is not destroyed, since the charging current flows I _charge through the on-resistance R _ON, the voltage drop between the drain and source of the transistor Q1 is determined by the R _ON × I _charge V _DROP occurs. On the other hand, when the transistor Q1 is short-circuited, the drain-source resistance of the transistor Q1 becomes 0, and thus the above-mentioned voltage drop _DROP hardly occurs. Accordingly, the voltage drop between the drain and source of the transistor Q1 V _DROP
Is detected, it is possible to detect whether or not the transistor Q1 is broken.

In the embodiment shown in FIG. 1, the voltage drop V
_DROP and transistor Q1 short-circuit breakdown detection reference voltage V _REF2
Are compared by the window comparator 151 to detect the destruction of the transistor Q1. Here, the window comparator 151, as shown in FIG. 3, a resistor divider comprising resistors R _A and R _B, a capacitor C, a comparator 31 and 32, consisting of the OR circuit 33. The comparator 31 has an inverted input terminal connected to the + terminal of the reference voltage source 152, and a non-inverted input terminal connected to the transistor Q in FIG.
It is connected via a terminal 34 to a connection point P between 1 and Q2.

Further, the comparator 32 is non-inverting input terminal connected to a common connection point between the resistor R _A and R _B and capacitor C, the inverting input terminal is connected to the terminal 34. Further, the OR circuit 33 performs a logical OR operation on both output signals of the comparators 31 and 32, and outputs the output signal to a terminal 35.
Is supplied to the charger 16 as an output signal of the window comparator 151 via the.

The operation of the window comparator 151 will be described. When the transistor Q1 is not destroyed (during normal operation), the drop voltage V _DROP input via the terminal 34 has a certain value, and V _REF2 > is a V _DROP, resistor R _a and the reference voltage V by a resistor divider consisting of R _B
The voltage V _REF2 ′ (= V _REF2 ·
R _B / (R _A + R _B ) has a relationship of V _REF2 ′ <V _DROP . Note that the resistance _divided voltage V _REF2 ′ is referred to as a short-circuit breakdown detection voltage for convenience.

The above-mentioned short-circuit breakdown detection voltage V _REF2 ′ is input to the non-inverting input terminal of the comparator 32.
4 is compared with the drop voltage V _DROP input via
Since V _REF2 ′ <V _DROP , the output signal of the comparator 32 is at a low level. On the other hand, the drop voltage V _DROP and the reference voltage V _REF2 input to the comparator 31 are equal to V _REF2 >
Because of the relationship V _DROP , the output signal of the comparator 31 is also at the low level. Therefore, the signal output from the OR circuit 33 to the terminal 35 is at a low level.

On the other hand, assuming that short-circuit breakdown has occurred in the transistor Q1, the transistor Q1 is turned off as schematically shown at a low level in Q1 of FIG.
The ON resistance R _ON becomes 0 as shown in FIG. 4C, and the drop voltage V _DROP input via the terminal 34 is also shown in FIG.
As shown in (C), the value rapidly decreases to almost zero. For this reason, V _REF2 > V _DROP even when the short-circuit of Q1 is destroyed.
As shown in FIG. 4C, since the relation of V _REF2 ′> V _DROP is established, the output signal of the comparator 32 becomes high level, and thus the output signal of the window comparator 151 output from the OR circuit 33 to the terminal 35. 4C also becomes high level as shown as an error pulse in FIG. This high-level error pulse is supplied to the charger 1 via the terminal 35.
6 to bring the charger 16 into an operation stop state.

As a result, the charger 16 starts the delay time (D
ELAY) With a delay, the output charging voltage is set to 0 as shown by BCH in FIG. 4 (C), whereby the output signal of the on / off control circuit 124 also goes low as shown by CONT in FIG. 4 (C). . With the above operation, the charging loop is opened, and overvoltage charging protection of the secondary battery 11 at the time of short-circuit breakdown of the transistor Q1 is realized.

(3) Operation at the time of detecting overheating When the transistor Q1 is short-circuited and broken, the secondary battery can be protected by the operation described in the above (2), but the transistor Q1 is non-destructive and In a state where a remarkable temperature rise is observed, the protection by the method (2) is impossible. Therefore, a function of detecting a temperature rise due to an overload and protecting the secondary battery 11 is also required.

Therefore, in this embodiment, in order to protect the secondary battery 11 against the temperature rise due to the overload, the overheat state is detected by detecting the on-resistance of the transistor Q1. The on-resistance of a MOS FET has a characteristic that increases as the temperature rises. In addition, since the charging of the secondary battery 11 is generally performed by a constant current method, a charging current I _charge corresponding to a steady state is supplied even when the temperature rises.
Therefore, the drop voltage V _DROP across the transistor Q1 also increases depending on the temperature rise.

That is, the transistor Q1 is non-destructive,
In addition, when a remarkable temperature rise occurs, as shown in FIG. 4B, the drop voltage V _DROP increases depending on the temperature rise and becomes larger than the reference voltage V _REF2 . Then, since the output signal of the comparator 31 in FIG. 3 becomes high level, the output signal of the window comparator 151 output from the OR circuit 33 to the terminal 35 also becomes high level as shown in FIG. 4B as an error pulse. . This high-level error pulse is supplied to the charger 16 via the terminal 35, and the charger 16 is brought into an operation stop state.

As a result, the charger 16 starts delaying the circuit-specific delay time (D
ELAY) With a delay, the output charging voltage is set to 0 as shown by BCH in FIG. 4B, whereby the output signal of the on / off control circuit 124 also goes low as shown by CONT in FIG. 4B. . By the above operation, the charging loop is released.

When the operation of the charger 16 is stopped, the secondary battery 11
Is stopped, the charging current I _charge is _reduced as shown in FIG.
As shown in FIG. 7, since the on-resistance R _ON also decreases rapidly, the drop voltage V _DROP becomes smaller than the reference voltage V _REF2 . Then, since the output signal of the comparator 31 in FIG. 3 becomes low level similarly to the output signal of the comparator 32, the output signal of the window comparator 151 output from the OR circuit 33 to the terminal 35 also becomes an error pulse in FIG. It goes low as shown.

When the signal input via the terminal 35 becomes low level, the charger 16 starts operation with a delay of a predetermined time, and as shown by BCH in FIG. Generate _charge . When the charging is restarted and the transistor Q1 is overheated again and V _REF2 <V _DROP , the operation of the charger 16 is stopped again as described above. Hereinafter, the same operation as described above is repeated. In this manner, overvoltage charge protection of the secondary battery 11 when the transistor Q1 is overheated is realized.

Note that this operation also detects when the charging MOS type FET Q1 has an open breakdown. In the open breakdown, the potential at the point P in FIG. 1 sticks to the supply voltage BCH from the charger 16, so that the drop voltage V _DROP
Becomes larger than the reference voltage V _REF2 . Therefore, also in this case, a high-level error pulse is output from the window comparator 151, and the operation of the charger 16 is forcibly stopped.

[0040]

As described above, according to the present invention,
The voltage drop of the charging transistor is detected by a window comparator, and when the voltage drop exceeds a predetermined voltage range, the charging loop is opened to protect the secondary battery from overvoltage charging, thereby eliminating the need for a thermal fuse. Therefore, it is easy to integrate a single chip up to the function of detecting the destruction of the charging transistor, reduce the number of external elements, further reduce the board mounting area, and reduce the system cost.

[Brief description of the drawings]

FIG. 1 is a circuit configuration diagram of an embodiment of the present invention.

FIG. 2 is a diagram illustrating on-resistance.

FIG. 3 is a circuit diagram of an example of a window comparator in FIG.

FIG. 4 is a timing chart for explaining the operation of FIG. 1;

FIG. 5 is a circuit configuration diagram of an example of the related art.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 11 Secondary battery 14 AC power supply 15 Integrated circuit (IC) for overvoltage charge protection 16 Charger 31, 32, 121 Comparator 33 OR circuit 34 Falling voltage input terminal 35 Error pulse output terminal 122 First reference voltage source 124 ON / OFF control circuit 151 window comparator 152 a second reference voltage source 153 the AND circuit Q1 charging N-channel MOS field effect transistor (FET) Q2 discharging N-channel MOS field effect transistor (FET) R _a, R _B resistor divider Resistance R _ON on resistance V _DROP Q1 drop voltage I _charge charging current

──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int. Cl. ⁷ , DB name) H02J ⁷ /00-7/12 H02J 7/34-7/36 H02H 7/18

Claims (6)

(57) [Claims] 1. A charger which supplies a charging current and a charging voltage to a secondary battery and whose operation can be controlled by an external signal, and which is turned on at the time of charging to charge the charging current and the charging voltage from the charger. Comparing a charging voltage of the secondary battery with a first reference voltage, and a semiconductor switching element forming a charging loop for supplying the secondary battery;
First comparing means for outputting a detection signal when detecting that the charging voltage has exceeded the first reference voltage and controlling the semiconductor switching element to be turned off; A second comparing means for detecting whether the voltage falls within a predetermined voltage range, outputting an error pulse when the voltage drop exceeds the voltage range, and forcibly stopping the operation of the charger. A secondary battery protection circuit, comprising: 2. The semiconductor switching element is a field-effect transistor, and the second comparing means determines that an on-resistance between a drain and a source of the field-effect transistor and a voltage drop due to the charging current are within a predetermined voltage range. 2. The secondary battery protection circuit according to claim 1, wherein it is detected whether or not the battery is inside the battery. 3. The method according to claim 2, wherein the second comparing means includes a reference voltage source for generating a second reference voltage, and a window comparator to which the second reference voltage and the drop voltage are input. The rechargeable battery protection circuit according to claim 1, wherein: 4. The window comparator according to claim 2, wherein
A resistor voltage dividing circuit that divides the reference voltage by a resistor, a first comparator that receives the dropped voltage at a first input terminal and the second reference voltage at a second input terminal, An output voltage of the voltage dividing circuit is input to a first input terminal, and the output voltage of the second comparator, in which the voltage drop is input to a second input terminal, and the output voltages of the first and second comparators are input, respectively. A logic circuit for generating the error pulse having a predetermined logic value when the voltage drop is outside a predetermined voltage range between the second reference voltage and the output voltage of the resistance voltage dividing circuit. 4. The secondary battery protection circuit according to claim 3, wherein: 5. The semiconductor device according to claim 5, wherein the predetermined voltage range is a first value near the voltage drop when the semiconductor switching element is non-destructive and operates at a temperature equal to or higher than a predetermined value. 5. The secondary battery protection circuit according to claim 1, wherein the second voltage is in a range of a second value larger than the voltage drop when the short circuit occurs. 6. The secondary battery protection circuit according to claim 1, wherein the first comparison means and the second comparison means are provided in the same integrated circuit.