JP3075303B2 - Protection method for power semiconductor devices - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for protecting a power semiconductor device such as a transistor and a thyristor used in an inverter circuit.

[0002]

2. Description of the Related Art Conventionally, for example, Japanese Patent Application Laid-Open No. Sho 62-1419
As shown in FIG. 4, a thermoswitch 25 that opens and closes contacts at a set temperature is installed on a heat sink near the semiconductor to protect the power semiconductor element such as 22 and so on, and the temperature exceeds the set temperature. In some cases, the inverter circuit current is shut off by a contact signal of the thermo switch 25 and the overheat protection of the power semiconductor element.

[0003]

However, in the prior art, protection is possible in the case of continuous load operation, but in the case of intermittent load operation shorter than the heat sink thermal time constant, the power semiconductor element cannot be sufficiently protected. There was a problem. Therefore, an object of the present invention is to establish a protection method capable of sufficiently protecting a power semiconductor element even in an intermittent load operation shorter than a heat sink thermal time constant.

[0004]

SUMMARY OF THE INVENTION In order to solve the above problems, the present invention provides a power semiconductor device, an inverter circuit including a PWM control unit for controlling the driving of the power semiconductor device, and cooling the power semiconductor device. In the inverter device provided with a heat sink, a thermistor is provided on the heat sink, and the heat sink temperature is detected based on a change in the resistance value of the thermistor.
It sent from the control unit, a drive signal to the semiconductor element current from the inverter output current for turning on and off the gate of the power semiconductor device to calculate, is calculated from the semiconductor element current
Loss and switching of the power semiconductor device
From the loss, the temperature rise between the heat sink and the junction of the power semiconductor element is estimated, and the estimated temperature
When the junction temperature of the power semiconductor element calculated from the rise and the heat sink temperature exceeds a first set temperature, the current limiting operation of the inverter circuit is performed, and a second set temperature higher than the first set temperature is set. If it exceeds, the inverter current is cut off to prevent the power semiconductor element of the inverter circuit from being damaged by overheating.

[0005]

According to the above-mentioned means, overheat protection of the power semiconductor element can be performed even in an intermittent load operation shorter than the heat sink thermal time constant.

[0006]

FIG. 1 shows a specific embodiment of the present invention. In FIG. 1, 1 to 6 are transistors constituting an inverter circuit, 7 is a heat sink for cooling the transistors 1 to 6, 8 is a motor, 9 is a current transformer for detecting inverter output current, and 10 is a transistor 1 to A thermistor placed on the heat sink 7 near 6; 11, a capacitor for smoothing the inverter DC bus voltage; and 12, a rectifying diode. Reference numeral 13 denotes a control unit of the inverter. Reference numeral 14 denotes a drive signal which is an on / off signal (PWM signal) transmitted to a base driver 23 for driving the transistors 1 to 6 according to a command from V / f control or current control based on a current command. Generated PWM control unit, 15
Is a temperature detector for converting the signal of the thermistor 10 into temperature information, and 16 is the heat sink temperature information of the temperature detector 15 and P
A Tj estimating unit that calculates a transistor element current from the drive signal sent from the WM control unit 14 and the output current detected by the current transformer 9 and calculates a junction temperature of the transistor based on the thermal resistance of the transistor. A temperature setter that sets the first set temperature used for limiting,
Reference numeral 18 denotes a temperature setter for setting a second transistor junction temperature higher than a first set temperature used for interrupting inverter current, 19 and 20 are comparators, 21 is a current limiter having a current limiting function, and 22 is a current limiter. It is a current breaker having a breaking function. The heat sink temperature T can be calculated by using the equation (1) based on a change in the resistance value of the thermistor 10 installed on the heat sink 7. r _T = r _T0 × exp {B × (1 / T−1 / T ₀ )} (1) where, r _T0 : reference resistance value B: thermistor constant, T: thermistor operating temperature T ₀ : reference resistance value The temperature rise T _JF between the heat sink and the junction of the transistor depends on the loss P _L generated in the transistor and the thermal resistance R between the junction and the heat sink of the transistor.
_It is obtained from _JF by equation (2). T _JF = P _L / R _JF (2) Transistor generated loss P _L is determined by inverter current and PW
An element current is calculated from a drive signal that is an on / off signal (PWM signal) transmitted from the M control unit 14 and transmitted to the base driver 23, and a loss at the time of conduction and a switching loss are calculated based on element characteristics. The loss during energization is represented by the following equation (3). Loss during energization = Loss calculated from detected phase current based on device characteristics x Drive signal (3) Drive signal is output once every PWM carrier frequency.
Since the signal is transmitted from the WM control unit 14, the PWM carrier 1
The average energization loss for each cycle is represented by the following equation (4). Average conduction loss per cycle = conduction loss x time during which drive signal is output / PWM carrier cycle (4) Further, the switching loss is represented by the following equations (5) and (6). On-state switching loss = Detected current when drive signal rises × Voltage applied to transistor × Switching time / 2 (5) Off-state switching loss = Detected current when drive signal falls × Applied to transistor after off voltage × switching time / 2 (6) Accordingly, the occurrence loss P _L of each transistor (4),
It is represented by the sum of equations (5) and (6). T _{JF in} equation (2)
And from the heat sink temperature T, calculates estimated junction temperature T _j of the transistor (7). T _j = T _JF + T (7) This temperature is closely related to the thermal breakdown of the transistor, and the transistor must be used within an allowable range. Then, when the estimated junction temperature of the transistor exceeds the first set temperature, the comparator 19 operates, the current limiter 21 performs the current limiting operation of the inverter, and the second set temperature 18 higher than the first set temperature. Is exceeded, the comparator 20 operates, and the current breaker 22 cuts off the inverter current, thereby making it possible to prevent thermal breakdown of the transistor. Also, as shown in FIG.
If the comparator 19 in FIG. 1 is changed to an operational amplifier 24 and the current limiter 21 has the characteristics shown in FIG. 3, it is possible to continuously change the operation level to perform the current limiting operation.

[0007]

As described above, according to the present invention, even in the case of short intermittent load operation, by using the thermistor signal and the inverter output current signal, the capacity can be maximized without causing thermal breakdown of the transistor. . In addition, each junction temperature is calculated by calculating the loss of each transistor including the switching loss, and the current limit and current cutoff are performed based on this temperature.Therefore, by using the current detection value and the drive signal, Thus, there is an effect that the loss calculation accuracy is good even if the load power factor changes. Furthermore, when the motor is operated at low speed, the operating frequency decreases,
Although a difference occurs in the loss of each transistor, the loss of each transistor can be calculated using the drive signal of each transistor and the current detection value of each phase, so that there is an effect that reliable protection can be achieved even at low speed.

[Brief description of the drawings]

FIG. 1 is a diagram showing a specific example of the present invention.

FIG. 2 is a diagram showing a specific example in which a current limiting operation is performed by continuously changing the operation level.

FIG. 3 is a diagram showing current limiting characteristics.

FIG. 4 is a diagram showing a conventional transistor protection system.

[Explanation of symbols]

 1 to 6 Transistor 7 Heat sink 8 Motor 9 Current transformer 10 Thermistor 11 Capacitor 12 Diode 13 Inverter control unit 14 PWM control unit 15 Temperature detection unit 16 Tj estimation unit 17, 18 Temperature setting unit 19, 20 Comparator 21 Current limiter 22 Current breaker 23 Base driver 24 Operational amplifier

──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int.Cl. ⁷ , DB name) H02H ⁷ /12-7/122 H02H 6/00 H02M 1/00 H02M 7/48

Claims (2)

(57) [Claims] 1. An inverter device including a power semiconductor device, a PWM control unit for driving and controlling the power semiconductor device, and a heat sink for cooling the power semiconductor device, wherein a thermistor is provided on the heat sink. The heat sink temperature is detected by a change in the resistance value of the thermistor, and the PWM
It sent from the control unit, a drive signal to the semiconductor element current from the inverter output current for turning on and off the gate of the power semiconductor device to calculate, is calculated from the semiconductor element current
Loss and switching of the power semiconductor device
From the loss, the temperature rise between the heat sink and the junction of the power semiconductor element is estimated, and the estimated temperature
When the junction temperature of the power semiconductor element calculated from the rise and the heat sink temperature exceeds a first set temperature, the current limiting operation of the inverter circuit is performed, and a second set temperature higher than the first set temperature is set. A protection method for power semiconductor devices, characterized in that the inverter current is cut off when the voltage exceeds the threshold. 2. When the junction temperature of the power semiconductor device exceeds the first set temperature, the power semiconductor device continuously changes the temperature based on a function of a preset junction temperature and a current limit level of an inverter circuit. 2. The protection method for a power semiconductor device according to claim 1, wherein the current limit level is changed.