JP3074570B2 - ATM switch path test method - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Overview] Regarding the path test method of an ATM switch, the purpose is to enable the path test of an ATM switch to be performed with a small amount of hardware and software, and to interface with another station. A plurality of trunks, and an ATM switching device having an ATM switch for switching between an incoming line and an outgoing line via the plurality of trunks in a cell unit including a header and a data portion, the path in the ATM switch A test cell generating trunk for generating a test cell for performing the test is provided, and a test cell indication bit for indicating that the cell is a test cell is included in a header portion of the test cell. When detecting the test cell indication bit in the test cell transmitted via the ATM switch, means for turning the test cell back to a route for performing the test is provided. It is configured.

[Industrial applications]

 The present invention relates to a path test method for an ATM exchange switch.

The ATM switch uses a self-routing module SRM (Self Rout
ing Module) in a multi-stage self-routing MSSR (Multi-Stage Self Routing) system.

The schematic configuration of this ATM exchange will be described with reference to FIG.

In FIG. 9, reference numeral 91 denotes a plurality of trunks for interfacing with other stations; 92, a multiplexer for multiplexing the output signals of the plurality of trunks 91; 93, an ATM for performing an input / output switching operation according to the MSSR method. Switch 94, a demultiplexer for distributing the multiplexed output of the ATM switch to each trunk; 95, an interface SRD (Signalling Route Distributer) for distributing control signals in the ATM switch 93;
Reference numeral 6 denotes a central processing unit CP that controls the ATM switch 93.

As shown in FIG. 10, the ATM switch 93 is composed of a plurality of stages of self-routing modules SRM. First
In the example shown in FIG. 0, the ATM switch is configured in a three-stage configuration of SRM0, SRM1, and SRM2 with 4 × 4 SRM as one unit. In this case, there are a total of 16 routes from any input point to any output point.

[Conventional technology]

ATM switching equipment itself is a new technology,
A switch path test method has not yet been proposed. In a conventional technique, in order to perform a path test of the ATM switch, it is conceivable to provide a test cell generating and receiving means for each of a plurality of trunks.

[Problems to be solved by the invention]

If test cell generation and reception means are provided for each of a plurality of trunks according to the above-described conventional technique, there is a problem that hardware and software become enormous and the system price increases.

An object of the present invention is to enable an ATM switch to perform a path test with a small amount of hardware and software.

[Means for solving the problem]

FIG. 1 is a block diagram showing the principle of the present invention. In the figure, reference numerals 11 to 1n denote a plurality of trunks for interfacing with other stations, 2 denotes an ATM switch, 3 denotes a test cell generation trunk provided by the present invention, and 4 denotes a test cell output from the test cell generation trunk 3. Reference numeral 5 denotes a test cell display bit for indicating that the test cell is a test cell in the test cell 4, and reference numeral 6 denotes route selection information indicating a route to be tested.

Each of the plurality of trunks 11 to 1n is provided with a return means 7 for returning a test cell to a route to be tested when a test cell indication bit in the test cell 4 transmitted through the ATM switch 2 is detected. Have been.

(Operation)

The test cell generation trunk 3 generates a test cell in which a test cell indication bit 5 for indicating a test cell is included in a header portion and route selection information indicating which route is to be tested is included in a data portion. I do. Upon detecting the test cell indication bit, the trunk receiving the test cell returns the test cell to the corresponding route according to the route selection information. Then, whether or not the above route is normal can be checked based on whether or not the returned test cell returns to the original test cell generation trunk.

〔Example〕

FIG. 2 is a block diagram showing a configuration of an ATM switching device according to an embodiment of the present invention. In the figure, 211 to 21n and 22
1, ... are normal trunks, 23 is a test cell generation trunk, 241 and 242 are multiplexers, 25 is an ATM switch, 2
61 and 262 are demultiplexers, 27 is a central processing unit (C
P).

An object of the present invention is to realize a test of a route in an ATM switch including the multiplexers 241 and 242 and the demultiplexers 261 and 262. The outline of the method of the present invention will be described below with reference to FIG. I do.

Signals are transmitted outside the trunks 211 to 21n and 221 to 22m, that is, between another station and this ATM switching device, in a format of a transmission line in accordance with rules between stations such as SONET, for example.
Each trunk extracts cells from the signal on the transmission line and sends the cells to the ATM switch 25 via the multiplexer 241 or 242. The cells switched by the ATM switch 25 are sent to the corresponding trunk via the demultiplexer 261 or 262, and sent out from the trunk onto the transmission line.

The route from this incoming trunk to the outgoing trunk is AT
There are a plurality depending on the size of the M switch, and the selection of the route is determined by a tag (TAG) added at the entrance of the multiplexer 241 or 242.

According to the present invention, the test cell generating trunk 23 is, like the normal trunks 211 to 21n and 221 to 22m, provided with control software for performing switching control and an interface MS for maintenance.
D (Maintenance Distributer), MSCN (Maintenance Sc
annner)), instructions for performing a path test by software in the central processing unit (CP) 27, the trunk number of the trunk under test, and the route number (4
In the case of × 4, one of 0 to 15) is obtained.

The test cell generating trunk 23 receives the instruction of the path test and the trunk number and the route number from the central processing unit 27,
The test cell display bit provided at a predetermined position in the header portion of the cell is turned on, a predetermined test pattern and tag information indicating the route to be tested are placed in the data portion, and the number of the first trunk of the route to be tested is set. A test cell including a tag, which is information to be indicated, is generated. When this test cell is transmitted according to the tag, for example, to the trunk 211, which is the trunk under test, the trunk under test 211 monitors the header part in the test cell, and the test cell indication bit in the trunk turns on. When it is detected that the test cell has been input, it is determined that a test cell has been input, and the test cell is folded back to the line on the input side of the ATM switch 25. At the time of this return, the multiplexer 241 replaces the tag information at a predetermined position in the data section of the test cell with a tag. The returned test cell is transmitted to the next trunk of the route to be tested, for example, 21n, according to the replaced tag. Hereinafter, similarly, the test cell is finally returned to the test cell generation trunk 23. The test cell generation trunk 23 detects whether the test cell has been returned and whether the contents of the data match the data before transmission, thereby confirming whether the route to be tested is normal.

In the example shown in FIG. 2, the passing path of the test cell is in the order from.

In FIG. 2, for convenience of illustration, trunks 211 to 2 are shown.
1n and 221 to 22m each separately show a trunk for receiving a signal from another station and a trunk for transmitting to another station,
Actually, the receiving trunk and the transmitting trunk can be configured as a receiving unit and a transmitting unit in the same trunk. Also, the test cell generating trunk 23 is shown separately for the transmitting unit and the receiving unit, but can be actually formed of the same unit.

FIG. 3 is a block diagram showing a configuration of a test cell generation trunk according to an embodiment of the present invention. In the figure, 31 is AT
Central processing unit (CP) 2 for testing M switches
An MSD (Maintenance Signal Distributer) receiving unit 32 that receives information for a test set by software from 7 performs a test from the MSD receiving unit 31 with the first trunk number of the test route and the next trunk number. A tag data generator that generates tag data by receiving a desired route number, 33 is a test pattern generator, and 34 is a test that generates test cell data based on the tag data and test pattern from the tag data generator 32. A cell data generation unit, 35 is a match detection unit that detects whether data from the demultiplexer matches data from the test pattern generation unit 33;
36 is an MSCN (Ma) that stores the comparison result in the match detection unit 35.
(intenance Scanner) register.

Multiplexer and demultiplexer and ATM switch 2
If you want to perform the test of 5, the M in the test cell generation trunk 23
From the CP 27, the SD receiving unit 31 sends the trunks A under test (for example, trunk 211) and B (for example, trunk 21) by software.
n) and the route number in ATM switch 25 from A to B is received. Tag data generator 32 based on these data
Is the tag of the route from trunk 23 to trunk A, the tag of the route from trunk A to trunk B,
The three tags of the route tag from the trunk B to the test cell generating trunk 23 are generated. First, the tag of the route from the test cell generating trunk 23 to the trunk A is used as the official tag, and the other tags are the test cells. Of the test cell data together with the test pattern as a part of the data.

The operation when the route to be tested is normal will be described below.

The test cell with the formal tag added to the test cell data is sent to trunk A (for example, trunk 211), which is one of the trunks to be tested, via multiplexer 242, ATM switch 25 and demultiplexer 261.

When the trunk A receives the test cell, it returns the test cell to the ATM switch instead of transferring it to another station.
In the multiplexer, the tag of the folded test cell is changed from the tag of the route from the test cell generating trunk 23 to the trunk A to the tag of the route from the trunk A to the trunk B, and according to the changed tag, the multiplexer, It is sent to the trunk under test B (for example, trunk 21n) via the ATM switch and the demultiplexer.

When the trunk B receives the test cell, it returns the test cell to the ATM switch instead of transferring it to another station. In the multiplexer, the tag of the route from the trunk A to the trunk B is changed to a tag of the route from the trunk B to the test cell generating trunk 23, and the multiplexer and the ATM are changed according to the changed tag. It is returned to the test cell generation trunk 23 via a switch and a demultiplexer.

In the test cell generation trunk 23, the test cell data that has passed through the trunk A, the trunk B, and the ATM switch 25 is compared with the test data generated by the test cell data generation unit 33 in the match detection unit 35, and a match is found. If
It is possible to confirm that the route under test including the ATM switch 25 is normal, and to confirm the normality of the tag route based on the fact that the test cell is returned.

The result of this test is stored in the MSCN register 36, and is periodically monitored and displayed by software.

FIG. 4 is an explanatory diagram of a route number in the embodiment of the present invention. When the ATM switch 25 has, for example, a three-stage configuration of 4 × 4 SRM, as shown in FIG.
There is a street. The number of the route to be tested is set by the CP 27 by software.

FIG. 5 is a block diagram showing the configuration of the folded portion of the trunk under test according to the embodiment of the present invention. In the figure,
51 is a test cell extracting unit, 52 is a transmission line-switch interface circuit (SSINF) for converting a SONET frame into a cell-only format, 53 is a timing generator (TMG),
Reference numeral 54 denotes a switching circuit for selectively outputting the output of the test cell extracting unit 51 or the output of the transmission line-switch interface circuit 52 in accordance with the clock signal from the timing generator 53.

The test cell extraction unit 51 monitors whether there is a test cell indicator bit in the header of a cell received from the ATM switch 25, and extracts and stores the cell when the test cell indicator bit is on. I do.

On the other hand, the transmission line-switch interface 52 extracts only the data portion in the SONET frame transferred from another station via the transmission line, and outputs a SOH (Section Over Head) and a PO.
Header parts such as H (Path Over Head) are not extracted.
Therefore, SOH and POH are free time. The idle time is detected by the timing generator 53, and the test cell extracting unit
The test cell stored in 51 is output from the switching circuit 54 to the ATM switch 25 during the idle time. As a result, even during normal cell replacement operation other than test cells, ATM
A path test of the switch can be performed.

FIG. 6 is a block diagram showing a configuration of a tag operation unit in the multiplexer according to the embodiment of the present invention. In the figure, reference numeral 61 denotes a test cell display bit detector for detecting a test cell display bit in a cell turned back from the trunk, 62 a timing generator for generating a switching signal when a test cell is detected, 63 a VCI conversion table, 64 And 65 are changeover switches.

The VCI conversion table 63 is a table that can be rewritten by software. The VCI conversion table 63 calculates and sets tags according to the output line to which the VCI cell assigned by the software should be output and the usage rate of the buffer inside the ATM switch 25. And the data of that table becomes a tag and ATM
Determine the route inside the switch.

However, when the test cell is folded back from the trunk, the data of the tag is stored as a part of the data of the test cell as described above. Therefore, when the test cell display bit detection unit 61 in the multiplexer confirms that a test cell has arrived, a switching signal is given from the timing generator 62 to the changeover switches 64 and 65, whereby the data from the VCC conversion table 63 is output. Instead, the data of the test cell is output from the changeover switch 64, and the tag in the data section in the test cell is output from the changeover switch 65 instead of the tag from the VCC conversion table 63.

FIG. 7 is a diagram showing a format of a transmission line in the embodiment of the present invention. In this example, SONET STS-3c is shown as the format of the transmission path. In this case, 1
The frame is 270 bytes x 9 columns, of which 9 bytes x 9 columns are SOH (Section Overhead) and LOH (Line Overh).
excluding ead) and 1 byte x 9 columns of POH (Path Overhead)
53 bytes of cells are packed in 9 columns of 60 bytes and transmitted and received. As described above, when the data is input to the ATM switch 25, the header portion such as SOH, POH, and LOH is removed. Even during transmission, the path test of the ATM switch becomes possible.

FIG. 8 is an explanatory diagram of the conversion of the cell format in the embodiment of the present invention. The format of the 53-byte cell on the transmission line is UNI (User Node Interface) and
There is a prescribed format of NNI (Network Node Interface). In UNI, header part except data part is GFC
(Generic Flow Control), VPI (Virtual Path Identi
fier), VCI (Vertual Channel Identifier), HEC (He
ader Error Control), PT (Payload Type), RE (Rese
rve) and CL (Cell Loss Priority). The header in the NNI is a VPI (Virtual Path Identif
ier), VCI (Vertual Channel Identifier), HEC (Hea
der Error Control), PT (Payload Type), RE (Reser
ve), CL (Cell Loss Priority). When this format on the transmission path is input to the ATM switch 25, it is converted into the format shown in the lower part of FIG. That is, as the header part, tags, VPI and VCI, PT, RE,
There is only CL, HEC is cut and converted to a format of 27 bytes x 16 bits.

In the embodiment of the present invention, both normal cells and test cells are input to the ATM switch 25 in the format shown in the lower part of FIG. 8, but a test cell indicator bit is provided in the header of the test cell, and the data Is inserted with tag information specifying a route to be tested.

〔The invention's effect〕

As is clear from the above description, according to the present invention, the AT
In the M switch, when testing the route through the ATM switch, multiplexer, demultiplexer, and trunk, the test cell generation, generation of the route selection tag, and the data check function are provided in one dedicated trunk, Providing only the return means in each trunk makes it possible to reduce the number of circuits and software processing.

[Brief description of the drawings]

1 is a block diagram showing the principle of the present invention, FIG. 2 is a block diagram showing the configuration of an ATM switching device according to an embodiment of the present invention, and FIG. 3 is a block diagram showing the configuration of a test cell generating trunk according to the embodiment of the present invention. FIG. 4, FIG. 4 is an explanatory diagram of a root breach in the embodiment of the present invention, FIG. 5 is a block diagram showing a folded portion of the trunk under test according to the embodiment of the present invention, and FIG. 6 is a multiplexer according to the embodiment of the present invention. FIG. 7 is a block diagram of an inner tag operation unit, FIG. 7 is a diagram showing a format of a transmission line in an embodiment of the present invention, FIG. 8 is an explanatory diagram of cell format conversion in an embodiment of the present invention, and FIG. FIG. 10 is a block diagram showing an ATM switching device which is a background of FIG. 10; In the figure, 11 to 1n are trunks, 2 is an ATM switch, 3 is a test cell generating trunk, 4 is a test cell, 5 is a test cell indication bit, and 6 is route selection information.

Continuation of the front page (56) References JP-A-4-124936 (JP, A) JP-A-4-81046 (JP, A) JP-A-3-270434 (JP, A) JP-A-3-71751 (JP) , A) JP-A-3-71750 (JP, A) (58) Fields investigated (Int. Cl. ⁷ , DB name) H04L 12/28 H04L 12/56

Claims (4)

(57) [Claims] 1. An ATM for exchanging a plurality of trunks (11-1n) for interfacing with other stations and an incoming line and an outgoing line for each cell comprising a header and a data section via the plurality of trunks. In an ATM switching apparatus provided with a switch (2), a test cell generation trunk (3) for generating a test cell for testing a path in the ATM switch is provided, and a test is performed in a header portion of the test cell (4). A test cell indication bit (5) for indicating that the cell is a cell is included, and each of the plurality of trunks has detected the test cell indication bit in the test cell sent through the ATM switch. A path test method for an ATM switch, wherein means (7) for turning back the test cell to a desired route is provided. 2. The data section of the test cell includes route selection information (6) indicating a route to be tested. When the test cell indication bit in the test cell is detected, the route selection information is included in the data section. 2. The path test method for an ATM switch according to claim 1, further comprising means for replacing a tag in a header of the test cell. 3. The system of claim 2, wherein each of the plurality of trunks includes means for looping back the test cell to the ATM switch during idle time caused by extracting only a data portion in a frame from the input highway. 2. The path test method of the ATM switch according to 1. 4. The test cell generating trunk according to claim 1, wherein said test cell generating trunk includes means for causing a header of the test cell to include information addressed to a first trunk of a route to be tested.
Path test method for ATM switches.