JP3059871B2 - LED display - Google Patents

LED display

Info

Publication number
JP3059871B2
JP3059871B2 JP29925693A JP29925693A JP3059871B2 JP 3059871 B2 JP3059871 B2 JP 3059871B2 JP 29925693 A JP29925693 A JP 29925693A JP 29925693 A JP29925693 A JP 29925693A JP 3059871 B2 JP3059871 B2 JP 3059871B2
Authority
JP
Japan
Prior art keywords
chip
led display
led
display element
green
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP29925693A
Other languages
Japanese (ja)
Other versions
JPH07152337A (en
Inventor
潤 鈴木
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Corp filed Critical Sharp Corp
Priority to JP29925693A priority Critical patent/JP3059871B2/en
Publication of JPH07152337A publication Critical patent/JPH07152337A/en
Application granted granted Critical
Publication of JP3059871B2 publication Critical patent/JP3059871B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L24/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144—Gold (Au) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4911—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
    • H01L2224/49113—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain the connectors connecting different bonding areas on the semiconductor or solid-state body to a common bonding area outside the body, e.g. converging wires
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00011—Not relevant to the scope of the group, the symbol of which is combined with the symbol of this group
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01006—Carbon [C]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Led Device Packages (AREA)
  • Led Devices (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Control Of El Displays (AREA)

Abstract

PURPOSE:To provide an LED display easy for assembling and capable of miniaturization. CONSTITUTION:In this device, LEDs 4, 5, 6 of red blue and green are mounted adjacently on the end part 3 of a lead terminal 2 and the chip 4 of red and the chip 6 of green among them are mounted in a reverse polarity and also connected to another lead terminal 8 with wires so as to be connected in parallel and further the remaining chip 5 of the blue color is connected to other terminal 9 with a wire and a driving circuit driving with time division two chips of the chip 4 of the red color and of the chip 6 of the green color and the chip 5 of the blue color is provided.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【０００１】[0001]

【産業上の利用分野】本発明はＬＥＤ表示器に関し、特
に情報板等に利用されるマトリクス型のフルカラーＬＥ
Ｄ表示器に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an LED display, and more particularly to a matrix type full color LE used for an information board and the like.
It relates to a D display.

【０００２】[0002]

【従来の技術】従来の技術について、図７乃至図９に示
す。図７（ａ）は、従来例によるフルカラーＬＥＤ表示
素子（以下、単にＬＥＤ表示素子と記す）の斜視図であ
る。2. Description of the Related Art The prior art is shown in FIGS. FIG. 7A is a perspective view of a conventional full-color LED display device (hereinafter simply referred to as an LED display device).

【０００３】図７（ａ）に示すように、従来のＬＥＤ表
示素子５０は、４本（場合によっては６本）の端子を有
するステム５１上に赤色、青色、緑色をそれぞれ発光す
るＬＥＤチップ５２，５３，５４を搭載し、金線５５で
接続していた。As shown in FIG. 7A, a conventional LED display element 50 has an LED chip 52 for emitting red, blue, and green light on a stem 51 having four (in some cases, six) terminals. , 53, and 54, and connected by a gold wire 55.

【０００４】このＬＥＤ表示素子５０の内部結線図を図
７（ｂ）に、また、複数接続する場合のマトリクス表示
器の回路構成及びその点灯回路の一例をそれぞれ、図８
及び図９に示す。FIG. 7B shows an internal connection diagram of the LED display element 50, and FIG. 8 shows an example of a circuit configuration of a matrix display and an example of a lighting circuit thereof when a plurality of LED display elements 50 are connected.
And FIG.

【０００５】図８中、ＣｏｍはＬＥＤ表示素子のカソー
ド側のコモンラインである。点灯回路は、図９に示すよ
うに、赤色、青色、緑色にそれぞれ対応した発光駆動部
６０、６１、６２が設けられており、各々の駆動部は、
シフトレジスター、ラッチ、駆動素子を有している。そ
して、各駆動部に対し、データシフト用のクロック入力
端子６３とデータ保持用のラッチ信号入力端子６４がそ
れぞれ、共通に接続されている。６５乃至６７はそれぞ
れ、赤色、青色、緑色に対応するデータ入力端子であ
る。In FIG. 8, Com is a common line on the cathode side of the LED display element. As shown in FIG. 9, the lighting circuit is provided with light emission driving units 60, 61, and 62 corresponding to red, blue, and green, respectively.
It has a shift register, a latch, and a driving element. A clock input terminal 63 for data shift and a latch signal input terminal 64 for data holding are commonly connected to each drive unit. Data input terminals 65 to 67 correspond to red, blue, and green, respectively.

【０００６】[0006]

【発明が解決しようとする課題】ところで、図７のＬＥ
Ｄ表示素子をマトリクス型表示器に使用する場合、まず
基板に端子用の孔を開け、そこにＬＥＤ表示素子を挿
入、半田付けして構成する方法がある。しかし、この方
法では、１つのＬＥＤ表示素子に対して各々４個以上の
孔を基板に開ける必要があり、多数のＬＥＤ表示素子を
高密度に並べるマトリクス型の表示器においては、その
基板の設計が非常に難しいものとなる。また、ステム５
１を使用していると、ＬＥＤ表示素子の基板への自動挿
入ができないために、表示器の組み立てに非常に手間が
かかる。By the way, LE shown in FIG.
When the D display element is used in a matrix type display, there is a method in which a hole for a terminal is first formed in a substrate, and an LED display element is inserted into the hole and soldered. However, in this method, it is necessary to make four or more holes for one LED display element on the substrate, and in a matrix type display in which a large number of LED display elements are arranged at high density, the design of the substrate is difficult. Is very difficult. In addition, stem 5
When 1 is used, since the LED display element cannot be automatically inserted into the substrate, it takes much time and labor to assemble the display.

【０００７】また、ステム５１の端子間に基板端面を挟
み込んで表示器を構成する場合でも、ＬＥＤ表示素子の
基板への取り付けは手作業となり、組み立てに手間がか
かっていた。また、この方法では表示器の奥行きサイズ
が大きくなるといった欠点もあった。Further, even when the display is constructed by sandwiching the end face of the substrate between the terminals of the stem 51, the mounting of the LED display element to the substrate is a manual operation, and the assembly is troublesome. In addition, this method has a disadvantage that the depth of the display is increased.

【０００８】そこで、本発明の目的は、組み立てが簡易
で、しかも小型化を図れる表示器を提供することにあ
る。Accordingly, an object of the present invention is to provide a display which can be easily assembled and can be reduced in size.

【０００９】[0009]

【課題を解決するための手段】前記目的を達成するため
に本発明は、ＬＥＤ表示素子と該ＬＥＤ表示素子を点灯
駆動する点灯回路とを有し、前記ＬＥＤ表示素子は、3
本のリード端子の１本の端部に、赤色、青色、緑色のＬ
ＥＤチップを近接して搭載し、前記3チップの内の2チッ
プを、逆極性で搭載し且つ並列接続となるように他のリ
ード端子にワイヤー接続するとともに、他の1チップを
さらに他のリード端子にワイヤー接続してなり、前記点
灯回路は、前記逆極性で搭載されたＬＥＤチップの一方
と、該ＬＥＤチップに並列接続された他の1チップを同
時に駆動させると共に、他の逆極性で接続されたＬＥＤ
チップとで2分割駆動する手段を備えてなることを特徴
とする。このとき、前記2分割駆動する手段は、並列接
続された２チップの点灯時間を、並列接続されていない
他の１チップよりも長く駆動してなることを特徴とする
ものである。 さらに、前記逆極性で搭載する2チップ
は、緑色と青色のＬＥＤチップであることを特徴とする
ものである。 In order to achieve the above object, the present invention comprises an LED display element and a lighting circuit for driving and driving the LED display element.
One end of each lead terminal has a red, blue, green L
An ED chip is mounted in close proximity, two of the three chips are mounted in reverse polarity, and wires are connected to other lead terminals so as to be connected in parallel, and another one chip is further connected to another lead. The lighting circuit is one of the LED chips mounted with the opposite polarity.
And the other chip connected in parallel with the LED chip.
LED that is sometimes driven and connected with other reverse polarity
It is characterized in that it is provided with a means for driving the chip into two parts. At this time, the means for driving in two parts is connected in parallel.
The lighting time of two consecutive chips is not connected in parallel.
It is characterized by being driven longer than the other one chip
Things. In addition, two chips mounted with the opposite polarity
Are green and blue LED chips
Things.

【００１０】[0010]

【作用】３個のＬＥＤチップを一本のリード端子の端部
に搭載することによって、ＬＥＤ表示素子全体で要する
端子数を従来の４本〜６本から３本に低減できる。この
結果、ＬＥＤ表示素子を固定する基板の構造が簡単にな
る上、従来不可能であった基板への自動実装が可能とな
るので、表示器の組み立てに要する時間、コストを大幅
に低減でき、表示器の量産性を非常に向上できる。By mounting three LED chips at the end of one lead terminal, the number of terminals required for the entire LED display element can be reduced from four to six in the past to three. As a result, the structure of the substrate for fixing the LED display element is simplified, and automatic mounting on the substrate, which has been impossible in the past, becomes possible. Therefore, the time and cost required for assembling the display can be significantly reduced, Mass productivity of the display can be greatly improved.

【００１１】また、この際、単に、３チップを一本のリ
ード端子に搭載するだけでは、赤色、青色、緑色の３色
を同時発光させることはできないが、本発明において
は、逆極性で且つ並列接続した２チップと他の１チップ
とを時分割駆動するようにしているので、人間の目には
同時発光しているように見えることになり、従来に比べ
何等遜色の無い発光色数を実現できる。At this time, simply mounting three chips on one lead terminal cannot simultaneously emit three colors of red, blue, and green. The two chips connected in parallel and the other chip are driven in a time-division manner, so that the human eye will see as if they are emitting light simultaneously, and the number of emission colors that is comparable to the conventional one realizable.

【００１２】さらに、本発明による単一のＬＥＤ表示素
子を複数個使用したマトリクス型の表示器においては、
端子数を低減できることの効果が相乗的に増加し、従来
に比べ、非常に小型で高密度の表示器を実現できる。Further, in a matrix type display using a plurality of single LED display elements according to the present invention,
The effect of reducing the number of terminals is synergistically increased, and a very compact and high-density display device can be realized as compared with the related art.

【００１３】[0013]

【実施例】本発明の一実施例について図１乃至図４を参
照して説明する。図１は本実施例によるフルカラーＬＥ
Ｄ表示素子（以下、単にＬＥＤ表示素子と記す）の斜視
図、図２は図１のＬＥＤ表示素子の内部結線図、図３は
図１のＬＥＤ表示素子の点灯回路図、図４はその点灯タ
イミングを示した図である。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS One embodiment of the present invention will be described with reference to FIGS. FIG. 1 shows a full-color LE according to the present embodiment.
FIG. 2 is a perspective view of a D display element (hereinafter simply referred to as an LED display element), FIG. 2 is an internal connection diagram of the LED display element of FIG. 1, FIG. 3 is a lighting circuit diagram of the LED display element of FIG. FIG. 4 is a diagram showing timing.

【００１４】本実施例のＬＥＤ表示素子１は、図１に示
すように、リード端子２の端部の搭載部３に赤色、青
色、緑色にそれぞれ発光するＬＥＤチップ４、５、６を
一緒に搭載し、それぞれのチップを金線７によってリー
ド端子８、９に接続している。この接続の回路構成は図
２に示すように、赤色のＬＥＤチップ４と緑色のＬＥＤ
チップ６を違いに逆極性となる状態で並列接続し、これ
と青色のＬＥＤチップ５とをさらに並列接続している。As shown in FIG. 1, the LED display element 1 of this embodiment has LED chips 4, 5, and 6, which emit red, blue, and green light, respectively, on a mounting portion 3 at the end of a lead terminal 2. Each chip is mounted and connected to lead terminals 8 and 9 by gold wires 7. The circuit configuration of this connection is, as shown in FIG.
The chips 6 are connected in parallel with a different polarity, and this and the blue LED chip 5 are further connected in parallel.

【００１５】ところで、この回路構成では、赤色のＬＥ
Ｄチップ４と緑色のＬＥＤチップ６とを逆極性接続して
いるので、ある瞬間に赤色と緑色とを同時に点灯させる
ことはできない。そこで、この混色の状態を実現するた
めに、図３に示すような点灯回路１０で、赤色の点灯タ
イミングと緑色、青色の点灯タイミングとをずらせる時
分割駆動を行っている。By the way, in this circuit configuration, the red LE
Since the D chip 4 and the green LED chip 6 are connected in reverse polarity, it is impossible to simultaneously light red and green at a certain moment. Therefore, in order to realize this mixed color state, the lighting circuit 10 as shown in FIG. 3 performs time-division driving in which the lighting timing of red and the lighting timing of green and blue are shifted.

【００１６】図３において、Ｔｒ１〜Ｔｒ５はタイミン
グをとるためのトランジスタ、Ｒ１１〜Ｒ４４は抵抗、
１１はバイナリーカウンタ、１２はデコーダである。な
お、トランジスタの代わりにＦＥＴを使用してもよい。
各トランジスタのＯＮ，ＯＦＦとＲ，Ｇ，Ｂの点灯の関
係は以下の表１に示す通りである。In FIG. 3, Tr1 to Tr5 are transistors for timing, R11 to R44 are resistors,
11 is a binary counter, and 12 is a decoder. Note that an FET may be used instead of the transistor.
The relationship between ON / OFF of each transistor and lighting of R, G, B is as shown in Table 1 below.

【００１７】[0017]

【表１】 [Table 1]

【００１８】デコーダ１２の出力ＹがＬＯＷの際はＧ，
Ｂが、またＨＩＧＨの時はＲが点灯する。When the output Y of the decoder 12 is LOW, G,
When B is HIGH, R is lit.

【００１９】この点灯タイミングを図４に示す。この図
４に示す１周期Ｔの一連の点灯動作を速い周期で行うこ
とによって、あたかも赤色、緑色、青色の３色が同時に
点灯しているかのように、人間の目には映る。FIG. 4 shows the lighting timing. By performing a series of lighting operations of one cycle T shown in FIG. 4 in a fast cycle, human eyes can see as if three colors of red, green, and blue are lit simultaneously.

【００２０】このように、本実施例によれば、従来と変
わらない発光色を有し、しかもリード端子数を低減でき
るＬＥＤ表示素子を実現できる。この３本足のリードを
有する表示素子であれば、従来のステムタイプのものと
は異なり、基板への自動実装が可能となるため、表示器
の組み立てに要する時間、コストを大幅に削減でき量産
性を大幅に向上できる。As described above, according to the present embodiment, it is possible to realize an LED display element having the same emission color as the conventional one and capable of reducing the number of lead terminals. Unlike a conventional stem type device, a display element having these three legs can be automatically mounted on a substrate, so that the time and cost required for assembling the display device can be greatly reduced and mass production can be achieved. Performance can be greatly improved.

【００２１】また、図３に示した点灯回路１０は単一の
ＬＥＤ表示素子を点灯させるものであるが、これを多数
個並べて、図５に示すように、表示データを記憶する回
路と組み合わせることによって、マトリクス型の表示器
を実現できる。図５において、２２はデコーダ、２３及
び２４はそれぞれ、青色用のトランジスタ・ラッチ回路
及びソース型ドライバ、２５及び２６、２７及び２８は
それぞれ、緑色用、赤色用の回路である。The lighting circuit 10 shown in FIG. 3 is for lighting a single LED display element, but a large number of these are arranged and combined with a circuit for storing display data as shown in FIG. Thereby, a matrix type display can be realized. In FIG. 5, 22 is a decoder, 23 and 24 are a transistor latch circuit and a source type driver for blue, and 25 and 26, 27 and 28 are circuits for green and red, respectively.

【００２２】この回路においては、時分割駆動のタイミ
ング制御部分Ａ部と表示データの記憶、表示を行うＢ部
によって構成されている。Ｃ部は信号入力部である。本
実施例では、時分割の比率を図４に示すように、赤色は
一周期の内の１／４、緑色・青色は３／４の時間だけ点
灯させるようにしているが、図５のＡ部の構成を変える
ことにより任意の比率設定を行える。図６は図５のＣ部
に入力させる信号の波形図である。This circuit includes a timing control portion A for time-division driving and a portion B for storing and displaying display data. Part C is a signal input part. In this embodiment, as shown in FIG. 4, the ratio of the time division is such that red is lit for 1/4 of one cycle and green / blue is lit for 3/4, but A in FIG. An arbitrary ratio can be set by changing the configuration of the unit. FIG. 6 is a waveform diagram of a signal input to the portion C in FIG.

【００２３】本実施例においても、単一のＬＥＤ表示素
子の場合と同様、従来のステムタイプのものとは異な
り、基板への自動実装が可能となるため、表示器の組み
立てに要する時間、コストを大幅に削減でき量産性を大
幅に向上できる。Also in this embodiment, as in the case of a single LED display element, unlike the conventional stem type, it can be automatically mounted on a substrate, so that it takes time and cost to assemble the display. Can be greatly reduced, and mass productivity can be greatly improved.

【００２４】しかも、端子数が４本〜６本から３本とな
ることによって、ＬＥＤ表示素子を固定する基板構造自
体も簡単なものとなり、この結果、より小型で高密度の
マトリクス表示器を実現できる。In addition, since the number of terminals is reduced from four to six to three, the substrate structure for fixing the LED display element itself becomes simple, and as a result, a smaller and higher-density matrix display is realized. it can.

【００２５】[0025]

【発明の効果】以上のように、本発明によるＬＥＤ表示
素子は、従来のステムタイプのものとは異なり、基板へ
の自動実装が可能となるため、表示器の組み立てに要す
る時間、コストを大幅に削減でき量産性を大幅に向上で
きる。As described above, unlike the conventional stem type, the LED display element according to the present invention can be automatically mounted on a substrate, so that the time and cost required for assembling the display are greatly reduced. And mass productivity can be greatly improved.

【００２６】しかも、端子数が従来の４本〜６本から３
本となることによって、ＬＥＤ表示素子を固定する基板
構造自体も簡単なものとなり、この結果、より小型で高
密度の表示器を実現できる。In addition, the number of terminals is reduced from the conventional four to six to three.
By using the book, the substrate structure for fixing the LED display element itself becomes simple, and as a result, a smaller and higher-density display device can be realized.

【図面の簡単な説明】[Brief description of the drawings]

【図１】本発明の一実施例によるＬＥＤ表示素子の斜視
図である。FIG. 1 is a perspective view of an LED display device according to an embodiment of the present invention.

【図２】図１のＬＥＤ表示素子の内部結線図である。FIG. 2 is an internal connection diagram of the LED display element of FIG. 1;

【図３】図１のＬＥＤ表示素子の点灯回路図である。FIG. 3 is a lighting circuit diagram of the LED display element of FIG. 1;

【図４】図３の点灯回路の時分割点灯のタイミングを示
す図である。FIG. 4 is a diagram showing timing of time-division lighting of the lighting circuit of FIG. 3;

【図５】図１のＬＥＤ表示素子を複数個使用したマトリ
クス表示器の点灯回路図である。FIG. 5 is a lighting circuit diagram of a matrix display using a plurality of the LED display elements of FIG. 1;

【図６】図５の点灯回路への入力信号図である。6 is an input signal diagram to the lighting circuit of FIG. 5;

【図７】従来例によるＬＥＤ表示素子の斜視図（ａ）及
び内部結線図（ｂ）である。FIG. 7 is a perspective view (a) and an internal connection diagram (b) of an LED display element according to a conventional example.

【図８】図７のＬＥＤ表示素子を複数接続する場合の接
続図である。FIG. 8 is a connection diagram when a plurality of LED display elements of FIG. 7 are connected.

【図９】図８の点灯回路図である。FIG. 9 is a lighting circuit diagram of FIG. 8;

【符号の説明】[Explanation of symbols]

１ ＬＥＤ表示素子 ２ リード端子 ３ 端部 ４ 赤色ＬＥＤチップ ５ 青色ＬＥＤチップ ６ 緑色ＬＥＤチップ １０ 点灯回路 DESCRIPTION OF SYMBOLS 1 LED display element 2 Lead terminal 3 End part 4 Red LED chip 5 Blue LED chip 6 Green LED chip 10 Lighting circuit

───────────────────────────────────────────────────── フロントページの続き (58)調査した分野(Int.Cl.7，ＤＢ名) G09G 3/14 G09G 3/32 H01L 33/00 ──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int.Cl. 7 , DB name) G09G 3/14 G09G 3/32 H01L 33/00

Claims (3)

(57)【特許請求の範囲】(57) [Claims] 【請求項１】 ＬＥＤ表示素子と該ＬＥＤ表示素子を点
灯駆動する点灯回路とを有し、 前記ＬＥＤ表示素子は、3本のリード端子の１本の端部
に、赤色、青色、緑色のＬＥＤチップを近接して搭載
し、前記3チップの内の2チップを、逆極性で搭載し且つ
並列接続となるように他のリード端子にワイヤー接続す
るとともに、他の1チップをさらに他のリード端子にワ
イヤー接続してなり、 前記点灯回路は、前記逆極性で搭載されたＬＥＤチップ
の一方と、該ＬＥＤチップに並列接続された他の1チッ
プを同時に駆動させると共に、他の逆極性で接続された
ＬＥＤチップとで2分割駆動する手段を備えてなること
を特徴とするＬＥＤ表示器。An LED display element and a lighting circuit for driving and driving the LED display element, wherein the LED display element has red, blue, and green LEDs at one end of three lead terminals. Chips are mounted close to each other, two of the three chips are mounted in reverse polarity, and wires are connected to other lead terminals so as to be connected in parallel, and another one chip is further connected to another lead terminal The lighting circuit is an LED chip mounted with the opposite polarity.
And one other chip connected in parallel to the LED chip.
Drive at the same time and connected with other reverse polarity
An LED display comprising: means for driving the LED chip into two parts. 【請求項２】 前記2分割駆動する手段は、並列接続さ
れた２チップの点灯時間を、並列接続されていない他の
１チップよりも長く駆動してなることを特徴とする請求
項１に記載のＬＥＤ表示器。 2. The method according to claim 1, wherein said means for driving in two is connected in parallel.
The lighting time of the two chips
Claims characterized by being driven longer than one chip
Item 2. An LED display according to item 1. 【請求項３】 前記逆極性で搭載する2チップは、緑色
と青色のＬＥＤチップであることを特徴とする請求項1
又は２に記載のＬＥＤ表示器。 3. The two chips mounted in opposite polarities are green.
And a blue LED chip.
Or the LED display according to 2.
JP29925693A 1993-11-30 1993-11-30 LED display Expired - Fee Related JP3059871B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP29925693A JP3059871B2 (en) 1993-11-30 1993-11-30 LED display

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP29925693A JP3059871B2 (en) 1993-11-30 1993-11-30 LED display

Publications (2)

Publication Number Publication Date
JPH07152337A JPH07152337A (en) 1995-06-16
JP3059871B2 true JP3059871B2 (en) 2000-07-04

Family

ID=17870185

Family Applications (1)

Application Number Title Priority Date Filing Date
JP29925693A Expired - Fee Related JP3059871B2 (en) 1993-11-30 1993-11-30 LED display

Country Status (1)

Country Link
JP (1) JP3059871B2 (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3548713B2 (en) 2000-12-08 2004-07-28 ホシデン株式会社 Image sensor mouse
JP2007288169A (en) * 2006-03-24 2007-11-01 Ricoh Co Ltd Optical element, illumination device, and image display
JP2018106049A (en) 2016-12-27 2018-07-05 ソニー株式会社 Light source device, light-emitting device, and display device

Also Published As

Publication number Publication date
JPH07152337A (en) 1995-06-16

Similar Documents

Publication Publication Date Title
JP3059871B2 (en) LED display
US20040046721A1 (en) Method for driving full-color LED display board
JP3564359B2 (en) Light emitting diode drive circuit
JP2883250B2 (en) Multi-color light-emitting display device
JPS63254490A (en) Information display device
JP2770422B2 (en) Indicator lighting device
JPH0619425A (en) Light emission diode display device
JPH10261819A (en) Led driving circuit device
CN220065729U (en) LED packaging structure, LED display module and LED display screen of lamp drive unification
US11922861B1 (en) Micro light-emitting diode display device and driving method thereof
JP3467045B2 (en) LED dot matrix type full color display
JP2786569B2 (en) LED display
CN116235237A (en) Display device, display panel and driving method thereof
US20240221606A1 (en) Display apparatuses, display panels, and methods of driving display panels
JP2788678B2 (en) Three-color LED drive circuit
JPH09258693A (en) Full color led dot matrix display device
JPH0799465B2 (en) Display device
JPH066514Y2 (en) Light emitting diode drive circuit
TW202420282A (en) Display backplane with shared drivers for light source devices
JPS62232682A (en) Light emitting display plate
CN115002960A (en) Lamp string control device and method
JPS5960489A (en) Bar graph display
CN116206554A (en) LED unit substrate, LED panel, LED device and preparation method
JPS59139091A (en) Display unit
JP2007012405A (en) Lighting system

Legal Events

Date Code Title Description
FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20080421

Year of fee payment: 8

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20090421

Year of fee payment: 9

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20090421

Year of fee payment: 9

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20100421

Year of fee payment: 10

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20100421

Year of fee payment: 10

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20110421

Year of fee payment: 11

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20120421

Year of fee payment: 12

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20120421

Year of fee payment: 12

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20130421

Year of fee payment: 13

LAPS Cancellation because of no payment of annual fees