JP3034553B2 - Image processing device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION << Industrial Application Field >> The present invention relates to a copying apparatus for reading an image of a document, processing the read image data and copying the image data on a thermosensitive paper or the like, or perforating a thermosensitive stencil sheet. BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a stencil making (digital printing) apparatus and a device such as a facsimile machine and a digital copying machine, and more particularly to an image processing apparatus which binarizes the density of a read original and outputs it as binary data.

<< Prior Art >> In a conventional copying apparatus, plate making apparatus, facsimile, or other apparatus, an image of a document is read by a reading means such as a CCD sensor and image data of the read document, that is, an image for binarizing the density of the document. By using the processing device, the image of the document is output clearly.

Further, as the binarization processing technology of the image processing apparatus, the following two types have been developed roughly.

That is, a threshold value is sequentially calculated by a calculating means based on a document density value input to an image processing apparatus, and image data is processed by the calculated threshold value. No. 51105, JP-B-63-237
Japanese Patent Publication No. 08-55796, Japanese Patent Publication No. 1-55796, and the like.

Next, an image processing apparatus configured to output binary data using local features such as a peak value or a bottom value of the document density input to the image processing apparatus includes, for example,
JP-B-61-26744, JP-B-62-15351, JP-B-62-16061 and the like can be mentioned.

<< Problems to be Solved by the Invention >> However, in the conventional image processing apparatus described above, in the case of, for example, the document density values sequentially input from the image input unit are sequentially calculated by the calculating means. It is necessary to perform calculations and set thresholds, which requires a large-capacity memory and calculation means for performing various calculations, and the image processing apparatus itself becomes very complicated and large-scale. As a result, there is a problem that the image processing apparatus itself becomes expensive.

In the case of (2), when the characteristics of the original document match, that is, when the threshold is set for each line, 2
It is good if the data is displayed by being divided into value data, but if they do not match, an image with very poor readability will be reproduced. For example, (a) threshold response type (line of original density) for each line (B) setting a threshold value based on the threshold value and the bottom value), (b) in the case of an appropriate threshold response type in a line (using an integral format in which document density is output via a filter), etc. But the above (a), (b)
Has the following problems.

Looking at the case where the document density level is low using the apparatus of (a), as shown in FIGS. 18 (a) and (b),
When the "positive" 100 of the intermediate density drawn on the white character portion of the original X and the "positive" 102 drawn on the base 101 of the original density level of the intermediate gradation are separated from the A line and the B line, the printing is performed. The image copied on the paper P is a reproduced image as shown in FIG. 19, and the “positive” 100 that does not reach the threshold value is deleted, and the “correct” 102 is a character that is difficult to distinguish as shown in the figure. Become.

Next, even when the same apparatus as in (a) is used, the case where the document density level is high is now examined, and FIG. 20 (a), (b)
When the image processing apparatus is operated as shown in FIG. 21, when the density level is high as shown in FIG. 21, the original base 101 portion is displayed in black, and the "correct" 102 is determined in the same manner as described above. There is a problem that reproduction is difficult.

Further, (b) differs depending on the integration time constant as shown in FIGS. 22 (a) and (b), but for example, as shown in FIG. There are also problems such as that only a part of the document base 101 is displayed, and also in this case, it is very difficult to determine the characters to be reproduced similarly to (a) described above.

An image processing apparatus according to the present invention has been made to solve the above-described problem, and has as its object to fix a threshold value to a relatively high density level and to set the threshold value. Document density based on the threshold
By displaying the value as a value and displaying the change point of the document density as image data, the reproduced image can be very easily viewed. In addition, the memory capacity is small, a simple circuit configuration is required, and low cost can be achieved. An image processing device is provided.

<< Means for Solving the Problems >> In order to achieve the above object, an image processing apparatus according to the present invention binarizes image data of a document read by document reading means into black data and white data. In the image processing apparatus, when the document density is less than a predetermined threshold, white data is output, and when the document density is equal to or more than the predetermined threshold, a signal for outputting black data is output. A first black data signal output means, a second black data signal output means for detecting a change point of the document density, and outputting a signal indicating only the detected change point as black data; and a first black data signal. And a third black data signal output unit that performs a logical sum operation on an output from the signal output unit and an output from the second black data signal output unit.

<Operation> According to the apparatus of the present invention having the above configuration, the threshold value is fixedly set at a relatively high level of the document density, and the document density is set to two values based on the set threshold value. First output means for converting and outputting the original density, second output means for detecting a change point of the document density and outputting only the change point, and third output means for outputting an output logical sum of the output means. And the threshold value set to a relatively high density level, the reproduced image is expressed with the same density for the high original density, and Document density lower than the threshold
It is possible to obtain a reproduced image expressing only the change point where the document density changes. Therefore, when the document density is lower than the threshold value, the edge portion where the document density changes is displayed in a frame shape. Since characters, symbols, and the like having a high density level are expressed, a reproduced image with extremely high decipherability can be provided.

<< Description of Embodiments >> Hereinafter, an embodiment of an image processing apparatus according to the present invention will be described with reference to the drawings.

FIG. 1 is a schematic explanatory view for explaining the operation of the entire stencil printing apparatus using the apparatus of the present invention, FIG. 2 is a circuit block diagram showing a basic circuit configuration of the printing apparatus of FIG. 1, and FIG. FIG. 3 is a circuit block diagram showing a basic circuit configuration of the device of the present invention shown in FIG.

As shown in FIG. 1, a stencil printing apparatus using the image processing apparatus of the present invention includes a CCD sensor 1 for picking up an image of an original X.
An image processing device 2 for processing an image signal of the document X picked up by the CCD sensor 1, a thermoplastic heat-sensitive film and an ink permeability based on the image data processed by the image processing device 2. Plate making means 3 for forming a perforated image on a master Z made of a support, a drum 4 around which the master Z is wound, and a drum 4 and a press roller 5
A printing / transporting unit 6 for transferring the ink passing through the perforated image portion formed on the master Z with the printing paper P interposed therebetween and transferring the printing paper P; .

The circuit configuration of the entire printing apparatus including the image processing apparatus 2 used at this time is, as shown in FIG.
An image input unit 8 having an all-pixel correction circuit 7, an image processing unit 9 for binarizing image data input from the image input unit 8, and a data processing unit 10 for instructing a reproduced image of a document And an image output unit 11 that outputs image data instructed by the data processing unit 10.

As shown in the figure, the CCD sensor 1 (contact type image sensor) of the image input unit 8 is connected to the photographic processing circuit 12, the data switching circuit 13, and the mask processing circuit 14 of the image processing unit 9 via the all-pixel correction circuit 7. Have been. Further, the mask processing circuit 14
The thermal head 15 of the image output unit 11 is connected.

On the output side of the all-pixel correction circuit 7, a binarization processing circuit 16 is connected in parallel with the photo processing circuit 12, and the photo processing circuit 12 converts the input image data into binary gradation data. The grayscale data and the binarization processing circuit 16 are configured to input the binary data to the data switching circuit 13, respectively.

As shown in FIG. 3, a binarization processing circuit 16 connected to the image input unit 8 and built in the image processing apparatus 2 is connected in parallel to the output side of the all-pixel correction circuit 7 of the image input unit 8. An edge detection circuit 17 and an absolute value detection circuit 18 are provided.

The edge detection circuit 17 detects a change point portion of the input image data, and outputs a thin line compensation signal.
That is, an AND circuit, that is, AND
It is connected to the input side of the circuit 20.

On the other hand, the output side of the absolute value detection circuit 18 has two output sections 18.
The output unit 18a is connected to the other input side of the OR circuit 19, and the other output unit 18b is connected to the other input side of the AND circuit 20.

That is, the schematic circuit block diagram of the image processing apparatus 2 which is the apparatus of the present invention is shown in FIG.
A change point of the document density in the base 101 portion of the image on which the document X is drawn is detected, and the detected signal is output to the OR circuit 19 as a fine line compensation signal. On the other hand, in the absolute value detecting circuit 18, in order to distinguish image data of a dark character portion such as a character, a symbol or a figure input from the CCD sensor 1 of the image input section 8 from the other, a relatively dark level of the original density is used. And the document density is clearly binarized into white and black based on the threshold value, and when the density level is higher than the threshold value, the forced black signal is output.
Output to the OR circuit 19, and when it is lower than another threshold having a relatively low density level, a forced white signal is output to the AND circuit 20. It is configured to output binary data that has been binarized.

As shown in FIGS. 4, 8, and 10, the internal circuit configuration of the edge detection circuit 17 is configured such that the output side of the all-pixel correction circuit 7 of the image input section 8 is connected in parallel to the original. A multiplier 21 for eliminating a change such as noise that affects the detection of density, a magnitude comparator 22 for inputting document density data output from the multiplier 21 to one input side, and a previous input A latch circuit (hereinafter, referred to as a one-dot delay circuit) 23 for holding the data of the original density of one dot, and the original density data of one dot before output from the one-dot delay circuit 23 A comparison is made between the magnitude comparator 22 input to the other input side and the original density input from the previous and the current input, and the falling edge pulse is ORed.
Falling edge pulse output circuit to output to gate circuit 19
Has 23.

4 and 5, the output side of the one-dot delay circuit 23 is connected in parallel with the magnitude comparator 22 to directly output the output signal of the original density output from the one-dot delay circuit 23. Large / small comparator 24 having an input section for outputting
To hold and delay the input signal of the original density output from the dot delay circuit 23 by one dot.
A dot delay circuit 25 and a multiplier 26 for eliminating noise components from the original density signal output from the delay circuit 25
And a rising edge pulse output circuit 27 for comparing the signal of the original density one dot before output by a multiplier 26 described later with the signal of the original density inputted this time and outputting a rising edge pulse of the original. doing.

The rising edge detection circuit 27 has the following characteristics:
The input density level and output pulse characteristics are set as shown in FIGS. 6 (a) and 6 (b).

Further, the falling edge detection circuit 23 shown in FIG.
The input density levels, output pulse characteristics, and delay density levels are set as shown in FIGS. 9 (a), (b) and (c).

Further, the characteristics of the connection of the falling edge detection circuit 23 and the rising edge detection circuit 27 as shown in FIG. 10 include the input density level, output pulse characteristics, and the like as shown in FIGS. 11 (a) to 11 (e). The delay density level and its output pulse characteristics are set.

The absolute value detection circuit 18 is shown in FIGS. 4 and 12 (a),
As shown in FIG. 12B, there is provided a white / black discriminating means 28 comprising a forced black detection circuit 28a and a forced white detection circuit 28b. The forced black detection circuit 28a determines the document density in FIG. As shown, for example, a data input unit 29 for inputting an original density input signal obtained by digitizing an original density input signal output from the all pixel correction circuit 7 into D0 to D7.8 / 8 bits in 256 steps, And an AND gate circuit 30 that is turned on when the upper two bits of the input data among the data D0 to D7 input to the unit 29 are 1, that is, when there is an input of D6 and D7,
When the upper 2 bits of the input data are 1, ie, & HC0
(192) 192/256 = 75% threshold is fixedly set,
When the document density level is 75% or more, a forced black signal is output to the OR gate circuit 19.

Further, as shown in FIG. 12 (b), the forced white detection circuit 28b includes, for example, a data input unit 28 for dividing and inputting 8-bit density data into D0 to D7 and inputting 8-bit density data D0 to D7. When the upper 3 bits of the data are 0, & H20 (32),
That is, at a document density of less than 32/256 = 12.5%, an OR gate circuit 34 that outputs forced white data to the AND gate circuit 20
have.

The multiplication circuits 21 and 26 are for inputting the original density signals D0 to D7 input from the all-pixel correction circuit 7 and selecting them, for example, as shown in FIG.
Input data is input by two-input OR gates 31-33.
The data value & H80 (128) or more is fixed to the value of & HE0 (224), and the data value & H10-7F (16 to 127) is about twice the output (because the lower 4 bits are truncated). It is configured to output density data.

In this embodiment, the original density signal from the all-pixel correction circuit 7 is divided into 256 steps, input to the forced black detection circuit 28a and the forced white detection circuit 28b, and output binary white / black data. Although it is constituted so that it is not necessarily limited to this. Also, the threshold value to be set may be set in a range of about 75%, which is relatively high of the document density level, and is not limited to the threshold value of 75%.

Black and white 2 output from the image processing apparatus 2 having the above configuration
The value data is sent to the data switching circuit 13 as shown in FIG.

The data switching circuit 13 is configured to select either the input binary data or the grayscale data and input the selected data to the mask processing circuit 14.

In FIG. 2, the image clock circuit 46 of the image processing unit 9 is shown.
Are provided so as to output a synchronizing signal at the time of input / output of image data to the photograph processing circuit 12 and the binarization processing circuit 16 as shown in FIG. The thermal head 15 of the image output unit 11 and the counter 47 of the data processing unit 10 are connected.

The photographic processing circuit 12 is configured so that, when image data is input from the image input section 8, the image data is replaced with gradation data and output to the data switching circuit 13.

When the image data is input from the image input unit 8, the binarization processing circuit 16 binarizes the image data into white and black, and converts the obtained binary data to a data switching circuit 13. It is configured to output to the DP-RAM 48 of the data processing circuit 10.

The data processing unit 10 includes a counter 47 for input / output timing of image data, and a CCD sensor of the image input unit 8 for confirming an area of a document in advance during pre-scanning.
1, a DP-RAM 48 in which binary data indicating an area of a document is stored via a binarization processing circuit 16 of the image processing unit 9;
-Based on the binary data input to the RAM 48, the binary data is added with a forced photographic signal or a forced white signal and input to the RAM 50. At the time of the main scan, the DP-RA is used based on the binary data.
The CPU 49 is an input / output control unit that outputs forced photographic data from the M48 to the data switching circuit 13 or outputs forced white data from the DP-RAM 48 to the mask processing circuit 14.

The data switching circuit 13 is normally configured to output binary data to the mask processing circuit 10.

Further, as shown in FIG. 2, the data switching circuit 13 is connected so that image data from an external I / F circuit such as a computer or a digitizer can be input thereto. It is configured such that any one of binary data, gradation data, and image data from a computer or a digitizer is appropriately selected.

The mask processing circuit 14 includes an AND circuit.
Normally, binary data is output, but when a command signal of forced white data is output from the DP-RAM 48, a signal for changing the floating black binary data portion of the document to white is interrupted.
The image data obtained by folding the binary data and the white data is input to the thermal head 15.

 Next, the operation of the apparatus of the first embodiment will be described.

First, as shown in FIG. 16A, when the CCD sensor 1 is moved in the main scanning direction and point A is read for one line, the time of the density level as shown in FIG. Since the threshold value of the black detection circuit 28a of the absolute value detection circuit 18 is fixed at 75% or more, which is a high level of the original density, characters, symbols, figures, etc. of the original density are drawn. Are clearly indicated.

Moreover, even when characters, symbols, figures, and the like are drawn on the base 101 of the medium density under the characters, descriptions, figures, and the like as shown in the figure, only the change point of the medium density is indicated by a frame 10 as shown in the figure.
3 is set, and the others are displayed on a white background except for the parts where characters, symbols, figures, etc. are drawn, so that the base 101 of the intermediate density is reliably recognized. The letter "102" becomes very easy to read.

Further, since the multiplication circuits 21 and 26 are provided as noise elimination means, a noise component is included in the original density signal of the image data input from the CCD sensor 1 via the all-pixel correction circuit 7. Since the noise component is eliminated even at the time, the edge pulse and the rising edge pulse are accurately reproduced at the falling edge, and the exact characters, symbols,
A figure or the like is reproduced.

Moreover, since a time lag is provided by a one-dot delay circuit between the output falling edge pulse and the output rising edge pulse, FIGS. 6 (a) and (b) and FIG. 9 (a) , (B) and (c) are synchronized, and an accurate change point of the document density can be obtained.

As described above, according to the apparatus of the first embodiment, the threshold value is fixedly set at a relatively high level of the document density, and the change point of the document density is displayed as image data, thereby storing the document. Means and complicated calculations are not required, and a simple circuit configuration suffices to achieve low cost. In addition, the reproduced image can be very easily viewed. ,
The configuration is such that image data from a computer, a digitizer or the like can be input and the image data can be output from the thermal head 15, so that usability is improved.

FIG. 14 shows a second embodiment of the apparatus of the present invention. The basic circuit configuration is the same as that of FIG. 2 of the first embodiment, and the multiplication circuits 21 and 26 of FIG. In the first embodiment, the multiplication circuit is fixed at twice as much as that in the first embodiment. However, in the second embodiment, the multiplier in the edge detection circuit is adapted to correspond to the document density, or A ROM is provided so that the CPU can freely convert the multiplied value of the multiplier by a ROM table as shown in FIG.

That is, in the case of the second embodiment, the same operation and effect as those of the first embodiment can be obtained, but in this case, there is an effect that a more appropriate document density can be handled.

FIG. 15 shows a third embodiment of the device of the present invention.
The difference from the first embodiment is that the first embodiment is provided with a delay circuit for detecting the document density for each dot in the main scanning direction. In this case, the image data for each line is One-line delay circuits 51 and 52 for detection are provided, and the one-line delay circuits 51 and 52 compare the previous line with the line currently being detected by a vertical direction circuit 53, and detect image data in the sub-scanning direction. The other configuration is the same as that of the first embodiment, and the description is omitted.

In addition to the third embodiment, for example, original density data for each line is input to the RAM 50 via the CPU 49, and the CPU
The density can be compared with the current density of the original document being input to the data switching circuit 13 and output to the data switching circuit 13 as binary black / white data.

Also in this case, it is sufficient to use the memory capacity of the RAM 50 a little, and the same operation and effect as in the first embodiment can be obtained.

In the first embodiment described above, the binarization processing circuit 16 is connected in parallel with the photo processing circuit 12, but the present invention is not limited to this. Binary processing circuit in series with data switching circuit 13
16 may be connected. In this case, the same operation and effect as in the first embodiment are obtained, except that the gradation data cannot be selected.

<< Effects of the Invention >> As is clear from the above description, the present invention has the following effects.

According to the first aspect of the invention, when the document density is less than the predetermined threshold, white data is output, and when the document density is equal to or more than the predetermined threshold, black data is output. A first black data signal output unit for outputting a signal, a second black data signal output unit for detecting a change point of the document density, and outputting a signal in which only the detected change point is set as black data; And a third black data signal output means for performing a logical sum operation on the output from the black data signal output means and the output from the second black data signal output means, so that the level having a relatively high density level is obtained. For the document density higher than the threshold value set in, the reproduced image is expressed with the same density, and in the portion of the document density lower than the threshold value, only the change point where the document density changes is expressed Playback image Therefore, when the document density is lower than the threshold value, an edge portion of the document density is expressed, so that a reproduced image with extremely good readability can be obtained, and storage means is also required. Therefore, the circuit configuration can be simplified, and the device itself can be manufactured at low cost.

[Brief description of the drawings]

FIG. 1 is a schematic explanatory view for explaining the operation of the entire stencil printing apparatus using the apparatus of the present invention, FIG. 2 is a circuit block diagram showing a basic circuit configuration of the printing apparatus of FIG. 1, and FIG. 2
FIG. 4 is a circuit block diagram showing a basic circuit configuration of this device shown in FIG. 4, FIG. 4 is a circuit block diagram showing a first embodiment of this device, FIG. 5 is a circuit block diagram of an edge detection circuit used in this device, FIGS. 6 (a) and 6 (b) are time charts of input density level and pulse showing a change point of document density, and FIG.
FIG. 8 is a circuit configuration diagram of a multiplying circuit used in this device, FIG. 8 is a circuit block diagram of a falling detection circuit used in this device, and FIGS. 9 (a) to 9 (c) each show a falling edge detection circuit. FIG. 10 is a flowchart showing the characteristics of the input density level and the pulse output. FIG. 10 is a circuit block diagram of the both-edge detection circuit.
FIGS. 11 (a) to 11 (e) are flow charts of density levels and pulses output from the two-edge detection circuit shown in FIG. 10, respectively. FIG. 12 is a circuit block diagram of an absolute value detection circuit used in this device. 13 (a) to 13 (c) are flowcharts of the absolute value detection circuit and the input density level used in FIG. 12 and the pulses output from the circuit, and FIG. 14 is the multiplication used in the second embodiment. A characteristic diagram showing characteristics of a multiplied value of the circuit,
FIG. 15 is a circuit block diagram showing a third embodiment of this device,
FIG. 16 (a) is an explanatory view showing a scanning state of the apparatus, and FIG.
FIG. 16 (b) is a flowchart of the density level at point A in FIG. 16 (a). FIG. 17 is an explanatory diagram showing a state of output using this apparatus. FIGS. 18 (a) and 18 (b) are respectively FIG. 19 is an explanatory diagram showing a scanning state in a conventional apparatus, and a flowchart of a density level and a threshold value. FIG. 19 is an explanatory diagram showing a copying state output to printing paper from the scanning result in FIG. 18, and FIGS.
(B) is an explanatory diagram showing another example of the conventional device, and a flowchart of the density level and the threshold value. FIG. 21 is an explanatory diagram of a document image output by the conventional device in FIG. 20, and FIG. ,
(B) is an explanatory diagram showing another example of the conventional device, and a flowchart of the density level and the threshold value. FIG. 23 is an explanatory diagram of a document image output from the conventional device in FIG. 1 CCD sensor (reading means) 2 Image processing device 16 Binarization processing circuit 17 Edge detection circuit 18 Absolute value detection circuit 19 OR circuit (OR circuit) 20 Logic Product circuit (AND circuit) 21,26 …… Multiplication circuit

──────────────────────────────────────────────────続 き Continuation of the front page (56) References JP-A-59-8474 (JP, A) JP-A-1-113789 (JP, A) JP-A-61-103372 (JP, A) (58) Investigation Field (Int.Cl. ⁷ , DB name) H04N 1/40-1/409 H04N 1 / 46,1 / 60 G06T 1/00

Claims (1)

(57) [Claims] An image processing apparatus for binarizing image data of a document read by document reading means into black data and white data, wherein when the document density is less than a predetermined threshold value, the white data A first black data signal output means for outputting a signal for outputting black data when the document density is equal to or higher than the predetermined threshold value; and detecting a change point of the document density. A second black data signal output means for outputting a signal having only the changed point as black data, and an output from the first black data signal output means and an output from the second black data signal output means. And a third black data signal output unit for performing a logical sum operation.