JP3033696B2 - Recording amplifier circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a recording amplifier used in a head amplifier for a VTR, and more particularly to a recording amplifier circuit for preventing generation of a mustache current generated when switching from reproduction to recording mode.

[0002]

2. Description of the Related Art A recording amplifier circuit of this type is a circuit provided to supply a recording current to a VTR head and to control the amount of the supplied current. One example of this recording amplifier circuit is described in Japanese Patent Application Laid-Open No. 6-12607. The recording amplifier circuit described in this publication describes a technique for dulling the rise and fall of the recording current waveform. According to this technology, a function of preventing a beard-like noise generated at the time of switching from reproduction to recording is also provided. However, since a large current flows when switching from reproduction to recording, noise different from the above-described noise also occurs. .

Referring to FIG. 4, which shows a configuration diagram of an example of the above-described conventional recording amplifier circuit, the recording amplifier circuit includes a reference current generating circuit section 1 and a ramp circuit section 2 for generating a recording current to be supplied to a head. And a recording amplifier unit 3 for amplifying the current supplied from the lamp circuit unit 2 and supplying the amplified current to the head. The reference current generation circuit unit 1 includes a resistor R1 and a capacitor connected in parallel via a terminal CURR6. C1 is externally connected to the ground potential.

The lamp circuit 2 is connected to a lamp terminal 7 to which a capacitive element c2 is connected and a constant current source 5 for controlling the amount of current to slow the rise and fall of the current waveform and to form a gentle slope. Have been.

The recording amplifier 3 is connected to a REC IN terminal 8 to which a recording signal is supplied and a constant current source 5, and converts the supplied recording signal into a current and supplies it to the head 4.

In this conventional recording amplifier system circuit, a current is supplied from the reference current generation circuit unit 1 to each constant current source.

At the time of PB (reproduction), the recording amplifier circuit is in a non-operating state. When the recording amplifier circuit is switched to REC (recording), a current is supplied from the reference current generation circuit 1 to the lamp sections 2 and the recording amplifier circuit section 3. Start working. At this time, since the CURR terminal 6 is pulled up to a constant voltage, a large current flows through the external capacitive element C1 for a moment. This large current becomes the reference current and is supplied to the lamp sections 2 and the recording amplifier circuit section 3.

The resistance value of the external resistance element R1 is provided for determining the current value of the output current, and is set in advance in consideration of the characteristics of the connected head.

Referring to FIG. 5, which shows a circuit diagram of the above-described conventional recording amplifier circuit, the reference current generating circuit section 1 includes a feedback amplifier 10 and a current supply circuit section 11, and the current supply circuit section 11 has respective emitters. PNP transistor Q which forms a differential transistor by connecting electrodes to power supply voltage VCC via resistance elements R1, R2, R3, respectively.
1, and Q2, Q3, and PNP transistor Q4 for connecting the collector electrode to the ground potential with the base electrodes of these transistors are connected to the emitter electrode to the collector electrode of the PNP transistor Q1 is commonly connected, and the collector electrode of the PNP transistor Q2 When connected in series with the ground potential via the external terminal CURR6, a resistance element R1,
The feedback amplifier 10 is supplied with a voltage of 2 V to the (-) input terminal only at the time of recording, the (+) input terminal is connected to the external terminal 6, and the output terminal is connected to the output terminal. It is connected to the base electrode of the PNP transistor Q4.

In the lamp circuit section 2b, the respective emitter electrodes are commonly connected to a constant current source 5j connected to the ground potential, the collector electrode is connected to the power supply potential VCC, and the base electrode is 1.7V to 2.7V. The NPN transistor Q18 to which the pulse voltage is supplied and the NPN transistor Q19 connecting the collector electrode to the constant current source 5o on the power supply potential side, the collector electrode to the power supply voltage VCC, and the emitter electrode to the ground potential side constant. An NPN transistor Q20 connected to the current source 5K and having a base electrode commonly connected to the collector electrode of the NPN transistor Q19 and the RAMP terminal 7, a capacitor C2 connected to the RAMP terminal 7 and the ground potential, and an NPN transistor Q20. Emi
And a resistance element R11 connected to the data electrode.

The recording amplifier section 3b has a collector electrode connected to the constant current source 5p on the power supply potential side, an emitter electrode connected to the constant current source 51 on the ground potential side, the other end of the resistance element R11 and the external terminal RE.
CIN and REC from the collector electrode.
An NPN transistor Q21 for outputting an output current, an NPN transistor Q22 having a collector electrode connected to the base electrode of the NPN transistor Q21 and a constant current source 5o on the power supply potential side, and a base electrode connected to the emitter electrode of the NPN transistor Q21 and a ground. An NPN transistor Q23 having a common electrode connected to the constant current source 5n connected to the potential, a collector electrode connected to the power supply potential VCC, and a base electrode supplied with the Bias voltage, and a PNP transistor Q23.
3 to the constant current sources 5i, 5j, 5k, 5l
Is supplied with a reference current.

In the operation of the circuit described above, a voltage of 2 V is first supplied to the (-) input terminal of the feedback amplifier 10 when switching from the reproduction mode to the recording mode. Feedback amplifier 1
The output of 0 is a differential transistor PNP transistor Q4
, The PNP transistors Q1, Q2, Q3
And the current I1 flows. Since the collector voltage of the PNP transistor Q2 is fed back to the (+) input terminal, the feedback loop operates so that the voltage at the (+) input terminal also becomes 2 V, and controls the amount of the current I1.

At this time, a large current I1 flows through the external capacitance element C1 momentarily when the (+) input terminal also tends to become 2 V,
This current is supplied from the collector electrode of a PNP transistor Q3 connected in parallel to the PNP transistor Q2 as a reference current to the constant current sources 5i, 5j, 5k and 51 of the lamp circuit section 2 and the recording amplifier section 3b. The whole starts working.

When the reference current is supplied from the reference current generating circuit 1, the ramp circuit 2b is driven by a pulse voltage of 1.7 to 2.7 V supplied to the base of the NPN transistor Q18. A signal corresponding to the pulse voltage appears at the collector electrode of NPN transistor Q19. At this time, the collector current is supplied to the capacitor C2 via the terminal 7.
, The rising and falling speeds of the voltage waveform become slower, and a malfunction due to a beard at the time of switching is prevented.

The NPN transistor Q20 is driven by the blunted voltage waveform, the base current of the NPN transistor Q19 is controlled by the emitter current of this transistor, and a current is output via the resistance element R11.

The operation of the recording amplifier section 3b is such that the NPN transistor Q22 is driven by the output current supplied from the ramp circuit section 2b via the resistance element R11,
The recording signal input from the CIN terminal 8 is converted into a current, and is output from the collector electrode of the NPN transistor Q21 to the REC amplifier as a current ΔI2.

That is, the REC output current ΔI2 of the recording amplifier unit 3b is ((base voltage of NPN transistor Q19) − (base voltage of NPN transistor Q22)) /
Resistance element R11 = ΔI2 The current is amplified by an amplifier and output.

At the moment when the mode is switched from the reproduction mode to the recording mode, the RAMP terminal 7 is kept at a high level due to the presence of the capacitor C2, and the base voltage of the NPN transistor Q19 is also at the high level. On the other hand, the NPN transistor Q
In the reference numeral 22, since a large current is supplied from the current supply circuit section 11 to the constant current source 51, its base voltage becomes a voltage close to the low level, and the base voltage difference between Q19 and Q22 causes ΔΔ.
REC despite the generation of I2 current and no recording signal
A current is supplied to the amplifier and becomes a mustache current.

Referring to FIG. 5 and FIG. 6 showing the configuration of the head 4 and FIG. 7 showing the output signals of four channels output from the recording amplifier section supplied to the head 4, each channel Are output with the mode switching pulse at a low level, and the output timings of the signals output from the respective heads overlap each other by 90 °. In the current circuit, when switching from the reproduction mode PB to the recording mode REC, a whisker current is generated in the output signal 1ch.

[0020]

In the above-described conventional recording amplifier circuit, when switching from the reproduction mode to the recording mode, a large current is used as a reference current from the reference current generation circuit unit 1 to the ramp circuit unit 2b and the recording amplifier unit 3b. It flows and the base electrode of the NPN transistor Q19 of the ramp circuit section 2b and the NPN transistor Q2 of the recording amplifier section 3b
A voltage difference occurs between both ends of the resistance element R11 connecting the second base electrode, and a drawback occurs in which a mustache current is generated and output in the output current of the recording amplifier unit 3b.

The structure of the head 4 is, for example, in the case of a movie, a video tape is in contact with 3/4 of the circumference of the drum,
That is, since only 270 ° of the 360 ° rotates around the drum, if a mustache current is generated even in only one channel, there is crosstalk in each channel, so that a mustache current flows through all the heads and erases the recorded portion. There is a problem that white scratches remain on the screen.

An object of the present invention has been made in view of the above-mentioned conventional problems. When a recording amplifier circuit for supplying a recording current to a VTR head is switched from a reproduction mode to a recording mode, a ramp circuit section is provided. An object of the present invention is to prevent a mustard current from being generated due to a potential difference between both ends of a resistance element connected to a recording amplifier.

[0023]

A recording amplifier circuit according to the present invention is used for a head amplifier of a VTR of a sequential recording system.
A ramp circuit section for gently changing the current waveform of the recording current supplied to the head section to reduce the occurrence of noise; and a recording signal supplied from the outside in response to the recording current supplied from the ramp circuit section. A recording amplifier circuit comprising: a recording amplifier unit that amplifies and supplies the same to the head; and a reference current generation circuit unit that supplies a reference current to an input unit of the recording amplifier unit and a constant current source of each of the ramp circuit units. An output current of the ramp circuit unit is used instead of the reference current supplied to an input unit of the recording amplifier unit.

In the lamp circuit section, a pulse voltage having a predetermined frequency is supplied to a base electrode, a collector electrode is connected to a power supply potential, and an emitter electrode is connected via a first constant current source. The first NPN transistor connected to the ground potential and the base electrodes of the first and second PNP transistors whose respective emitter electrodes are commonly connected to the first and second resistance elements connected to the power supply potential The collector electrodes of the first and second PNP transistors are commonly connected to the collector electrodes of the first and second PNP transistors, and the collector electrodes of the first and second PNP transistors are connected to the collector electrodes of second and third NPN transistors, respectively. The emitter electrodes of the third NPN transistors are commonly connected to the ground potential via the second constant current source Together are a differential amplifier formed by connecting the emitter electrodes of the the base electrode of the second NPN transistor the first NPN transistor, the collector electrodes and the external terminals and an external base electrode said third NPN transistor A fourth NPN transistor connected to a ground potential via a capacitor, a collector electrode connected to the power supply potential, and an emitter electrode connected to the ground potential via a third constant current source;
The base electrode is connected to the emitter electrode of the fourth NPN transistor, and the emitter electrode is connected to the resistance element R.
7, and is connected to a predetermined constant voltage determined in advance.
A fifth NPN transistor having a collector electrode connected to the ground potential via a fourth constant current source;
The base electrode is connected to the emitter electrode of the PN transistor, the collector electrode is connected to the power supply potential, and the emitter electrode is connected to the ground potential via the base electrode of the third NPN transistor and the fifth constant current source. And sixth NPN transistors connected to each other,
The output current supplied to the recording amplifier circuit section can be extracted from the collector electrode of the fifth NPN transistor.

Further, the predetermined low voltage is applied to the fourth NPN at the moment when the mode is switched from the reproduction mode to the recording mode.
The voltage is set in advance to a voltage lower than the voltage held by the second capacitor connected to the base electrode of the transistor.

[0026]

DESCRIPTION OF THE PREFERRED EMBODIMENTS In a conventional recording amplifier circuit, a reference current is created by an external resistor in consideration of temperature characteristics and fluctuations of a power supply voltage VCC and supplied to all circuits in a recording system. When switching from the recording mode to the recording mode, a large current always flows into the reference current generation circuit for a moment due to the circuit configuration.

In the conventional circuit configuration, since the reference current is supplied from the reference current generation circuit to all the circuits, a potential difference is generated between the lamp circuit and the recording amplifier circuit at the time of switching, and this is converted into a current, and further converted by the recording amplifier. It was amplified and a mustard current was generated.

On the other hand, in the recording amplifier circuit of the present invention, by using a ramp circuit as a current supply source of the recording amplifier, a circuit configuration in which an output signal is not output unless a recording signal is input is provided, thereby preventing a mustard current at the time of switching. A configuration that can be used. An embodiment will be described below with reference to the drawings.

FIG. 1 is a block diagram showing an embodiment of the present invention, and FIG. 2 is a circuit diagram thereof. Referring to FIG. 1, a recording amplifier circuit according to the present invention includes a reference current generation circuit 1
A lamp circuit section 2 for generating a recording current in the head; a recording amplifier section 3 for amplifying the current supplied from the lamp circuit section 2 and supplying the amplified current to the head;
Is a resistance element R connected in parallel via a terminal CURR6.
1 and the capacitor C1 are externally connected to the ground potential.

The lamp circuit 2a is connected to a lamp terminal 7 and a constant current source 5 to which a capacitive element c2 described later is connected so as to control the amount of current to slow the rise and fall of the current waveform and to form a gentle slope. Have been.

A REC IN terminal 8 to which a recording signal is supplied and a constant current source 5 are connected to the recording amplifier 3a. The supplied recording signal is converted into a current and supplied to the head unit 4 via a terminal 9. .

In the circuit of the recording amplifier system of the present invention, the reference current from the reference current generating circuit section 1 supplies a current to the constant current source 5 of only the ramp circuit section 2a. Do not supply. Constant current source 5 of recording amplifier 3a
Is configured to supply the output current of the lamp circuit section 3a.

Referring to FIG. 2, which is a circuit diagram of a recording amplifier circuit according to the present invention, the reference current generating circuit section 1 includes a feedback amplifier 10 and a current supply circuit section 11, and the current supply circuit section 11 has respective emitter electrodes. Is the resistance element R
, PNP transistors Q1, Q connected to power supply voltage VCC via R1, R2, R3 to form a differential transistor
2, and Q3, Emi to the collector electrode of the PNP transistor Q1 the base electrode of these transistors are commonly connected
Tsu with connecting data electrodes and the PNP transistor Q4 for connecting the collector electrode to the ground potential, and connected in series between the ground potential via the collector electrodes and the external terminals CURR6 of PNP transistor Q2 and the resistor R3, the R
3, the feedback amplifier 10 is supplied with a voltage of 2 V to the (-) input terminal only during recording, and the (+) input terminal is connected to the external terminal 6 during recording.
The output terminal is connected to the base electrode of the PNP transistor Q4.

In the lamp circuit section 2a, a pulse voltage having a predetermined frequency is supplied to a base electrode, a collector electrode is connected to a power supply voltage VCC, and an emitter electrode is connected to a ground potential via a constant current source 5a. , And PNP transistors Q6 and Q6 whose emitter electrodes are commonly connected to resistance elements R5 and R6 connected to power supply voltage VCC.
7 is commonly connected to the collector electrode of the PNP transistor Q6, and the PNP transistor Q6
And Q7 are connected to the collector electrodes of NPN transistors Q8 and Q9, respectively, and the emitter electrodes of NPN transistors Q8 and Q9 are commonly connected to the ground potential via constant current source 5b. A differential amplifier having a base electrode connected to the emitter electrode of NPN transistor Q5, and a base electrode connected to the collector electrode of NPN transistor Q9 and the ground potential via external terminal 7 and external capacitive element C2, respectively. An NPN transistor Q10 having a collector electrode connected to power supply voltage VCC and an emitter electrode connected to the ground potential via constant current source 5c, and a base electrode connected to NPN transistor Q10.
Is connected to the emitter electrode of a predetermined the emitter electrode determined in advance through a resistor R7 constant voltage V
An NPN transistor Q11 whose reg is connected to 3.5V and whose collector electrode is connected to the ground potential via a constant current source 5d; a base electrode connected to the emitter electrode of the NPN transistor Q11; VCC and the emitter electrode is NP
An NPN transistor Q12 is connected to the base electrode of the N-transistor Q9 and the ground potential via the constant current source 5e. The output current supplied to the recording amplifier input unit is taken out from the collector electrode of the NPN transistor Q11. Has become.

The recording amplifier input section 31a is connected to a power supply voltage VC.
The base electrodes of NPN transistors Q13 and Q14, whose emitter electrodes are commonly connected to resistance elements R8 and R9 connected to C, are connected to NPN transistor Q13.
A constant current source 5f connected in common to the collector electrodes of NPN transistors Q13 and Q14, the collector electrodes of NPN transistors Q15 and Q16 are connected to the collector electrodes of NPN transistors Q13 and Q14, and the emitter electrodes of NPN transistors Q15 and Q16 are connected to the ground potential. , A Bias voltage is supplied to the base electrodes of the NPN transistors Q15 and Q16, and a differential amplifier is connected to the REC IN terminal.
Constant current source 5g connected to ground potential and REC IN
An emitter electrode is commonly connected to the terminal, an NPN transistor Q17 having a collector electrode connected to the constant current source 5h connected to the power supply potential VCC, and a base electrode connected to the collector electrode of the NPN transistor Q16.
A reference current is supplied from the collector electrode of the NP transistor Q11 to the constant current sources 5f and 5g of the recording amplifier 3a.

The operation of the above-described circuit configuration will be described. When switching from the reproduction mode to the recording mode, first, the reference current generating circuit 1 is supplied with a voltage of 2 V to the (−) input terminal of the feedback amplifier 10. Since the output of the feedback amplifier 10 drives the PNP transistor Q4 as a differential transistor,
P-transistors Q1, Q2, and Q3 conduct, and current flows respectively.
I1 flows. Since the collector voltage of the PNP transistor Q2 is fed back to the (+) input terminal, the feedback loop operates so that the voltage at the (+) input terminal also becomes 2 V, and the current I
1 is controlled.

At this time, when the (+) input terminal also becomes 2 V, a large current I1 flows through the external capacitance element C1 for a moment, and this current flows from the collector electrode of the PNP transistor Q3 connected in parallel with the PNP transistor Q2 to the reference. As the current, the constant current sources 5a, 5b, 5c, 5d, 5 of the lamp circuit section 2a
e.

The operation of the ramp circuit section 2a is enabled when a reference current is supplied from the reference current generation circuit section 1 to the constant current sources 5a, 5b, 5c, 5d and 5e, and the PNP transistor Q5 is connected to the base electrode. 1.7V supplied to
It is driven by a pulse voltage having a predetermined frequency of 2.7V. A voltage waveform corresponding to the pulse voltage output to the emitter electrode is output to the collector electrode of PNP transistor Q9 constituting the differential amplifier. At this time, since the collector electrode is charged and discharged to and from the capacitive element C2 via the RAMP terminal 7, the rising and falling of the voltage waveform is slowed down, and the operation is performed to prevent noise.

With this voltage waveform, the NPN transistor Q
10 is driven, and the NPN transistor Q11 is driven by the emitter current. At this time, the current flowing through the collector electrode of the NPN transistor Q11 is (Vreg
3.5V− (emitter voltage of PNP transistor Q11)) / resistance value of resistance element R7 = ΔI1, and this current is taken out from the collector electrode of NPN transistor Q11 as output current ΔI1 of the lamp circuit. It is amplified by the amplifier and becomes an output current of REC.

At the moment when the mode is switched from the reproduction mode to the switching mode, the voltage of the RAMP terminal 7 is 1 to 1.5 V lower than the power supply voltage because the capacitor C2 is connected. , And decreases to the voltage of the collector electrode of the NPN transistor Q7.

Therefore, when the voltage of the capacitive element C2 is 1 to 1.5 V lower than the power supply voltage, the emitter voltage of the NPN transistor Q10 outputs a high level which is lower by the voltage between the emitter and the base of this transistor.

Therefore, in the NPN transistor Q11 in which the base electrode is connected to the emitter electrode, the voltage of the capacitor C2 is 1 to 1.
Since a voltage of 3.5V, which is 5V lower, is supplied to the resistor R7 of the emitter electrode, the device is cut off and does not operate. Therefore, a current ΔI1 that is a basis of the output current ΔI1 of the REC does not occur.

That is, referring to the timing chart shown in FIG. 3, the signal waveform of the conventional head output 1 shown in FIG. 7 has a mustache in the signal waveform at the moment when the mode switching pulse changes from the high level to the low level. However, it was found that this whisker did not occur and the signal waveform was normal.

As described above, when the voltage drops according to the time constant determined by the capacitance element C2 and reaches the voltage of the collector electrode of the NPN transistor Q7, the voltage is 1 to 2 V. 3V to 1.3V, the NPN transistor Q11
Enters a normal operation state, and outputs a current ΔI1 which is a basis of the output current ΔI1 of the REC.

The operation of the recording amplifier 31a is based on the current ΔI based on the output current ΔI1 of the REC from the amplifier circuit 2a.
When 1 is supplied, the operation state is established, and the recording signal supplied from the REC IN terminal is converted into a current and output. At this time, the constant current source 5g is a current source set in advance so that a current of 2ΔI1 flows, and this 2ΔI1 is applied to the collector electrode of the NPN transistor Q17 and the REC amplifier side by 1 /.
Divide by two.

Therefore, if there is no recording signal supplied from the REC IN terminal, no current flows through the collector electrode of the NPN transistor Q17 of the recording amplifier input section 31a. At the moment when the switch is made, the RAMP terminal 7
2 is connected, so that it is 1 to 1.5 V
Since the voltage becomes low, the NPN transistor Q11 is cut off and the current .DELTA.I1 based on the output current .DELTA.I1 of the REC is not output, the recording amplifier input section 31a does not operate, and the mustard current at the time of switching from the reproduction mode to the recording mode is reduced. Can be prevented.

[0047]

As described above, the eavesdropping amplifier circuit according to the present invention comprises a ramp circuit section for reducing the generation of noise by smoothly changing the current waveform of the recording current supplied to the head section. A recording amplifier that amplifies a recording signal supplied from the outside in response to the supplied recording current and supplies it to the head, and supplies a reference current to the input current of this recording amplifier and a constant current source for each lamp circuit. In the recording amplifier circuit including the reference current generating circuit unit, the output current of the ramp circuit unit is used instead of the reference current supplied to the input unit of the recording amplifier unit. , Because the capacitive element is connected to the RAMP terminal,
１．５1.5V lower voltage, and this voltage is supplied to NP
N transistor cuts off and REC output current ΔI
Since the current .DELTA.I1 based on 1 is not output, the recording amplifier input section does not operate, and it is possible to prevent a mustache current when switching from the reproduction mode to the recording mode. for that reason,
The problem of erasing the recorded portion and leaving a scratch on the screen can be solved, which contributes to improvement in reliability.

[Brief description of the drawings]

FIG. 1 is a block diagram of an embodiment of the present invention.

FIG. 2 is a specific circuit diagram of one embodiment.

FIG. 3 is a timing chart for explaining the operation of the embodiment.

FIG. 4 is a block diagram of a conventional recording amplifier.

FIG. 5 is a specific circuit diagram of a conventional recording amplifier.

FIG. 6 is a diagram illustrating a head configuration of a sequential recording method.

FIG. 7 is a timing chart for explaining the operation of a conventional recording amplifier.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 Reference current creation circuit 2a Lamp circuit part 3a Recording amplifier part 4, 13 Head part 5, 5a-5o Constant current source 6 CURR terminal 7 RAMP terminal 8 REC IN terminal 9 Head part input terminal 10 Feedback amplifier 11 Current supply amplifier Q1 Q4, Q6, Q7, Q13, Q14 PNP transistor Q5, Q8 to Q12, Q15, Q16, Q17 NP
N transistors R1 to R9 Resistance elements C1, C2 Capacitance elements 12 Tape 14 Drum

Claims (3)

(57) [Claims] 1. A ramp circuit section used in a head amplifier section of a VTR of a sequential recording system, which gradually changes a current waveform of a recording current supplied to the head section to reduce generation of noise. A recording amplifier unit that amplifies a recording signal supplied from the outside in response to the supplied recording current and supplies the amplified recording signal to the head, and a constant current source for each of the input unit of the recording amplifier unit and the ramp circuit unit. A recording amplifier circuit including a reference current generating circuit section for supplying a current, wherein an output current of the ramp circuit section is used instead of the reference current supplied to an input section of the recording amplifier section. Amplifier circuit. 2. The lamp circuit section according to claim 1, wherein a pulse voltage of a predetermined frequency is supplied to a base electrode, a collector electrode is connected to a power supply potential, and an emitter electrode is connected via a first constant current source. The first NPN transistor connected to the ground potential and the base electrodes of the first and second PNP transistors whose respective emitter electrodes are commonly connected to the first and second resistance elements connected to the power supply potential The first and second PNP transistors are commonly connected to a collector electrode, and the first and second PNP transistors are connected together.
Of the PNP transistor of the second and third
And the emitter electrodes of the second and third NPN transistors are commonly connected to the ground potential via a second constant current source, respectively. The base electrode of the transistor is the first NPN transistor.
A differential amplifier connected to the emitter electrode, and a base electrode connected to the collector electrode of the third NPN transistor and a ground potential via an external terminal and an external capacitive element, respectively, and the collector electrode is connected to the power supply potential. And a fourth NPN transistor whose emitter electrode is connected to the ground potential via a third constant current source; a base electrode connected to the emitter electrode of the fourth NPN transistor; Is connected to a predetermined predetermined voltage via a resistance element R7, and the collector electrode is connected to the ground potential via a fourth constant current source; and a fifth NPN transistor.
The base electrode is connected to the emitter electrode of the transistor, the collector electrode is connected to the power supply potential, and the emitter electrode is connected to the base potential of the third NPN transistor and the ground potential via the fifth constant current source. 2. The recording amplifier circuit according to claim 1, further comprising a sixth NPN transistor connected thereto, and extracting the output current supplied to the recording amplifier circuit section from a collector electrode of the fifth NPN transistor. 3. The predetermined low voltage is set to a voltage lower than the voltage held by the second capacitor connected to the base electrode of the fourth NPN transistor at the moment when the mode is switched from the reproduction mode to the recording mode. 3. The recording amplifier circuit according to claim 2, which is set in advance.