JP3029847B2 - Image processing device - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image processing apparatus for binarizing multi-valued image information indicating shading of an image.

2. Description of the Related Art In general, when processing various original images such as documents and photographs, the original image is read one pixel at a time, multi-valued image information indicating the density of the image is extracted, and the multi-valued image information is binarized. , Predetermined processing such as display and accumulation.

Also, the MTF (Modulation Tr
(Ansfer Function) Correction and edge enhancement are often performed to improve image quality. In the MTF correction and the edge enhancement processing, the density of each pixel is corrected with reference to the density of each adjacent pixel on the line and on the preceding and succeeding lines.

In order to identify the density of each pixel adjacent to one pixel as described above, such an apparatus includes a memory for storing the image information of the previous line and the line immediately before the line while reading the image information of one line. Have.

In recent years, an error diffusion method is often used as a method of expressing a halftone image using binary image information.

When one pixel of a certain density is binarized, a binarization error occurs. In the error diffusion method, the density of peripheral pixels is corrected based on the binarization error generated in the one pixel. Then, the pixel density after the density correction is binarized.

In order to identify the binarization error of each pixel adjacent to one pixel as described above, such an apparatus stores the binarization error of one line or a plurality of lines while reading the image information of one line. It has a memory to keep.

[Problems to be Solved by the Invention] For this reason, when the conventional image processing apparatus has a function of correcting image information such as the MTF correction and the edge enhancement and a function of error diffusion processing, it stores the original image information. A memory for storing the binarization error and a memory for storing the binarization error. For this reason, there has been a problem that the apparatus cost is increased.

SUMMARY OF THE INVENTION It is an object of the present invention to provide an image processing apparatus that can solve the above-described problems and can reduce the apparatus cost.

[Means for Solving the Problems] For this purpose, the present invention provides a method of correcting multi-valued image information obtained by reading an original image by using one of an error diffusion method and another method correction method and binarizing it. With one memory,
The memory stores binarized errors when the error diffusion method is used, and stores multi-valued image information before correction when another method is used.

[Operation] Since only one memory is required to store the binarization error and the multi-valued image information, the apparatus cost is reduced.

Hereinafter, an embodiment of the present invention will be described in detail with reference to the accompanying drawings.

FIG. 1 is a block diagram showing an image processing apparatus according to an embodiment of the present invention. In FIG. 1, a line image sensor 1 reads an original image line by line to obtain an image signal indicating the density of the image.
Converts the image signal into a digital signal and extracts image information of a constant gradation.

The image processing unit 3 corrects the image information as necessary and
It has a binarizing means, an MTF correcting means, an edge emphasizing means, a dither processing means and an error diffusion processing means.

The binarizing means binarizes each pixel density of the image information by comparing it with a certain threshold value. MTF
Correction means, edge enhancement means and error diffusion processing means,
The pixel density is corrected by the known method as described above. The dither processing means binarizes the image information based on a dither matrix which is an array of thresholds.

The RAM 4 is a memory for temporarily storing the image information of the previous line and the line before the previous line while reading one line of image information. This RA
Assuming that the storage procedure is, for example, 64 KB (65536 bits), M4 makes the address space 8K (8192) with 8 bits per word, or 16K (1638) with 4 bits per word.
4) It has a function to change the memory allocation, for example.

The latch circuit 5 extracts three bits of image information at the same position from each of the line being read, the previous line, and the line before the previous line.

The image output unit 6 outputs the image subjected to the binarization processing by display or recording. The control unit 7 controls each of the above units.

As shown in FIG. 2, the latch circuit 5 includes nine registers a to g for temporarily storing image information one pixel at a time, and registers a → b → c, d → e → f, g → h → i , The image information is sequentially transferred.

The image information is input from the image processing unit 3 to the register a, and each output of the registers b, c, d, e, f, and h is output to the image processing unit 3.
Has been entered. Each output of registers c and f is RA
The signal is input to M4, and the output of RAM4 is input to registers d and g.

Next, the operation of the image processing apparatus according to the present embodiment having the above configuration will be described.

When reading a document image, the operator determines whether or not to obtain a halftone of the output image, and
It decides whether to use dither processing or error diffusion processing.
Then, the result of the determination is set in the apparatus by a predetermined operation.

For example, in the case of a document such as a document or a drawing, halftone is not set in the case of a document including a photograph, and the halftone is set in the case of a document containing a photograph. Whether the processing is performed by the dither processing or the error diffusion processing is selected, for example, from the results of the output images obtained in the past, the one that matches the original.

 Thereafter, the original is set on the apparatus and the apparatus is started.

When the image processing apparatus is started, the setting of the output image is determined as shown in FIG. 3 (process 101). Here, when the setting of the halftone is not performed (N of the processing 101), R
As shown in FIG. 4 (a), the address space of AM4 is allocated to 16K with one word being 4 bits, and 8K of the address space is released as a work memory that can be used freely in other processes (process 102).

Next, reading of the document image is started (Process 10
3). As a result, the line image sensor 1 outputs an image signal of an analog signal, and the A / D converter 2 converts the image signal into, for example, 6-bit multi-valued image information. The upper 4 bits of the image information of 6 bits per pixel are sequentially taken out and transferred to the register a of the latch circuit 5. The image information is input to the RAM 4 via the registers a to c sequentially in synchronization with the transfer cycle per pixel. This image information is temporarily stored in the upper 4K area in FIG. 4 (a).

When the image information transferred to the register a becomes the second line, the image information of the previous line is output from the RAM 4 and is stored in the register d.
Are sequentially input. This image information is input to the RAM 4 after passing through the registers d to f. This image information is temporarily stored in the lower 4K area in FIG.

When the image information transferred to the register a becomes the third line, the image information of the line two lines before is input from the RAM 4 to the register g, and the image information is sequentially transferred to the registers g to i (the above processing 104).

In this manner, the read image information is sequentially transferred to the latch circuit 5, and the image information of each pixel having a fixed positional relationship between the previous line and the line before the previous line is obtained from the registers b, c, d, e, f, and h. It is input to the image processing unit 3.

The image processing unit 3 executes the MTF correction and the edge enhancement processing on one of the pixels with reference to the other pixel densities.

For example, the MTF correction is performed on the pixel of the register e. That is, assuming that the pixel densities of the respective pieces of image information held in the registers b, c, d, e, f, and h are Vb, Vc, Vd, Ve, Vf, and Vh, respectively, the corrected pixel density Ve of the register e 'Is calculated by the following equation.

Ve ′ = 3 · Ve− (Vb + Vd + Vf + Vh) / 2 The edge emphasis processing focuses on the pixel of the register e in the same manner as described above, and compares it with the respective densities of the four adjacent pixels using a known method. Correct the density of the pixels.
Process 105).

Then, the image information corrected in this way is binarized by a certain threshold value (process 106), and the image obtained by this is output by the image output unit 6 (process 107).

The above processing is repeated for the image information to be sequentially read (from N in processing 108 to processing 103). When reading of the document image is completed (Y in processing 108), the above image processing is completed.

On the other hand, if the setting of the halftone is performed after the apparatus is started (Y in the processing 101), the RAM 4 is allocated to the address space 8K with one word and eight bits as shown in FIG. 4 (b). (Process 109).

Next, the setting of the halftone processing method is determined (processing 11
0). Here, when dither processing is selected (processing 1
10) N), the image information of the original image is sequentially read in the same manner as described above (process 111), and the image information is sequentially read into the latch circuit 5 and the RAM.
Transfer to 4 (process 112). In this case, the image information of 6 bits per pixel is transferred as it is, and the entire storage area is used in the RAM 4 as shown in FIG.

Then, similarly to the above, for each pixel of the image information, MT
The F correction and the edge enhancement processing are executed (processing 113). After the processing, the image information is binarized by a known dither method (processing 114), and the obtained image is output (processing 115).

The above processing is executed for the image information sequentially read (from N in processing 116 to processing 111), and upon completion of reading (processing
116N), the process is terminated.

On the other hand, if the error diffusion process has been selected (processing
In 110), original images are sequentially read in the same manner as described above (process 117), and the image information is taken out by 6 bits per pixel.
Then, the image information is corrected and binarized by a predetermined error diffusion process for the image information. In the normal error diffusion processing, the binarization error of the adjacent pixel previously processed is referred to. For this reason, until the processing of the first fixed number of lines is completed, there is no data of the previously processed binarization error, so that the known anomalous processing is performed (processing 118).

Then, an error generated when the image information is binarized pixel by pixel is obtained.

By the way, binarization of image information is performed by setting a certain density to "1" (white).
Alternatively, since it is replaced by “0” (black), the binarization error may be positive or negative. In the present embodiment, a 1-bit code is added to a 6-bit binary error to form error data with 7 bits per pixel.

The error data created in this way is transmitted to the latch circuit 5 and RA
The data is sequentially transferred to M4 in the same manner as described above (process 119). Further, the image obtained by the binarization is output (process 120).

The above processing is repeated for the image information sequentially read (from N in step 121 to step 117).

As a result, as shown in FIG.
For the read line, error data between the previous line and the line before the previous line is always stored. Then, the error data of each pixel is input from the latch circuit 5 to the image processing unit 3.

FIG. 5 shows an example of the error diffusion filter.
“*” Indicates a pixel to be processed, and four numbers indicate weights for the binarization error of the pixel at the corresponding position. Now, assuming that the error diffusion processing is executed based on this error diffusion filter, the register b of the latch circuit 5 is the pixel position to be processed, and the positions of the registers c to f correspond to the above four adjacent pixels. I do.

Here, the pixel density to be processed is Vb, and each of the registers c to f
, The corrected pixel density Vb 'is calculated as Vb' = Vb + (2.Ec + 2.Ee + Ed + Ef) / 6. Thereafter, the calculated pixel density Vb 'is compared with a fixed threshold value, and is binarized to "1" or "0".
Such processing is executed in the processing 118.

Then, when the image reading is completed (N in process 121), the above process is completed.

As described above, in the present embodiment, for multi-valued image information,
The binarization is performed by executing one of the correction by the error diffusion method or the edge enhancement and the MTF correction. When the correction is performed by the error diffusion method, the binarization error is stored in the RAM 4, and when the edge enhancement and the MTF correction are performed, the multi-valued image information before correction is stored in the RAM 4.

As a result, various correction processes can be performed with only one memory, so that the apparatus cost can be reduced.

In this case, the error diffusion method, the edge enhancement, and the MTF correction cannot be used in combination, but the error diffusion method alone can provide a sufficiently good output image, and thus the above combination is considered unnecessary.

In the present embodiment, when reproducing halftones by dithering or error diffusion, image information is extracted in 6-bit gradations. Is out. When the halftone is not reproduced, as shown in FIG. 4 (a), the empty area is used as a work area and released to other processing, so that the memory can be used effectively. In this case, although the number of gradations indicating the shading of the image is reduced, the binarized output image does not reproduce halftones, so it is considered that the output image hardly deteriorates.

In the above embodiment, the MTF correction and the edge emphasis processing are described as an example of correcting the read image information with reference to the image information read first, but the present invention is also applicable to other correction methods. Of course, it is equally applicable.

[Effects of the Invention] As described above, according to the present invention, multi-valued image information obtained by reading a document image is binarized by correcting the multi-valued image information by one of an error diffusion method and another correction method. Since the binarization error used in the diffusion method or the multi-valued image information before correction is stored in one common memory, it is not necessary to provide two memories as in the related art, so that the apparatus cost can be reduced. Can be.

[Brief description of the drawings]

FIG. 1 is a block diagram of an image processing apparatus according to an embodiment of the present invention, FIG. 2 is a block diagram of a latch circuit and a RAM, FIG. 3 is an operation flowchart of image processing, and FIG.
FIG. 5 is an explanatory diagram showing a RAM allocation state, and FIG. 5 is an explanatory diagram showing an example of an error diffusion filter. 1 ... Line image sensor, 2 ... A / D converter, 3 ...
... Image processing unit, 4 ... RAM, 5 ... Latch circuit, 6 ...
Image output unit 7, control unit, a to g, registers.

──────────────────────────────────────────────────の Continued on the front page (58) Fields investigated (Int. Cl. ⁷ , DB name) H04N 1/405 H04N 1/21 Patent file (PATOLIS)

Claims (5)

(57) [Claims] An image reading means for reading a document image in line order and sequentially taking out one pixel at a time as multi-valued image information, and referring to a binarization error of the multi-valued image information obtained by binarizing the multi-valued image information first. An error diffusion method correcting means for correcting the error diffusion method, and another method correcting means for correcting the multi-valued image information by referring to the multi-valued image information extracted earlier, wherein the error diffusion method A selective correcting means for correcting the multi-valued image information by a correcting means or another method correcting means; a binarizing means for binarizing the corrected multi-valued image information in a method for reproducing halftones or a method for not reproducing the halftones; The multi-valued image information is corrected by the error diffusion method correcting means, and the binary errors generated when the binarization is performed are sequentially updated in the past while the number of lines required for the correction processing is changed to one common value. Binary error data stored in line memory When the multi-valued image information is corrected by the other method correcting means and then binarized by the halftone reproduction method, the multi-valued image information before correction is corrected while sequentially updating the past. Halftone reproduction multi-valued image information storage means for storing the same number of lines as necessary for processing in the one common line memory; and correction of the multi-valued image information by the other method correction means, followed by simple binarization In this case, multi-valued image information having a smaller number of gradations than in the case of reproducing a halftone is stored in the one common line memory as many as the number of lines required for the correction processing while sequentially updating the past. Valued multi-valued image information storage means; and memory allocating means for releasing a memory empty area generated when the multi-valued image information having a small number of gradations is stored in the common line memory for other processing. An image processing apparatus characterized by the above-mentioned. 2. A correction process is required based on image information of a current read line obtained from said image reading means and multi-value image information or a binarization error of a previous line stored in said common line memory. 2. The image processing apparatus according to claim 1, further comprising image information extracting means for extracting a plurality of pieces of image information. 3. The method according to claim 1, wherein the other system correction means converts the multi-valued image information into MTF data.
2. The image processing apparatus according to claim 1, wherein the image processing apparatus is means for performing correction or edge enhancement processing. 4. The image processing apparatus according to claim 1, wherein the halftone reproduction method by said other method correction means is a dither method. 5. When reproducing halftones by the dither method, the multi-valued image data is corrected by performing MTF correction or edge enhancement processing, and then binarized by the dither method. The image processing apparatus according to any one of the preceding claims.