JP3028292B2 - Positive and negative pulse type high voltage power supply - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a positive / negative pulse type high voltage power supply for applying a positive / negative high voltage to a discharge electrode or the like.

[0002]

2. Description of the Related Art Hitherto, as a high voltage power supply for applying a positive and negative high voltage of a static eliminator, for example, a low frequency or high frequency sine wave type power supply has been generally used. However, the low-frequency sine wave type is inexpensive, but the rise and fall of the waveform is slow, so there is a lot of uneven static elimination, especially when the object to be neutralized is moving. The wave type has a problem that although it has less static elimination, it must be provided with a high-frequency oscillating unit, so that it becomes expensive and various controls are difficult. There is also a pulse type that alternately generates positive and negative pulse high voltages,
Insufficient countermeasures for the residual charge resulted in poor pulse falling characteristics, especially gentle
This resulted in a decrease in the amount of generated ions, resulting in poor charge removal efficiency.

[0003]

Therefore, the first aspect of the present invention
The challenge is to improve the rising and falling characteristics of the pulse high voltage in the positive / negative pulse type high voltage power supply,
An object of the present invention is to increase the speed of operation and improve the static elimination efficiency by increasing the amount of generated ions when used as a power supply for a static eliminator.

[0004] A second object of the present invention is to make it possible to change the positive and negative pulse high voltage applied to the load to positive and negative, respectively, or to further vary the pulse width. An object of the present invention is to eliminate unevenness in static elimination due to the difference in the amount of generated positive and negative ions, and to easily perform ion balance adjustment for equalizing the amount of generated positive and negative ions.

A third object of the present invention is to make it possible to vary the frequency of a positive or negative pulse high voltage applied to a load. The goal is to eliminate as much as possible.

A fourth object of the present invention is to modulate a high voltage of a positive or negative pulse applied to a load and superimpose a narrow pulse in the amplitude thereof, for example, to generate ions when used in a static eliminator. An object of the present invention is to make it possible to improve the static elimination efficiency by increasing the amount.

[0007]

According to a first aspect of the present invention, there is provided a positive / negative pulse type high voltage power supply for generating a positive DC voltage, and a negative voltage generator for generating a negative DC voltage. Unit, a first, a second, a third, and a fourth switching element, and a drive circuit for turning on and off these switching elements with a pulse signal, and a drive circuit between the positive voltage generator and the ground. , A first switching element, a second switching element, and a third switching element are connected in series,
A connection point between the first switching element and the second switching element is connected to a load, and when the first switching element is turned on, the positive voltage of the positive voltage generator is applied to the load. A fourth switching element is connected between a connection point between the switching element and the third switching element and the negative voltage generating section, and when the second and fourth switching elements are turned on, the negative voltage generating section After the negative voltage is applied to the load, the drive circuit turns on the first switching element and applies a positive voltage to the load. Then, the positive charge charged to the load is applied to the second and third loads. Discharged to ground by a circuit that goes to ground via switching elements or diodes connected in parallel to them,
Next, after the second and fourth switching elements are turned on and a negative voltage is applied to the load, the negative charge charged to the load is connected from the ground to the third and second switching elements or to the third and second switching elements in parallel. The four switching elements are periodically turned on and off in a predetermined order so as to be discharged by a circuit that reaches a load via the diode.

In order to achieve the second object, there is provided voltage adjusting means for adjusting a positive voltage of the positive voltage generator and a negative voltage of the negative voltage generator, respectively. The challenge is
It can also be achieved by adjusting the time width of the pulse signal for turning on / off the switching element.

In order to achieve the third object, there is provided frequency adjusting means for adjusting the frequency of a pulse signal for turning on / off the switching element.

In order to achieve the fourth object, there is provided a modulating means for modulating a pulse signal for turning on / off a switching element with a clock pulse having a shorter time width.

[0011]

Next, embodiments of the present invention will be described in detail with reference to the drawings.

FIG. 1 shows an equivalent circuit of an embodiment of the present invention. In this equivalent circuit, the positive DC power supply + E is
A positive voltage generator that generates a positive voltage, a negative DC power source -E is a negative voltage generator that generates a negative voltage, and four switches SW1, SW2, SW3, and SW4 are first and second switches, respectively. The second, third, and fourth switching elements (specifically, FETs, IGBTs, and the like) are shown, and diodes D1, D2, D3, and D4 are connected in parallel to the respective switching elements.
The load R represents a discharge electrode or the like for applying a positive or negative high voltage, and one end thereof is grounded. The first switch SW1, the second switch SW2, and the third switch SW3 are connected in series between the positive DC power supply + E and the ground, but the first switch SW1 and the second switch SW2 are connected. A load R is connected to a connection point with the second switch SW2.
A fourth switch SW4 is connected between a connection point between the first switch SW3 and the third switch SW3 and the negative DC power source -E.

An operation example of this embodiment will be described.
FIGS. 1 to 5 show four switches SW1 and SW in this case.
2 shows a switching state of ON / OFF operation of SW3 and SW4. FIG. 6 shows the on / off relationship, and FIG. 7 shows a timing chart.

First, as shown in FIG.
In a state in which W1 is off, the second and third switches SW2 and SW3 are both on, and the fourth switch SW4 is off (in FIG. 6), both ends of the load R are connected to the ground. No voltage is applied. From this state, as shown in FIGS. 2 and 7, when the first switch SW1 is turned on immediately after the second switch SW2 is turned off (in FIG. 6), the power is turned on from the positive DC power supply + E. Since the current flows to the ground (in the direction of I1) through the first switch SW1 and the load R, a positive pulse voltage with a good rise proportional to the positive power supply voltage + E is applied to the load R, and the load R becomes positive. To be charged.

Next, as shown in FIG. 3 and FIG.
Immediately after the switch SW1 is turned off, the second switch S
When W2 is turned on (in FIG. 6), the positive charge charged on the load R side is turned on by the second switch SW2 turned on and the third switch S continuously turned on.
By the flow to ground via W3 (in the direction of I2)
Since the discharge is performed, a positive pulse voltage having a good fall with respect to the load R is obtained.

As shown in FIGS. 4 and 7, immediately after the third switch SW2 is turned off, the fourth switch SW2 is turned off.
4 (in FIG. 6), this time the load R
From the second switch SW2 which is still on
Then, a current flowing toward the negative DC power source -E (in the direction of I3) flows through the fourth switch SW4 that is turned on, so that a negative pulse voltage with a good fall proportional to the negative power source voltage -E is applied to the load. In addition to R, the load R is charged to a negative polarity.

Next, as shown in FIG. 5 and FIG.
Immediately after the switch SW4 is turned off, the third switch S
When W3 is turned on (in FIG. 6), the negative charge charged on the load R side is turned on from the ground by the third
Is further discharged (in the direction of I4) from the load R to the ground again through the switch SW3 and the second switch SW2 which are continuously turned on. Pulse voltage.

Next, the circuit configuration is the same as that of the embodiment of FIG. 1, except that four switches SW1, SW2, SW3, and SW
Another operation example in which the ON / OFF operation timing of No. 4 is changed from the above operation example will be described. 8 to FIG.
Of the switches SW1, SW2, SW3, SW4
FIG. 13 shows a switching state of the off operation, FIG. 13 shows an on / off relationship thereof, and FIG. 14 shows a timing chart.

The four switches SW1, SW2, SW3,
SW4 is turned off as shown in FIG.
), The first switch SW1 is turned on as shown in FIGS. 9 and 14 (in FIG. 13).
Since a current flows from the positive DC power supply + E to the ground (in the direction of I1) through the first switch SW1 and the load R that are turned on and toward the ground, a positive pulse with a good rise proportional to the positive power supply voltage + E The voltage is applied to the load R,
The load R is charged to a positive polarity.

Next, after a predetermined time, the first switch SW1 is turned off as shown in FIGS. 10 and 14, and immediately after that, the second switch SW2 is turned on (in FIG. 13). Positive charges correspond to the second switch SW2 turned on and the third switch SW2 turned off.
Is discharged (in the direction of I2) by the flow to the ground via the third diode D3 connected in parallel to the switch SW3 of the switch SW3.

As shown in FIG. 11 and FIG.
With the switch SW2 of the fourth switch ON, the fourth switch S
When W4 is turned on (in FIG. 13), the load R goes to the negative DC power source -E through the second switch SW2 and the fourth switch SW4 which are turned on (I3). Direction) current flows,
A negative pulse voltage with a good fall proportional to the negative power supply voltage -E is applied to the load R, and the load R is charged to the negative polarity.

Next, after a predetermined time, as shown in FIGS. 12 and 14, the second and fourth switches SW2 and SW4 are turned off and then the third switch SW3 is turned on instantaneously (FIG. 13). ), The negative charge charged on the load R side is further connected to the third switch SW3 turned on from the ground and the second switch SW2 turned off via the second diode D2 connected in parallel to the load R. , And is discharged again (in the direction of I4) from the flow to the ground.

Next, the circuit configuration is the same as that of the embodiment of FIG. 1, except that four switches SW1, SW2, SW3, and SW
Still another operation example in which the on / off operation timing of No. 4 is changed will be described. FIGS. 15 to 19 show the switching states of the on / off operation of the four switches SW1, SW2, SW3, and SW4, FIG. 20 shows the on / off relationship, and FIG. 21 shows a timing chart.

The four switches SW1, SW2, SW3,
SW4 is turned off as shown in FIG.
0), when the first switch SW1 is turned on as shown in FIGS. 16 and 21 (in FIG. 20), the first switch SW1 and the load R which are turned on are switched from the positive DC power supply + E. Head to the ground (I1
Since the current flows, a positive rising pulse voltage proportional to the positive power supply voltage + E is applied to the load R, and the load R is charged to the positive polarity.

Next, after a predetermined time, the first switch SW1 is turned off as shown in FIGS. 17 and 21, and immediately thereafter, the second and third switches SW2 and SW3 are simultaneously turned on (in FIG. 20). The positive charge charged on the load R side is discharged (in the direction of I2) by the flow to the ground via the second and third switches SW2 and SW3 which are turned on.
Becomes a positive pulse voltage with a good fall.

As shown in FIGS. 18 and 21, when the fourth switch SW4 is turned on immediately after the third switch SW3 is turned off while the second switch SW2 is turned on (FIG. 20). ), This time, from the load R,
The negative DC power source -E is supplied through the second switch SW2 which is turned on and the fourth switch SW4 which is turned on.
Since the current flows in the direction (in the direction of I3), a negative pulse voltage having a good fall proportional to the negative power supply voltage −E is applied to the load R, and the load R is charged to the negative polarity.

Next, after a predetermined time, as shown in FIGS. 19 and 21, the second and fourth switches SW2 and SW4 are turned off, and then the second and third switches SW2 and SW4 are turned off.
3 are simultaneously turned on instantaneously (in FIG. 20), the negative charge charged to the load R side becomes the second and third switches SW2 and SW3 turned on from the ground.
, And is discharged by the flow from the load R to the ground again (in the direction of I4), so that a negative pulse voltage with a good rise to the load R is obtained at this time.

FIG. 22 shows an overall schematic configuration of a high-voltage power supply using the above-described circuit configuration. This high voltage power supply
In the switching inverter circuit 1 which is a main part of the present invention (the equivalent circuit as described above), a positive pulse signal and a negative pulse signal are alternately and periodically generated, boosted by the step-up transformer 2, and then loaded. For example, a positive and negative alternating high voltage is applied to the discharge electrode 3 of the static eliminator.
In the preceding stage of the switching inverter circuit 1, a positive voltage adjuster 4 and a negative voltage adjuster 5 for adjusting positive and negative voltages of a pulse signal outputted therefrom, a frequency adjuster 6 for adjusting a frequency, and a pulse for adjusting a pulse width. Width adjustment unit 7,
A modulating unit 8 for modulating is provided. These parts will be outlined.

The positive voltage adjuster 4 can arbitrarily set the positive DC voltage output from the positive voltage generator 9 by the voltage setting device 10, and the negative voltage adjuster 5 outputs the positive DC voltage output from the negative voltage generator 11. The negative DC voltage can be arbitrarily set by the voltage setting device 12. These positive and negative DC voltages are input to the switching inverter circuit 1. When the switching inverter circuit 1 is switched to the positive voltage generating circuit 9, a positive pulse signal is output from the switching inverter circuit 1 and the negative voltage generating circuit 11 When it is switched to the negative side, a negative pulse signal is output from the switching inverter circuit 1.

The frequency adjusting unit 6 includes a voltage / frequency conversion circuit 13 for converting the voltage of an external control signal into a frequency.
And a frequency adjuster (variable resistor) 1 via a switch 14.
5, an external signal having a voltage of, for example, 0 to 10 V can be converted to a frequency of, for example, 50 to 500 Hz by the principle of a CR oscillation circuit in which the frequency adjuster 15 is R.

The pulse width adjuster 7 adjusts the pulse width (time width) of the output pulse from the frequency adjuster 4 to the pulse width adjuster 1.
6, the pulse width control circuit 17
To change. The method uses a differential amplifier,
With respect to the reference input voltage, there is a method of changing the other input voltage to change the pulse width. From the pair of output terminals of the pulse width control circuit 17, pulse signals whose pulse width has been adjusted are output alternately.

The modulating section 8 includes an OR circuit 19, an OR circuit 20, and a clock oscillator so that the modulation switch 18 can select whether or not to modulate the pulse signal output from the pulse width adjusting section 7. Circuit 21 and AND circuit 22
23. The pulse signal output from the pair of output terminals of the pulse width control circuit 17 is A
Input to the ND circuits 22 and 23 respectively.
The signals are merged by the R circuit 19 and input to the clock oscillation circuit 21. Since the modulation switch 18 is connected to the ground, when it is turned on, the OR circuit 20 outputs the clock signal from the clock oscillation circuit 21 and inputs the clock signal to the AND circuits 22 and 23. AND circuit 2
The other inputs of 2 and 23 receive a pair of outputs from the pulse width control circuit 17, and the outputs of the AND circuits 22 and 23 output a signal whose clock is modulated within the pulse width from the pulse width control circuit 17. Become. When the modulation switch 18 is turned off, one of the OR circuits 20 becomes high level by the switch, so that the other clock signal becomes irrelevant,
When the output of the OR circuit 20 is at the high level, AND
Input to the circuits 22 and 23. Since the other input of the AND circuits 22 and 23 receives the signal from the pulse width control circuit 17, in this case, the modulation from the clock signal is not performed, and only the signal from the pulse width control circuit 17 is applied to the AND circuit. 22 and 23 are output.

The specific structure of the start / stop circuit 24 will be described later.
V or a 200 V commercial AC power supply, and is controlled by a sequence circuit 25.
The control is also performed by an overcurrent detection circuit 26 that detects an overcurrent in the negative voltage generation circuit 11. The pulse signals modulated or not modulated by the OR circuits 22 and 23 are input to the switching inverter circuit 1 when the start / stop circuit 24 is not in the stop state, and the switching in the switching inverter circuit 1 is performed. The semiconductor element is switched as described below.

On the other hand, the change of the positive and negative high voltages applied to the electrode 3 from the step-up transformer 2 is monitored by the monitor circuit 27 and displayed by the positive and negative voltage display sections 28 and 29.

Next, a specific example of the switching inverter circuit 1 and a start / stop circuit 24 for controlling the start and stop thereof will be described in detail with reference to FIG. The switching inverter circuit 1 corresponds to a specific example of the equivalent circuit shown in FIG.
First, second, third and fourth switching elements as four switching elements
FETs (field effect transistors) 30A and 30
B, 30C, 30D, the first and second being a first set corresponding to the positive side, and the third and fourth being a second set corresponding to the negative side, and each set being a totem-pole circuit. It has a configuration.

That is, each of the FETs 30A, 30B, 30
Diodes 31A, 31B, 31C and 31 are connected to C and 30D
D are connected in parallel, and the source of the first FET 30A is connected to the positive voltage generation circuit 9 while the fourth FET 30A
The source of D is connected to the negative voltage generation circuit 11. The source of the first FET 30A and the second FET 30B
Drain, the source of the same FET 30B and the third FET 30
The source of C is connected in series, and the drain of the third FET 31C is grounded. Then, a load R is connected to a connection point between the first FET 30A and the second FET 30B as shown in FIG.
Are connected via the step-up transformer 2.

On the other hand, the start / stop circuit 24 is finally divided into two systems 24a and 24b (positive drive circuit and negative drive circuit) corresponding to positive and negative to output positive and negative high voltage pulse signals. The pulse signals alternately output from the pair of OR circuits 22 and 23 of the modulation unit 8 in FIG. 22 are separately processed. FIG. 24 shows a timing chart of the two systems of signal processing. In the figure, the signal patterns a to n indicate the outputs of the respective parts a to n in FIG. Each system includes a pulse signal obtained by buffering the input pulse signal in the first-stage buffer 32 and a CR signal.
After being delayed by the delay circuit 33, the second stage buffer 34
And the signal buffered in the AND gate circuit 35
And the OR gate circuit 36 to further branch into two paths. Therefore, the pulse widths of the two branched paths are different, and the pulse width from the OR gate circuit 36 is longer both before and after than the pulse width from the AND gate circuit 35. The outputs of the two paths thus branched are output from respective NOTs whose logics are inverted.
The respective photocouplers 39.4 via circuits 37 and 38
0, and the photocouplers 39 and 40
Is input to the switching inverter circuit 1 when is turned on.

Accordingly, the start / stop circuit 24 outputs a pulse signal branched into four paths, two paths for each system. The first pulse signal (f in FIG. 22) of the first system is the switching inverter circuit 1
Through a first inverter 41A of the first set of the first F
A second pulse signal (g in FIG. 22) that is input to the gate of the ET 30A and is longer than the first pulse signal is passed through a second inverter 41B to a first set of second FETs 30B.
Input to the gate. Further, the third pulse signal (n in FIG. 22) of the second system is input to the gates of the second set of third FETs 30C via the third inverter 41C. The short fourth pulse signal (m in FIG. 22) is output via the fourth inverter 41D.
The signal is input to the gates of the second set of fourth FETs 30D.

The first set of first FET 30A and second FE
At T30B, the second FET 31B is turned on, and the first FET 31B is turned on.
When a pulse signal is input to their gates while the FET 31A is off, the second FET 31B is turned off and the first F
ET31A turns on. At this time, a positive current from the positive voltage generator 9 flows to the ground through the first FET 30A and the load R, so that a positive voltage with a good rise is applied to the load R. Next, when the input pulse signal to the first FET 30A falls and the input pulse signal to the second FET 30B rises, the first FET 30A turns off,
The second FET 30B is turned on, and the positive residual charge on the load R side is discharged to the ground through the second FET 30B and the third FET 30C which is turned on at this time. Therefore, a positive pulse voltage having good rising and falling characteristics proportional to the input pulse width is applied to the load R. In this case, the pulse signal (g in FIG. 22) input to the gate of the second FET 30B is the first F
Since the pulse width is longer both before and after than the pulse signal (f in FIG. 22) input to the gate of the ET 30A,
The switching of A.30B can be performed reliably and at high speed, and the good rising and falling characteristics of the positive pulse voltage are also guaranteed.

The second set of the first FET 30C and the fourth
And when the third FET 31C is on and the fourth FET 31D is off,
When a pulse signal is input to those gates, the third FET 31C is turned off at the moment when the input pulse falls,
The fourth FET 31D turns on. At this time, a current flows from the ground to the negative voltage generating circuit 11 through the load R and the second FET 30B, so that a negative voltage with a good rise is applied to the load R. Next, when the input pulse signal to the third FET 30C rises and the input pulse signal to the fourth FET 30D falls, the third FET 30C is turned on, the fourth FET 30D is turned off, and the load R side negative The remaining charge is the second FE which is turned on at this time.
Discharge to ground through T30B and third FET 30C. Therefore, a negative pulse voltage having good rising and falling characteristics proportional to the input pulse width is applied to the load R. In this case, the fourth FET 30D
Since the pulse width of the pulse signal (n in FIG. 22) input to the gate of the third FET 30C is longer both before and after the pulse signal (m in FIG. 22) input to the gate of the third FET 30C,
The switching of T30C / 30D can be performed reliably and at high speed, and good rising and falling characteristics of the negative pulse voltage are also guaranteed.

On the other hand, when one FET is used for each of the positive and negative sides as shown in FIG. 25, when a pulse signal is input to the gate, the FET is turned on, and the positive or negative voltage is applied to the load R. Is output, but if the pulse signal is lost, there is no circuit for discharging, so that a pulse voltage having a poor fall is caused by the influence of the capacitance at both ends of the load R. Therefore, the falling characteristic cannot be improved unless the resistance value of the load R is set to a very small value.

Also, two FETs for each of the positive and negative
26, when a half-bridge circuit is used as shown in FIG. 26, a pulse voltage having a very low fall is caused by the influence of the capacitances C1, C2, and C3.

In the above-described embodiment, the first, second,
Third and fourth switch elements SW1, SW2, SW3, S
For all of W4, diodes D1, D2, D3, and D4 were connected in parallel for the purpose of stable operation.
The diode is substantially required only when the load R is discharged via the diode, and the diode can be omitted in other cases. Further, FE is used as a switching element of the switching inverter circuit 1.
Although an example using T has been described, the same effect can be expected even if another semiconductor switching element, for example, an IGBT (insulated gate bipolar transistor) is used, and a vacuum tube may be used instead of a semiconductor. Further, the present invention is not limited to a power supply for a static eliminator, but also a power supply for other devices requiring high positive and negative voltages, such as a corona discharge treatment device for modifying an insulator such as a plastic film by positive and negative corona discharge. Can also be used as

[0044]

As described above, according to the present invention, the following effects can be obtained. According to the power supply of the first aspect, since the residual charge of the load can be positively discharged for each of the positive and negative sides, the rising and falling characteristics of the pulse high voltage can be improved, and the operation can be speeded up. When used as a power supply for a static eliminator, the static elimination efficiency can be improved by increasing the amount of generated ions.

According to the power supply of the second aspect, the voltage value of the positive and negative pulse high voltage applied to the load can be varied positively and negatively, and according to the third aspect, the pulse width can be varied. When used, the ion balance can be adjusted, and uneven charge removal can be eliminated.

According to the power supply of the fourth aspect, since the frequency of the positive and negative pulse high voltages applied to the load can be varied, when used in a static eliminator, the static elimination unevenness with respect to the moving speed of the processing object is eliminated. be able to.

According to the power supply of the fifth aspect, the pulse signal for turning on / off the switching semiconductor element is modulated. Therefore, when used in a static eliminator, the amount of ions generated can be increased to further improve the static elimination effect.

[Brief description of the drawings]

FIG. 1 is an equivalent circuit diagram of an embodiment of the present invention.

FIG. 2 is a circuit diagram showing a state in which a positive voltage is applied to a load in the above power supply.

FIG. 3 is a circuit diagram showing a state in which discharge is performed after the state in FIG. 2;

FIG. 4 is a circuit diagram showing a state where a negative voltage is applied to a load after the state of FIG. 3;

FIG. 5 is a circuit diagram showing a state where discharge is performed after the state of FIG. 4;

FIG. 6 shows ON / OFF of four switches in FIGS. 1 to 5;
It is a relation diagram of OFF switching.

FIG. 7 is also a timing chart.

FIG. 8 is a circuit diagram showing another operation example different from the above with the same circuit configuration as that of FIG. 1;

FIG. 9 is a circuit diagram showing a state in which a positive voltage is applied to a load in the above power supply;

FIG. 10 is a circuit diagram showing a state where discharge is performed after the state of FIG. 9;

11 is a circuit diagram showing a state where a negative voltage is applied to a load after the state of FIG. 10;

FIG. 12 is a circuit diagram showing a state in which discharge is performed after the state in FIG. 11;

FIG. 13 is a relationship diagram of on / off switching of four switches in FIGS. 6 to 10;

FIG. 14 is also a timing chart.

FIG. 15 is a circuit diagram showing still another operation example with the same circuit configuration as in FIG. 1;

FIG. 16 is a circuit diagram showing a state in which a positive voltage is applied to a load in the above power supply;

FIG. 17 is a circuit diagram showing a state of being discharged after the state of FIG. 16;

FIG. 18 is a circuit diagram showing a state where a negative voltage is applied to the load after the state of FIG. 17;

FIG. 19 is a circuit diagram showing a state of being discharged after the state of FIG. 18;

FIG. 20 is a relationship diagram of on / off switching of four switches in FIGS. 15 to 19;

FIG. 21 is also a timing chart.

FIG. 22 is a block diagram showing a schematic configuration example of the entire positive / negative pulse type high voltage power supply according to the present invention.

23 is a circuit diagram of a specific example of a switching inverter circuit and a start / stop circuit thereof in FIG.

FIG. 24 is a timing chart of the above operation.

FIG. 25 is a circuit diagram of a comparative example in which the switching inverter circuit has one FET on each of the positive side and the negative side.

FIG. 26 is a circuit diagram of a comparative example in which the switching inverter circuit has a half-bridge configuration.

[Explanation of symbols]

SW1, SW2, SW3, SW4 Switch (switching element) D1, D2, D3, D4 Diode R Load + E Positive DC power supply (positive voltage generator) -E Negative DC power supply (negative voltage generator) 1 Switching inverter Circuit 2 Step-up transformer 3 Electrode 4 Positive voltage adjuster 5 Negative voltage adjuster 6 Frequency adjuster 7 Pulse width adjuster 8 Modulator 30A / 30B / 30C / 30D FET 31A / 31B / 31C / 31D Diode

──────────────────────────────────────────────────続 き Continuation of the front page (56) References JP-A-4-8175 (JP, A) JP-A-9-163740 (JP, A) JP-A-63-107466 (JP, A) 72889 (JP, U) (58) Fields investigated (Int. Cl. ⁷ , DB name) H02M ⁷ /42-7/98 H02M 9/00-9/06

Claims (7)

(57) [Claims] 1. A positive voltage generator for generating a positive DC voltage;
A negative voltage generator for generating a negative DC voltage;
And a drive circuit for turning on and off the switching elements by a pulse signal. The first switching element and the fourth switching element are connected between the positive voltage generator and ground. The second switching element and the third
Are connected in series with each other, and a connection point between the first switching element and the second switching element is connected to a load. When the first switching element is turned on, the positive voltage of the positive voltage generation unit is turned on. Is applied to a load, and a fourth switching element is connected between the connection point between the second switching element and the third switching element and the negative voltage generating section, so that the second and fourth switching elements are connected. When the element is turned on, the negative voltage of the negative voltage generator is applied to the load, and the drive circuit turns on the first switching element and applies a positive voltage to the load. The charged positive charge is discharged to ground by a circuit that goes to ground via the second and third switching elements or diodes connected in parallel to the second and third switching elements. After the negative voltage is applied to the load by turning on the third switching element and the fourth switching element, the negative charge charged to the load is transferred from the ground via the third and second switching elements or the diodes connected in parallel to the third and second switching elements. 4 to be discharged by the circuit leading to the load
A positive / negative pulse type high voltage power supply characterized by periodically turning on / off a plurality of switching elements in a predetermined order. 2. The positive / negative pulse type high voltage power supply according to claim 1, wherein diodes are connected in parallel to the first, second, third, and fourth switching elements, respectively. 3. The positive / negative pulse type high voltage power supply according to claim 1, further comprising voltage adjusting means for adjusting a voltage of the positive voltage generator and a voltage of the negative voltage generator, respectively. 4. The positive / negative pulse type high voltage power supply according to claim 1, further comprising a pulse width adjusting means for adjusting a time width of a pulse signal for turning on / off the switching element. 5. The positive / negative pulse type high voltage power supply according to claim 1, further comprising frequency adjusting means for adjusting the frequency of a pulse signal for turning on / off the switching element. 6. A pulse signal for turning on / off a switching element, comprising modulation means for modulating the pulse signal with a clock pulse having a shorter time width.
The positive / negative pulse type high voltage power supply according to 2, 3, 4 or 5. 7. The method according to claim 1, wherein the load is a discharge electrode.
7. The positive / negative pulse type high voltage power supply according to 4, 5 or 6.