JP3020566B2 - Semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial applications]

The present invention relates to a semiconductor device, and more particularly to a semiconductor device that expresses, transmits, stores, or processes information using a quantum confinement structure.

[Prior art]

With recent advances in microfabrication technology, submicron or nanometer-level microfabrication has become possible, and it has become possible to create microstructures on the order of or less than the de Broglie wavelength of electrons. At the same time, new devices or information processing methods that replace conventional transistor circuits have been searched for. As one of such proposals, for example, there is a "quantum coupling device" described in U.S. Pat. No. 6,262,802 (corresponding Japanese application: JP-A-61-82473) as a first known example. For similar devices, see Mark A. Reed, Symposium on 1986, VLSI Technology, pp. 1-4, (Mark.A. Reed, Symposium on 1986 VLSI
Technology, pp. 1-4), and DK Ferry, Physics and Technology of Submicron Structures, Springer Verlag, 1988, pp. 232 to 236, (DKFerry, Physi
cs and Technology of Submicron Structures, Springer
Verlag, 1988, pp. 232-236). Among them, the “quantum coupling device” according to the first known example described above.
Represents "quantum dots" (3) in an array as shown in FIG.
A low-potential region having a de Broglie wavelength of an electron or less in all directions in a dimensional space is arranged, and the electron crosses between quantum dots by a tunnel effect, thereby performing information processing. As a specific configuration of this, for example, a quantum dot is composed of GaAs,
This may be filled with GaAlAs.

[Problems to be solved by the invention]

2. Description of the Related Art In an integrated circuit using a conventional transistor, a large amount of power is required because a stray capacitance associated with a transistor and a wiring is charged and discharged each time the transistor operates. In the future, it is considered that the integration degree will reach the limit due to the limitation of power consumption with the progress of fine processing. In a circuit using conventional transistors, a large number of transistors are connected to each other by metal wiring. As a result, the area required for wiring and the resistance of the wiring increase as the degree of integration increases. It has become a major limiting factor. In addition, with miniaturization, elements in an integrated circuit are rapidly becoming complicated. For example, dynamic RAM storage cells have conventionally used capacitors with a simple structure formed on a flat surface.However, in order to secure a large capacitance in the submicron region, extremely complicated shapes such as groove-type capacitance cells have been used. It is becoming necessary. This trend is expected to continue and increase the manufacturing cost of integrated circuits. Further, an integrated circuit using a conventional transistor has a limit in operating speed. In a conventional transistor, conduction carriers actually travel from a source to a drain (in a bipolar transistor, from an emitter to a collector) to become a current, and the presence or absence of this current is made to correspond to 1/0 of a digital signal. Therefore, the switching operation requires a time (travel time) for the conduction carriers to actually move from the source to the drain of the transistor. However, as is well known, the velocity of the conduction carrier in the semiconductor is the saturation velocity (about 1 × 10 ⁷ cm / s) as the upper limit. Therefore, the travel time is also limited. The quantum coupling device of the first well-known example also has no difference from the conventional transistor in that the operation of electrons as conduction carriers actually travels between quantum dots, and is similar to a conventional transistor. Subject to speed limits. In the quantum coupling device, a digital signal is represented by whether or not one electron exists in a quantum dot. It is clear that information is lost in this quantum coupling device, just as information is lost (without a refresh operation) in a storage cell of a dynamic RAM. This is because electrons are annihilated by recombination in a semiconductor or are generated by thermal excitation. As described above, an object of the present invention is to provide a semiconductor device for expressing, transmitting, storing, or processing information for performing high-speed information processing with extremely low power consumption. Another object of the present invention is to provide a new semiconductor device having a high dielectric constant (refractive index) and capable of responding at high speed. Another object of the present invention is to provide a semiconductor device which is a storage medium suitable for mass storage.

[Means for Solving the Problems]

In order to achieve the above object, a barrier region (7) made of a high-resistance semiconductor, an insulator or a semi-insulator is provided, and the barrier region (7) includes a plurality of active regions (6); (6) is capable of confining the conductive carriers (4) therein, each of the active regions (6) includes an impurity atom (5) acting as a donor or an acceptor, and the inside of one of the plurality of active regions. Wherein a semiconductor device is characterized in that electric bipolarity is generated by the localization of the conductive carriers in the above.

[Action]

Since the active regions are separated by a barrier region made of a high-resistance semiconductor, an insulator, or a semi-insulator, conduction carriers do not move between the active regions. Therefore, the operation speed of the device is not limited by the time required for traveling of the conduction carrier, and a high-speed operation can be achieved. In addition, since the conduction carriers generated by impurity atoms acting as donors or acceptors are confined inside the active region, the conduction carriers do not flow out of the active region and are lost, and thus information is lost. There is no. As a result, retention and storage of information can be lost. Further, by generating an electric dipole by localization of the conduction carriers inside the active region,
Information can be expressed and stored by the direction and size of the electric dipole. The contents can be controlled by applying an electric field from the outside. Further, the contents of information can be sequentially transmitted to the adjacent electric dipoles by using the interaction caused by the electric field acting between the adjacent electric dipoles, whereby the information can be transmitted. Hereinafter, various actions by the means of the present invention will be described in detail. In a conventional transistor circuit, the transistor functions as a switch, and whether the transistor is turned on or off is associated with a digital signal. At this time, the signal appears as a potential in the metal wiring. In the information representation of the present invention, the spatial distribution of electric dipoles is associated with information. The electric dipole can be easily controlled in direction and size by an electric field. Therefore, the direction and size can be changed from a long distance without using metal wiring. Moreover, since it is not necessary to supply a current to change the direction and the size of the electric dipole, unlike a transistor, it is essentially suitable for operation with low power consumption.
Further, since it is possible to remotely control a large number of electric dipoles simultaneously and in parallel, a processor using this is essentially suitable for parallel processing. It goes without saying that parallel processing is extremely important for high-speed information processing. Further, in the conventional clock distribution using metal wiring, it is difficult to synchronize a large number of information processing elements due to clock skew due to wiring resistance, which is an obstacle to high-speed operation. In the present invention, by remotely controlling the electric dipole by the electric field, the clock distribution is performed at the speed of light propagation.
Clock skew is extremely small. Further, since electric dipoles create an extremely anisotropic electric field distribution around them, transmission of information between adjacent electric dipoles can also be performed without using metal wiring. Further, as an element having a finite electric dipole, it is necessary to confine conduction carriers in a finite region. For this purpose, a so-called quantum confinement structure may be formed using semiconductors having different electron affinities, and an impurity serving as a donor or an acceptor may be added therein. Therefore,
A semiconductor device based on the principle of the present invention has an extremely simple structure as compared with a conventional transistor. Further, when a structure having two regions having a low potential for electrons (a double minimum potential structure) is used as the quantum confinement structure, the conduction carriers exist in the first low potential energy region or the second low potential energy region. Since it can be associated with two types of electric dipole efficiency vectors depending on whether or not it exists in the region, it is compatible with digital signal processing and digital signal storage. Further, since the quantum confinement structure can be reduced to a size of the order of nanometers, a signal processing chip and a storage chip using the structure can be extremely highly integrated. Further, according to the present invention, an active region having a large electron polarizability is realized by adjusting the barrier height of the barrier film, and when the active regions are arranged in a lattice pattern, electric dipoles in adjacent active regions are aligned in the same direction. Can be realized. This means that if a small electric dipole occurs in one active region, it creates an electric field at the location of the next active region. Due to the large electronic polarizability, this active region has a large electric dipole moment vector and creates a large electric field in the original active region. Therefore, the original active region also has a large electric dipole efficiency vector. Since this has spontaneous polarization in terms of dielectric physics, it can constitute a kind of artificial ferroelectric. The conventional ferroelectric uses the rotation of ionic polarization and therefore has an insufficient response speed, and has a problem that the dielectric constant decreases in a high frequency region when a capacitor is formed. However, the artificial ferroelectric substance of the semiconductor device of the present invention uses a movement of electrons due to the tunneling phenomenon for polarization, and therefore has a much higher response than a conventional ferroelectric substance. For this reason, a capacitor for ultra-high speed and ultra-high frequency applications can be formed. In addition, when a structure in which the quantum confinement structures having such a double minimum potential are arranged in a lattice shape is formed into a thin film and an electric field is applied in a direction perpendicular to the film, most of the electric dipoles of the quantum confinement structure become electric fields. In the direction of. However, when the electric field is not very strong, there may be regions having electric dipoles in the opposite direction to these electric dipoles. In addition, the inverted polarization region has a constant size and exists stably unless erased by applying a large electric field. This is due to the mechanism described below. The film is polarized by the vertical electric field. At this time, surface charges due to polarization appear on the film surface, and the electric field (anti-polarization field) generated by the surface charges is in a direction to reduce the polarization. The formation of a region having the opposite polarization reduces the surface electric field and reduces the overall energy. Since the inverted polarization region has a constant size and exists stably, it behaves as a kind of particle (or pseudo particle). This inverted polarization region is stationary under a uniform vertical electric field, but has a property of moving when the vertical electric field changes depending on the location. Therefore, information can be recorded by making the in-plane distribution of the inversion polarization region correspond to the information. In this storage method, the storage density is extremely large, and power consumption is not necessary for storage retention, and therefore, it is nonvolatile. . If this inverted polarization region is made to correspond to 1/0 of a digital signal, it can be used for digital signal processing.
This means that inverted polarization regions, which are artificial pseudo-particles, are used as information carriers, in place of the conventional semiconductor element using conductive carriers, which are particles in the natural world. When a non-uniform vertical electric field is applied, the inverted polarization region moves, but there is an essential difference from the conventional semiconductor device in the following sense. First, in the movement of the inversion polarization region, the electron only moves an extremely short distance in each quantum confinement region. In addition, the direction in which the electrons move is perpendicular to the film, and is perpendicular to the direction in which the inverted polarization region moves. In a conventional semiconductor device, electrons need to actually move in a semiconductor at the same time as information, but in the present invention, information transmission does not involve such movement of electrons. In practice, the electric field created by the electric dipole will propagate through the semiconductor at the speed of light propagation. Therefore, information processing is performed at a very high speed. In a conventional semiconductor device, electrons are accelerated by an electric field (that is, gain energy) and travel while colliding with obstacles (crystal lattices and impurities), so that energy is converted into heat. That is, power consumption is large and chip heat generation is also large. On the other hand, in the present invention, such an energy consumption is extremely small because electrons do not actually move.

【Example】

 Hereinafter, a first embodiment of the present invention will be described. Fig. 1 (a)
(B) and (c) show quantum closures according to the first embodiment of the present invention.
1 shows a semiconductor device using an embedded structure. FIG. 1A shows the structure of the active region. Shown in the figure
1 is the first quantum well, 2 is a thin barrier film, 3 is the second
The quantum wells 5 are donors, from which the active region 6 is
It is configured. This active region is buried in the barrier region 7.
It is embedded. FIG. 4B shows the potential in the active region.
FIG. 4 is a diagram showing a char energy. As shown in the figure,
And the second quantum wells 1 and 3 have higher electron affinity than the barrier region.
It is composed of semiconductors that can confine conduction electrons.
Can be. That is, the active region has a quantum confinement structure.
To achieve. The thin barrier film 2 has a higher electron affinity than the quantum wells 1 and 3.
It is composed of a small semiconductor (or insulator).
Also, impurity atoms serving as donors are added to the thin barrier film.
Have been. The conduction electrons generated from the donor are the first or second
Exists in either of the two quantum wells. Energy of thin barrier film
The height and thickness of the energy barrier are
Tunnel effect or thermal excitation with finite probability from 3 to 1
Set so that more electrons can transition. Where the active area
Let a be the distance (dipole lattice constant) between the first and second
Let d be the width of the quantum well and t be the thickness of the barrier film between the quantum wells.
And the height of this barrier film is bh. As a combination of materials used for the barrier region and the quantum well
Are GaAlAs and GaAs, AlAs and GaAs, InP and GaInPAs, GaP and GaInPA
Possible combinations include s, Si and SiGe, SiO2 and Si, SiGe and Ge
Can be Generally, a material different from the thin barrier film 2 and the barrier region 7
A material may be used, but the same material may be used.
As a specific example, as a barrier region, GaAlAs (Al
The ratio is, for example, 20%).
Cube of 0nm GaAs, 2nm thick as thin barrier film
One donor Si is added to GaAlAs (Al ratio is, for example, 15%).
Use the added one. The above configuration can be achieved by using an acceptor instead of a donor.
realizable. In this case holes instead of electrons are in the active region
Exercise. In this example, the barrier region is Si,
The first and second quantum wells 1, 3 are SiGe with a side of 5nm (Ge ratio is
(For example, 15%), 1 nm thick as a thin barrier film
And one acceptor B is added to Si. FIG. 3C is a diagram showing a lattice structure. Shown in the figure
As shown, the active regions 6 are arranged on the lattice in the barrier regions 7.
I do. Next, the operation of this device will be described. As shown in FIG.
In each active region, conduction electrons 4 generated from the donor are
It exists in either quantum well 1 or 3. Electron quantity
Depending on whether it is in subwells 1 or 3, this active area
Finite electric dipole efficiency vector, or electric dipole strength
And a vector giving the direction. Electric dipole efficiency
The vector p is represented by the following equation. p = q · d (1) q is the charge amount of the electron, and vector d is the average position of the electron and the
This is a distance vector from the object. Therefore, the structure shown in FIG.
Have an upward or downward electric dipole efficiency vector.
I do. In the structure arranged in a lattice as shown in FIG.
Region has an upward or downward electric dipole efficiency vector.
So, for example, looking at the distribution of the electric dipole at a certain moment,
1 is as shown in FIG. Electric dipole for each active region
When the efficiency vectors are independent and there are n active regions
Total 2ⁿThere can be a distribution method of the individual. This is Digi
If rules are defined to correspond to the total information, n-bit information
Can be associated. It uses n bits of information
This is expressed inside the device according to the embodiment. each
When the electric dipole moment vectors in the active region are not independent
Implies that the amount of information that this device can represent is n bits or less.
You. When this grid structure is sandwiched between electrodes, an external electric field is applied.
Change the electric dipole efficiency vector of the active region almost simultaneously.
Can be changed. In each active region, the external electric field and other
Receives the electric field that is the sum of the electric fields created by the active regions
The electric dipole efficiency vector changes according to the change. Each activity
The anisotropic region is extremely anisotropic around it, as shown in FIG.
Make a strong electric field distribution. Bi at vector r away
The electric field vector E (r) created by the pole is expressed by the following equation. E (r) = [3 (p · r) rr^Twop] / (4πεr^Three(2) The electric field E is a vector of the electric dipole, as shown in FIG.
On the straight line in the same direction as the electric dipole,
Anti-dipole opposite to the electric dipole on a straight line perpendicular to the electric dipole
It is. Electric dipoles have an electric dipole pointing in the direction of the electric field.
Since the force that tries to act works, use this to
Increase or conversely reduce the electric dipole efficiency of
Can be. It dipoles the transmission of information between active regions
You are doing it through interaction. The way of change is
Specifically by the interaction between the initial state and the active region
Although it is various, it is controlled and used as an information processing device.
Can be The maximum data that this information processing device can handle is
Large, n bits. At this time, information is transmitted at the speed of light.
So, information is transmitted at a very high speed. In addition, as in this embodiment, the potential in the active region is
The region where the energy is minimal is (for quantum wells 1 and 2)
If there are two locations (double minimal potential structure and
Electrical dipole capability, especially with small electric field changes
The rate vector can be greatly changed. This is live
This is because the electron polarizability α of the active region becomes extremely large.
This will be described below. Electronic polarizability is defined by the following equation:
You. p = αE (3) where p is the electric dipole efficiency vector, and E is the active region
Electric field vector. As with the electron polarizability of an atom,
The electronic polarizability of the neutral region is expressed by the following equation using the perturbation theory of quantum mechanics.
Approximately represented. α = 2 | <1 | pd | 2> |^Two(E_Two−E₁) (4) where <1 | is the state vector of the ground state of the active region.
Represented using Dirac bra symbol, | 2>
The state vector of the starting state is expressed using Dirac's Ket symbol.
Passed, and thus <1 | pd | 2>
Matrix element of the air dipole efficiency vector pb, E₁Is the ground state
Nergie, E_TwoIs the energy of the first excited state. Simple meter
As a result of the calculation, as the barrier height of the barrier film increases, this equation
Denominator of E_Two−E₁Decreases monotonically, so α increases.
I understand. When the height of the thin barrier film becomes infinite, E_Two−
E₁Becomes 0, and α becomes infinite. That is, when the electric field is 0
Also have a finite electric dipole efficiency vector, or permanent
Have a dipole. In any case, double mini potato
In the active region, the potential barrier of a thin barrier film
Depending on the height of the wall, the magnitude of the electron polarizability α
Can be controlled within a circle, and extremely large α can be realized.
You. The active region with large electron polarizability is clear from its definition.
As can be seen, a large electric dipole even for a small electric field
Has an efficiency vector. Adjusting the barrier height of the thin barrier film to increase the electron polarizability
Having an active region having a lattice shape as shown in FIG.
, The electric dipole efficiency vector of the nearby active region
Can be realized in the same direction. This is shown in FIG.
Show. This is for the following reasons. A certain activity
Small electric dipole efficiency vector in the active region
This creates a small electric field at the location of the adjacent active region. Electric
Due to the large polarizability, this active region has a large electric dipole.
With a large efficiency field and a large electric field in the original active region.
create. Therefore, the original active region also has a large electric dipole efficiency.
Have a vector. Such a positive figure
When working back from side to side, activity close to
Regions have electric dipole efficiency vectors in the same direction as each other
Become like The group of such active regions is hereinafter referred to as “
The electric dipole efficiency vector of the active region
If we replace the torque with the spin magnetic dipole efficiency vector,
This embodiment is very similar to a ferromagnetic material. Magnetic
In the field, the region where the spins are aligned is called polarization.
The invention also uses this name. The domain of this embodiment is
Sexual domains provide feedback to each other,
Is stable, and the electric dipole efficiency can be increased without applying an electric field.
Holds vector orientation. This is a dielectric physics term
Can be expressed as having spontaneous polarization. Conditions under which spontaneous polarization occurs in a substance having a three-dimensional cubic lattice
The following are known. This is C. Kittel
Author, "Introduction to solid state physics," 5th edition (John Wiley & Sons, Inc.), pp. 417-418
According to Nα> 3 / 4π₀ …… (5) Where N is the density of the dipole,
The invention corresponds to the density of the active region. As mentioned above,
α is extremely high if the potential height of the thin barrier film is increased
It is easy to meet this condition because it can be high.
Therefore, the feasibility of spontaneous polarization is clear. Increase barrier height or thickness in thin barrier areas
This improves the stability of the polarized state,
Spontaneous polarization can be maintained up to temperature. In the case other than the three-dimensional cubic lattice, for example, there is a square lattice
Or in the case of a two-dimensional grid, 3/4 of the right side of the above conditional expression
Although π changes, a similar conditional expression holds. The direction of this spontaneous polarization depends on the electric field applied from the outside.
Can be reversed. Polarization (electrons per unit volume)
The relationship between the air dipole efficiency) and the external electric field is shown in FIG.
And a relationship having hysteresis. This hysteresis
Can be used to store information. BaTiO has been a substance with spontaneous polarization._ThreeSuch as
A group of ferroelectric materials is known. These natural invitations
The electric dipole efficiency vector of an electric body mainly constitutes a crystal
Spontaneous polarization occurred due to displacement of ions.
In the present invention, the movement of electrons causes the electric dipole efficiency
They differ greatly in that vectors occur. Electric
Because the pups are much lighter than the ions, the present invention
Response speed to electric field is much faster than dielectric
is there. If the structure of this embodiment is sandwiched between the electrodes,
In addition, a capacitor that can respond at a very high speed can be formed. BaTiO_Three
Ferroelectrics have a high dielectric constant in nature,
The response speed is high due to the high dielectric constant realized by displacement.
The degree was slow. High in the present invention due to the displacement of electrons
Response speed is normal ferroelectric because of realizing dielectric constant.
More than three orders of magnitude faster. Large quantum wells allow electrons to move
As the range is widened, the dielectric constant increases. Also, quantum closed
Increase the density of the confinement structure (reduce the lattice spacing)
As a result, the dipole interaction between quantum confined structures becomes
As it increases, the dielectric constant also increases. Semiconductor superlattice structures have been actively studied so far.
However, by combining different types of semiconductors, mobility and bandgap
To realize semiconductors with different physical constants such as
Was. In contrast, the present invention combines semiconductors
And the same properties as a completely different material called ferroelectric
It is very different from the past in that it can be realized,
Is considered to be a novel invention. In this embodiment having the spontaneous polarization and the domain structure as described above,
Indicates the generation, erasure, and boundary positions of domains by applying an external electric field.
The position can be moved. In the present invention, the spatial component of the electric dipole of the quantum confinement structure is
Since the information is expressed by cloth, the conventional transistor circuit
There are various advantages as compared with the method of expressing information in a computer. (Traditional
In a transistor circuit, the transistor is used as a switch.
Function, turning the transistor on or off.
Is associated with a digital signal. At this time, the signal
Appears as a potential in the metal wiring. ) Electric dipole
Can easily control the direction and size by the electric field.
it can. Therefore, without using metal wiring,
The direction size can be changed. That is,
Information can be transmitted without lines. To change the direction and size of the electric dipole,
Since there is no need to flow current unlike a transistor, the present invention
Are essentially suited for ultra-low power operation. Interaction between electric dipoles also propagates at the speed of light propagation
And extremely fast. For information transmission speed,
Limitations due to the saturation speed of electrons as in semiconductor devices
I do not receive. Since the present invention can maintain a finite polarization without a power source,
Change and record the direction and magnitude of polarization depending on the location.
If it is used, it can be used as a recording medium. High density
By arranging the confinement structure, ordinary semiconductor memory
It is possible to obtain a much higher storage density than the storage device. Ma
In magnetic recording, it is necessary to generate a magnetic field during writing.
At this time, it is necessary to flow a large current.
Since it is only necessary to generate an electric field, the power consumption of the writing device
Force and size are much smaller than magnetic recording.
Since the present invention uses a semiconductor, the storage medium
Creates conventional semiconductor devices and circuits on the same material as
Can read and write memories
Circuit, communication circuit, signal processing circuit, etc.
It is also easy to achieve. A second embodiment of the present invention will be described below. Fifth
FIG. 11 shows a nonvolatile random access memory according to the second embodiment of the present invention.
Field-effect transformers used for memory cells of access memory (RAM)
Showing the transistor. Here, 8 is a p-type silicon substrate, 9 is n₊Consisting of areas
Source area, 10 is also n₊A drain region comprising a region,
11 is a source terminal, 12 is a thin barrier film, 13 is a gate terminal, 14
Is the gate electrode, 15 is the barrier region, 16 is the quantum well, 17 is the drain
In terminal. The quantum well is made of polycrystalline Si
The wall film is thin enough to allow electron tunnel current to flow, and
n-type doped SiO_TwoIt is a membrane. Barrier region, quantum well
The gate insulating film (18) is composed of a door and a thin barrier film.
This includes the first and second active areas (19, 20)
You. Next, the insulated gate field effect type according to the second embodiment is described.
The operation of the transistor will be described with reference to FIG. Gate
In the insulating film 18, there are two types shown in FIGS. 6 (a) and 6 (b).
State exists stably. That is, the electric dipole points upward
And downward. Thin SiO_TwoMembrane donor impurities
Conduction electrons originating from the object are distributed in the quantum well. Thin SiO_Two
In the region of the film, the potential energy is high,
Is necessarily small. Because of this
Electrons exist in quantum wells away from the center due to thermal fluctuations
Easier to do. Therefore, finite electric dipoles are likely to occur
No. When the first active region 20 has an upward electric dipole
At this time, an upward electric field is applied to the second active region. Obedience
Therefore, an upward electric dipole is generated in the active region 2.
You. The electric dipole of this second active region is the first active region
Also creates an upward electric field, so that
The direction of the electric dipole vector becomes larger. that's all
Upward due to the effects of the described bodily feedback
Was found to be stable. Exactly similar discussion
The theory holds true for the downward electric dipole state,
More stable. Thus, the gate insulating film 18
It has two stable states inside. This insulated gate field effect
The source and drain of the transistor are grounded and the gate is
When the voltage applied to the electrodes is changed, as shown in FIG.
A current-voltage characteristic having hysteresis is obtained. Gatesaw
Even if the source-to-source voltage is OV, the state and
Can be realized. By using the above properties, the nonvolatile (power supply
RAM that retains data even when not connected)
it can. An example of this configuration is shown in FIG. 29 is row direction data
Code circuit, 21 is word line, 27 is control line, 22 is
Data line, 26 is a memory cell, 24 is a normal insulated gate type
Selection transistor using field effect transistor, 25th
Field-effect transistor having a bistable state described with reference to FIG.
Storage transistor by star, 28 decode / select in column direction
A selection circuit and a sense circuit. Next, write and read operations of this nonvolatile RAM
explain. When writing, select the word line from low.
Go high. Other word lines are low. next,
Set the control line of the bit to be written to the write voltage
And set the data line to low level. Storage of this bit
The transistor gate has a write voltage and the drain has a low level.
Level, the storage transistor is in a low threshold state
Becomes That is, a row is written to the memory of this bit.
I was crowded. When writing high next, write low above
The control line low after the
Write only the data line of the memory cell where you want to write
To voltage. At this time, the gate source of the storage transistor
Between the drain and source.
From the voltage by the threshold voltage of the selection transistor
Applied. Therefore, a negative pole is
Write voltage is applied, and the storage transistor is high.
The state changes to the threshold state. That is, high is written. When reading, set the word line to high level and select
Turn on the transistor and pull the control line low.
Bell and data lines are set to high level (for reading).
Memory in which the storage transistor is in a low threshold state
In the cell, both the storage transistor and the selection transistor
Since the memory cell is turned on, the charge of the data line is released by the memory cell.
And the potential of the data line drops. Storage transistor high
In the memory cell in the threshold state, the data line is
It remains at a high level. Sense the signal on this data line
The signal is amplified by the amplifier and output to the outside to complete the reading operation.
You. Write voltage set higher than read voltage
I do. This actual voltage value is the hysteresis of the storage transistor.
Determined by cis characteristics. Conventionally, in a nonvolatile semiconductor memory, electric charges are transferred through an insulating film.
In order to inject or withdraw,
Due to fatigue, the number of data rewrites was limited. Absolute
If the edge film is thinned, the number of rewrites will increase,
The data retention period is shortened. Also, the data
For erase / rewrite, charge must be injected through the insulating film
And it took about milliseconds. this
For this reason, data is written every machine cycle of the computer.
It was not suitable for a change-over application. On the other hand, in the present embodiment, the point due to the dipole interaction is
Data is held by active feedback.
You. That is, two states are stably maintained inside the insulated gate.
There is work. Therefore, the thickness of the thin barrier film should be 10 Å
Thinning below the troam has no effect on memory retention.
No. Therefore, the problem of long-term fatigue can be avoided. In particular,
This thin barrier film becomes a semiconductor with a large energy gap
In this case, a thick film can be used.
Even if used, there is no problem of long-term fatigue. Also, this storage device
The data erasing or rewriting time is extremely fast.
1 nanosecond or less. This is a small number when rewriting
Carrier moves from top to bottom (or bottom to top) of barrier film
It is only necessary to move. A third embodiment of the present invention will be described below. Fig. 9
(A) shows an example of the storage device according to the third embodiment of the present invention.
You. As shown in FIG. 3C, similar to the first embodiment,
Consists of one quantum well 35, second quantum well 36, and thin barrier film 34
The active region 31 is embedded in the barrier region 37 in a lattice pattern.
You. The first quantum well 35 and the second quantum well 36 are from the barrier region 37
A thin barrier film 34 made of a material having a high electron affinity
Is more electron than the first quantum well 35 and the second quantum well 36
It is made of a material with low affinity. 33 is a donor impurity
You. The difference from the first embodiment is that the electron
The sum force is set to be larger than the electron affinity of the second quantum well 36
When considered in a single active region, electrons
It exists stably in one quantum well 35. This active region has a lattice structure inside the thin film barrier region.
30 is a control electrode made of semiconductor or metal,
38 is n₊This is a ground region made of a semiconductor. Next, this operation will be described. Activities arranged in a grid
The active region is automatically formed by the same mechanism as in the first embodiment.
Can have evoked polarization. In the case of this embodiment, the first quantum well
Has a higher electron affinity than the second quantum well,
The existence probability is higher in the first quantum well. Therefore downward
Electric dipoles (or spontaneous polarization) tend to occur.
However, in this embodiment, the entire shape is a film shape.
(Horizontal dimensions are much larger than vertical dimensions.
), An anti-polarization field is generated. The anti-polarization field is
The electric field generated by the charge on the surface when polarized
Yes, it is in a direction to reduce the polarization inside the substance. This anti
Due to the polarization field, as shown in FIG.
Micro-regions with reversed spontaneous polarization
31) can exist stably. The existence of the inversion polarization region 31 is formulated as follows.
be able to. The energy of this system is
Become. U_T= U_W+ U_E+ U_D …… (6) where U_TIs the total energy, uniformly downward
It is based on the case where the polarizer is polarized. U_WIs inverted polarization
Energy due to the existence of a transition region between the region and other regions
Ghee increase, U_EIs the interaction between the reversed polarization region and the external electric field.
Term U_DIs the interaction between the antipolarization field and the inversion polarization region
Is a term representing. The inverted polarization region is circular due to symmetry.
Assuming that, the following analytical expression is obtained. U_W= 2πrσ (7) U_E= 2πr^TwoPs (E_ext+ Δφ / qd) …… (8) U_D= -2πr^TwoPsPs (1-2N) / ε (9) where r is the radius of the inversion polarization region, and σ is the unit area.
Energy of the transition region, Ps is the magnitude of spontaneous polarization, E
_extIs the external electric field vertically downward to the film, Δφ is the first quantum
The difference in electron affinity between the well and the second quantum well, q
The charge, d, is the distance between the centers of the first and second quantum wells.
And N is the anti-electric field coefficient (when the diameter 2r becomes equal to the film thickness h)
About 1/3, and monotonically decreases as r increases
) Is the dielectric constant of the quantum well. In this embodiment,
No electric field is applied from the part, but the first quantum well and the second
By using a material with a different electron affinity from the child well,
Δφ / qd is a finite value. This equation gives the energy
Fig. 10 shows the dependence of radius on radius r.
You. According to the figure, r = 0 and r = r as stable points of r.₀
There are two conditions: The point at r = 0 is uniformly polarized,
When there is no reverse polarization, r = r₀Is the radius r₀Inversion polarization of
This corresponds to the case where a region occurs. Under either of these conditions
However, once the state is reached, the state is continued. Follow
The inverted polarization region to “1” or
Can be used for recording digital information in correspondence with “0”
it can. Such inversion polarization is substantially parallel to the normal direction of the film.
Is generated by applying an electric field to and controlling the electric field.
It is easy to do. To generate a reversed polarization region,
An electric field may be applied upward to the film. This is the surface of the membrane
Form an electrode in the vicinity and apply a negative voltage to it.
No. At this time, as shown in FIG. 11, r = 0 becomes unstable.
Thus, only a finite r is stable. Thereafter, the external electric field is reduced to 0.
However, a finite r value is held. To move the reverse polarization, the electric field strength perpendicular to the film must be
This can be achieved by providing a slope. It is shown in Figure 12.
Under such a gradient electric field, the inversion polarization region has an upward electric field.
Move in the direction that becomes stronger. Upward as shown in Figure 11
Where the electric field is stronger, the energy is lower and it is more stable
It is. To move the reversed polarization region over a long distance,
A method as shown in FIG. 9 (a) and FIG. 13 is used. T type
Control electrodes 39 and I-type control electrodes 40 are alternately arranged as shown in FIG.
Place. In addition to this, the time substantially parallel to the plane of the thin film
Apply an electric field (rotating electric field) that rotates in both directions.
You. Under the parallel electric field, the control electrode polarizes and
Positive or negative electrodes occur in the part. Activity under negative charge
Since an upward electric field is applied to the conductive region,
The region is more stable if it exists under negative charge. Rotating electric field
When applied, the inverted polarization region is the negatively charged side of the control electrode.
, And sequentially move. Operation shown in Fig. 13
, The recoil polarization region moves to any location
can do. Forming the devices described above on the same chip
The serial memo as shown in FIGS. 14 (a) and (b)
Ri can be formed. Here, 41 is a horizontal direction electric field application electrode,
42 is a power supply and control circuit, 43 is a storage unit, 44 is a sense circuit and
And I / O ports, 45 is minor loop, 46 is transfer gate, 4
7 is a major loop. Digital information is inverted
Record the presence or absence of the polar region, and rotate the power on the minor loop.
Orbiting around the place. Reading of information is done by the transfer gate
Open 46 and send the information you want to read
Through the I / O port. Writing information is the opposite
The inverted polarization region from the I / O port to the major loop.
To send to the minor loop through the transfer gate
And by doing. The inverted polarization region operates as a kind of particle (pseudo particle),
Information can be retained and transmitted. This inverted polarization region
Is a new information carrier that replaces conventional electrons and holes
(Carrier). Inversion polarization
The region is itself energetically stable, like an electron
Does not disappear due to recombination. Using conventional electrons
In information storage and information processing, many electrons move
Was needed. In the present invention, when the inverted polarization region moves,
Therefore, the actual electron movement is slight, and the distribution of the electric field is
Move at high speed. Therefore, fast and low power consumption information
Communication becomes possible. Next, the effect of such a recording apparatus will be described. Electric
Since information can be retained without a source,
is there. By arranging quantum confinement structures at high density
Achieves a much higher recording density than ordinary semiconductor storage devices.
Can be In magnetic recording, a magnetic field is used for writing.
Must occur, and at this time it is necessary to pass a large current.
However, in the present invention, since it is only necessary to generate an electric field,
Power consumption and size of embedded devices are much smaller than magnetic recording
It will be something. Also, the present invention uses a semiconductor.
Therefore, a conventional semiconductor device is placed on the same material as this recording medium.
Since it is possible to create chairs and circuits,
Writing circuit, communication circuit or signal processing circuit, etc.
Can be easily created by the conventional technique. When a non-uniform vertical electric field is applied, the inverted polarization region moves.
As mentioned above, conventional semiconductor devices are
There is an essential difference in the sense described. First, this inversion polarization
In the movement of the region, electrons move inside each quantum confined region.
The very short distance between the first and second quantum wells
Just move. Moreover, the direction in which the electrons move is
The direction is perpendicular to the direction of movement of the inversion polarization region.
Direction. In conventional semiconductor devices, electrons are emitted at the same time as information.
Although it was necessary to actually move through the semiconductor, the information of the present invention
The transmission of information does not involve such electron transfer (or
Involves very little movement). In fact, electric twin
The electric field created by the poles propagates through the semiconductor at the speed of light propagation.
And Therefore, the movement of the inversion polarization region is extremely fast.
You. In a conventional semiconductor device, electrons are generated by an electric field.
Is accelerated (ie, gains energy) and obstacles (crystal
Traveling while colliding with grids and impurities)
Turns into heat. In other words, power consumption is large and chip
Heat generation is large. On the other hand, the present invention
Does not move, so such energy
Very low consumption. In the present embodiment, the electron parents of the first quantum well and the second quantum well
The case where the sum power is different is shown, but when the electron affinity is the same,
The same effect can be obtained by applying an electric field perpendicular to the film.
Obtainable. In this embodiment, the active region is doped with a donor impurity to
In the example described above, the electrons move into the active area.
A similar effect can be obtained by applying a pure substance and utilizing the motion of holes.
be able to. Next, the manufacturing process of this embodiment will be described with reference to FIG.
This will be described with reference to (b), (c), and (d). First, n-type
Barrier region film and quantum well on semiconductor substrate
Film, thin barrier region film, quantum well film, barrier region
Films to be regions are formed one after another. Examples of specific materials
In this case, use Si as the semiconductor substrate and
Is undoped Si, SiGe for quantum well, thin barrier region
Uses Si doped with B. In this case, the quantum well
It is holes that are confined. This is a photolithograph
And dry etching (see the same figure)
(B)) A quantum confinement structure is manufactured. After this,
As shown in (c), a semiconductor region serving as a barrier region is selected.
Let it grow. Finally, a protective film and control electrode are formed
Get Ming. FIG. 17 shows the random access according to the fourth embodiment of the present invention.
Indicates memory storage. As shown in FIG.
Active area consisting of door 49, second quantum well 50, and thin barrier film 51
52 and 53 are embedded in the barrier region 54. First quantum
The well 49 and the second quantum well 50 have a higher electron affinity than the barrier region 54.
It is composed of a large material, and the thin barrier film 51 is the first quantum well
The electron affinity is lower than either of the door 49 and the second quantum well 50
Made of various materials. 55 is a donor impurity. 56 is a memory
And a pair of active regions 52 and 53. This memory cell
Word lines 57 and data lines 58 are formed
I have. Word and data lines are semiconductors with high impurity concentration
Alternatively, it is made of metal. Further, FIG.
As shown in the cross-sectional view of FIG.
And arrange them in high density. Next, the operation of this embodiment will be described. In the memory cell
When writing digital information, proceed as follows.
The word line is set to a positive voltage V, and the data line is set to a negative voltage
Set to V. At this time, unselected word lines and bit lines are connected.
Earth level. 2V voltage is applied to the selected memory cell
The electrons in the active region 52 are transferred from the second quantum well to the first quantum well.
Move to the well. As a result, the active region 52 has
An oriented electric dipole results. This electric dipole is the active region
Since an upward electric field is created at 53, the active area is affected by this electric field.
An upward electric dipole occurs in the zone 53. This is called state 1.
I do. To write the opposite information (0),
The voltage -V may be applied, and the voltage V may be applied to the data line. During this writing, a voltage of only V is applied to the unselected cells.
The barrier height between the first and second quantum wells
And by adjusting the distance between the active region 52 and the active region 53.
Therefore, the state does not change at the voltage V, and the state changes at the voltage 2 V.
Can be designed to roll. As shown in FIG. 18, the storage cell has a pair of electric dipoles.
Apply an electric field in the direction of increasing the dipole to each other, and
, The state is stably maintained. This is shown in the figure
Just electric flip-flops (latch circuits)
It is simulated by a dipole. like this
Flip-flop (latch circuit) with electric dipole
May be connected in series as shown in Fig. 19.
You. The reading of information is as follows. V of word line
Select by applying voltage and applying -V voltage to the data line
1 is written in the cell. At this time, originally the information cell
Is 1, the current flowing to the data line is small.
On the other hand, when the value is originally 0, the electric
The charge required to reverse the poles is
Flow into the line. This charge is transferred by a highly sensitive sense amplifier.
Read out. At this time, the information in the memory cell is destroyed,
After reading, rewrite. According to this embodiment, an ultra-high density memory can be configured.
In particular, as shown in FIG.
Thus, a large-capacity memory can be configured. Also active
With the simple configuration of the pair of areas,
Stable flip-flops (latch circuits)
Has the characteristic that the state can be maintained. Therefore, of the state
No refresh operation like dynamic RAM is required
You. Therefore, the control circuit of the storage device using the present invention is simple.
There is something. Set a certain operating temperature using the fifth embodiment of the present invention.
To explain what structure to take when
I do. FIG. 20 shows an electric field in the active region according to the fifth embodiment of the present invention.
Carrier position due to polarization in the dipole when is applied
FIG. 3 is a diagram showing a relationship between displacement of a laser beam and an applied electric field (specific structure).
Consider the structure shown in FIG. Apply an electric field
Carriers are displaced from the center of the active region. Of this displacement
The magnitude is proportional to the electric field while the electric field is small. Displacement electricity
The field dependence, that is, the proportionality coefficient of displacement to
Becomes larger. This is the carrier at low temperatures
Carrier becomes the first quantum because the thermal energy of
Is stable in one of the well and the second quantum well.
The dipole is likely to be formed.
You. When this proportionality factor exceeds a certain threshold,
The sex region is spontaneously displaced. This threshold is
Decided. A carrier in a certain active region happens to be
When displaced by fluctuations, this causes an electric charge
Create a world. This causes the surrounding active region to become polarized (see
With a dipole). The original activity due to this excitable dipole
The feedback electric field is applied to the region, and the carrier is displaced.
I do. The interaction is strong enough that this carrier displacement begins
If it is greater than or equal to the fluctuation of
Spontaneously without applying an electric field from
Is displaced. This is equivalent to feedback
The gain of the feedback loop is 1
If it exceeds, it corresponds to oscillating. According to such an operation principle, the semiconductor device according to the present invention
Temperature dependence of the dielectric constant of
It becomes Temperature dependence of dielectric constant and structure of semiconductor device
The result of calculating the relationship with constants by computer simulation
Are shown in FIGS. 21 to 28. Fig. 21 shows Si / p type SiO_Twoif
For GaAs / p-type AlAs, set the structural constants shown in the figure.
In this case, the temperature dependence of the dielectric constant is shown. Filling
At high temperatures, carriers land with each other due to thermal energy.
And a disordered state is formed. Therefore, the dielectric
The rate is low. As the temperature decreases, the interaction between dipoles becomes stronger
And the dipoles move with a strong positive correlation to each other
Swell. As a result, the dielectric constant increases rapidly. Transition temperature
T_CNow, all carriers are strongly correlated,
Spontaneous polarization (or spontaneous displacement) occurs. At this time,
The rate is ideally infinite. Transition temperature T_CBelow is the dielectric
The rate is likewise ideally infinite. Transition temperature T_Cbelow
In the low-temperature phase, the carriers are aligned in one direction due to spontaneous polarization.
A displaced state, ie, an ordered state is formed. Transition temperature
T_CCan be called the ordered / disordered phase transition temperature.
You. The dielectric constant is practically, for example, around 100 or more, preferably 5
Around 00 or more, more preferably around 1000 or more
You. Practically defining these required dielectric constant values,
Transfer temperature T_CCan be defined. As shown by the curve marked as a single quantum well in FIG.
From a single quantum well, that is, a quantum well without a barrier film
No structure transition occurs in this structure, the value of the dielectric constant is small,
Almost no temperature dependence. Information storage as described in the first to third embodiments.
In order to be able to hold and memorize,
It needs to work in degrees. This transition temperature is evident below.
As described above, various structures of the semiconductor device according to the present invention
Depends on constant. The various structural constants are shown in FIG.
Also, dipole lattice constant a (distance between centers of active regions), quantity
The width d of the sub well, the thickness t of the barrier film between the quantum wells,
The barrier height bh, the effective mass m in the quantum well, and the like. Figure 22 shows the transition temperature T_CDependence of the dipole lattice constant a on
Figure 23 shows the transition temperature T_COf the quantum well width d,
Transition temperature T_CDependence of the barrier thickness between quantum wells t
Transition temperature T_CEffective mass of m / m₀Dependence, transition temperature in Figure 26
T_CShows the dependence of the barrier height between quantum wells on bh. Dipole lattice constant
The larger the number a, the weaker the interaction between the active regions
Therefore, the transition temperature T_CDrops sharply. Large quantum well width d
As soon as the carrier becomes trapped, the carriers trapped in the quantum well
The zero point energy (ground state energy) of
The probability of passing through the barrier film by tunnel effect is reduced
Therefore, the stability of the displaced state is enhanced. For this reason
The transfer temperature increases. Increase the thickness t of the barrier film between quantum wells
Then, the tunneling probability decreases, and similarly the transition temperature becomes
To rise. Also, as the effective mass m increases,
The transition temperature increases because the flannel probability decreases. Also,
When the barrier height bh between quantum wells is increased,
The transition temperature increases because the rate decreases. Figure 27 shows the various dimensions proportionally reduced (or enlarged).
Transition temperature T_CShows the change in Various dimensions
When changed in proportion, these effects combine to work
I do. According to the analysis, the transition temperature increased with the proportional expansion of the dimensions.
And the transition temperature decreases with a proportional reduction in size. To summarize the relationship between the above dimensions and operating temperature,
Approximately, it can be represented as shown in FIG. Sand
Parameter 5000bht^Two・ D^Two・ M / (a^Threem₀) [EV]
The operable temperature range is determined by [nm]. The upper limit of the operable temperature T on the vertical axis in FIG.
Temperature to be higher than the device temperature determined by the cooling mechanism
Next, the parameters on the horizontal axis are determined. As the operating temperature T,
For example, assuming room temperature operation, T is about 300 (K) or more.
is necessary. Also, depending on the cooling mechanism of the equipment, 200
Values such as (K), 150 (K), 100 (K) are selected. Ma
In an apparatus configuration that cools with liquid nitrogen,
Is determined to ensure an operating temperature of 77 (K) or higher.
You. According to the guidelines in Figure 28, once an operating temperature is determined,
Corresponding structural constants can be determined. Especially
The parameters shown on the horizontal axis in Fig. 28 correspond to the dipole lattice constant a.
Is proportional to its cube, and other structural constants are
Since it is proportional to the first or second power, the dipole lattice constant a
Setting can be a key requirement. For example, 30
Assuming room temperature operation near 0 (K), Si is used for the quantum well,
P-type SiO as barrier film_Two(Figure 27)
The dipole lattice constant a is set to 20 nm.
In other words, when the quantum well width d is 8 nm and the barrier film thickness t is 3.4 nm,
I just need.

【The invention's effect】

2. Description of the Related Art In an integrated circuit using a conventional transistor, a large amount of power is required because a stray capacitance associated with a transistor and a wiring is charged and discharged each time the transistor operates. In addition, as the degree of integration increases, the area required for wiring, the resistance of the wiring, and the like increase.
In addition, due to the complexity of the element structure, the manufacturing cost of integrated circuits has rapidly increased with miniaturization. Further, the operating speed is also limited by the saturation speed. In the information expression method of the present invention, the spatial distribution of electric dipoles is associated with information. Therefore, the resistance of the metal wiring increases. In addition, due to the complexity of the element structure, the manufacturing cost of integrated circuits has rapidly increased with miniaturization. Further, the operating speed is also limited by the saturation speed. In the information expression method of the present invention, the spatial distribution of electric dipoles is associated with information. Therefore, the direction size can be changed from a long distance without using metal wiring. In addition, changing the direction and size of the electric dipole does not require current to flow like a transistor,
It can operate with extremely low power consumption. Also, since it is possible to remotely control a large number of electric dipoles simultaneously and in parallel, a processor using this is essentially suitable for parallel processing.
It goes without saying that parallel processing is extremely important for high-speed information processing. Further, in the conventional clock distribution using metal wiring, it is difficult to synchronize a large number of information processing elements due to clock skew due to wiring resistance, which is an obstacle to high-speed operation. In the present invention, by remotely controlling the electric dipole by the electric field, the clock distribution is performed at the propagation speed of light, so that the clock skew is extremely small. Further, since the electric dipole creates an extremely anisotropic electric field distribution around it, information can be transmitted between adjacent dipoles without using metal wiring. Since the interaction between the electric dipoles is transmitted at the speed of light propagation, the interaction between the electric dipoles is extremely fast, and is not limited by the saturation speed of electrons as in a conventional semiconductor device. Further, the present invention has an extremely simple structure as compared with a conventional integrated circuit in which transistors are interconnected. Further, when a double minimum potential structure is used as the quantum confinement structure, two types of electric dipoles are formed depending on whether the conduction carriers depend on the first low potential energy region or exist in the second low potential energy region. Digital signal processing,
Compatible with digital signal storage. Since the quantum confinement structure can be reduced to the size of the nanometer level, a signal processing chip and a storage chip using the quantum confinement structure can be very highly integrated. Further, in the double minimum potential structure, since the electron polarizability becomes extremely large, the electric dipole efficiency vector can be changed by a very small electric field. Further, by arranging them in a lattice, it is possible to realize a state in which the electric dipole efficiency vectors of the nearby active regions are aligned in the same direction. That is, it has spontaneous polarization. Since this polarization can be maintained without a power supply, if the direction and magnitude of the polarization are changed depending on the location and recorded, it is possible to obtain a much higher storage density than a normal semiconductor memory device. In magnetic recording, it is necessary to generate a magnetic field for writing.At this time, a large current needs to flow.However, in the present invention, since only an electric field needs to be generated, the power consumption and size of the writing device are smaller than those of magnetic recording. It will be much smaller. Further, since the present invention uses a semiconductor, a conventional semiconductor device / circuit can be formed on the same material as the storage medium, so that a memory read / write circuit, a communication circuit, or a signal processing circuit can be formed. And the like can be easily created by a conventional technique. In addition, a quantum confinement structure having such a double minimum potential is arranged in a lattice pattern. When this structure is formed into a thin film, a small inversion polarization region having an electric dipole in the opposite direction to most electric dipoles is formed. You. The inversion polarization region has a constant size and exists stably unless erased by applying a large electric field, and thus behaves as a kind of particle (or pseudo particle). This inversion polarization region is stationary under a uniform vertical electric field, but has a property of moving when the vertical electric field changes depending on the location. Therefore, information can be recorded by making the in-plane distribution of the inverted polarization region correspond to the information. This storage method has a very high storage density, does not require power consumption for storage retention, and is therefore non-volatile. If this inverted polarization region is made to correspond to 1/0 of a digital signal, it can be used for digital signal processing.
In the present invention, information is transmitted by slight movement of electrons and propagation of an electric field. Therefore, information is transmitted at a speed close to the speed of light propagation. Therefore, information processing is performed at a very high speed. Also,
In fact, the movement of electrons is very small, so that the energy consumption is very small. Therefore, an information storage device and an information processing device using the present invention have an extremely high speed and an extremely low power consumption as compared with the related art, and their industrial value is extremely large.

[Brief description of the drawings]

FIG. 1A is a diagram showing a structure of an active region according to a first embodiment of the present invention, FIG. 1B is a diagram showing potential energy in the active region, and FIG. 1C is a diagram showing a lattice structure. FIG. Fig. 2 shows the electric field distribution (lines of electric force) created by the electric dipole.
FIG. 3 is a diagram showing the domain structure of the first embodiment of the present invention, FIG. 4 is a diagram showing the relationship between the polarization and the electric field of the first embodiment of the present invention, and FIG. FIG. 9 is a diagram illustrating a structure of a transistor used in a memory cell of a storage device according to a second embodiment of the present invention;
FIG. 6 is a diagram showing the distribution of potential energy and the distribution of electrons in the gate insulating film of the second embodiment of the present invention, and FIG. 7 is a graph showing the relationship between the drain current and the gate-source voltage of the second embodiment of the present invention. FIG. 8 is a diagram showing a relationship, FIG. 8 is a circuit diagram of a storage device of a second embodiment of the present invention, FIG. 9 is a diagram showing a structure and potential energy of an information processing device of a third embodiment of the present invention, FIG. 10 is a diagram showing the relationship between the energy of the third embodiment of the present invention and the radius of the inversion polarization region. FIG. 11 is a diagram showing the relationship between the energy of the third embodiment of the invention and the radius of the inversion polarization region. FIG. 12 is a diagram showing the case where an electric field is applied, FIG. 12 is a diagram showing the movement of the inversion polarization region by the inclined electric field in the third embodiment of the present invention, and FIG. 13 is a diagram showing the inversion polarization region in the third embodiment of the present invention. FIG. 14 is a diagram showing a transfer method of FIG. FIG. 15 is a diagram showing a structure and a storage unit of a serial memory using a polarization region, FIG. 15 is a diagram showing a manufacturing process in a third embodiment of the present invention, FIG. 16 is a diagram showing a conventional quantum coupling device, FIG. FIG. 17A is a diagram showing a storage cell portion of a random access memory according to a fourth embodiment of the present invention, FIG. 17B is a diagram showing a cross-sectional structure of the storage cell array portion, and FIG. FIG. 19 is a diagram for explaining the similarity to the latch circuit, and FIG. 19 is a diagram showing the similarity between the series-connected active region and the latch circuit. FIG. 20 is a diagram showing the electric field dependence of the carrier position when an electric field is applied to the active region of the fifth embodiment of the present invention. FIG. 21 is a diagram showing the temperature dependence of the dielectric constant of the present invention. Fig. 22 shows the dependence of the transition temperature on the lattice constant.
The figure shows the dependence of the transition temperature on the quantum well width, FIG. 24 shows the dependence of the transition temperature on the barrier thickness between quantum wells, FIG. 25 shows the dependence of the transition temperature on the effective mass, and FIG. The figure shows the dependence of the transition temperature on the barrier height between quantum wells, and FIG. 27 shows the change in the transition temperature when all dimensions are proportionally reduced (or enlarged). FIG. 28 is a diagram showing the operable range of the present invention. DESCRIPTION OF SYMBOLS 1 ... first quantum well, 2 ... thin barrier film, 3 ... second quantum well, 5 ... donor, 6 ... active region, 8 ... p-type silicon substrate, 9 ... n ₊ Source region consisting of regions, 10 …… n ₊
Drain region, 11 ... source terminal, 12 ...
Thin barrier film, 13 ... gate terminal, 14 ... gate electrode, 15
... barrier region, 16 ... quantum well, 17 ... drain terminal,
18 gate insulating film, 19 first active region, 20 second active region, 21 word line, 22 data line, 26 memory cell, 24 normal insulated gate electric field Selection transistor using an effect transistor, 25... Storage transistor using a field-effect transistor having a bistable state,
27 control line, 28 column direction decode / selection circuit and sense circuit, 29 row direction decode circuit, 30
Control electrode, 31 ... inverted polarization region, 32 ... electron, 33 ... donor impurity, 34 ... thin barrier film, 35 ... first quantum well,
36 second quantum well, 37 barrier region, 38 ground region, 39 T-shaped control electrode, 40 I-shaped control electrode, 41
…… Horizontal electric field application electrode, 42 …… Power supply and control circuit,
43… Storage unit, 44… Sense circuit and I / O port, 45…
… Minor loop, 46… transfer gate, 47… major loop, 48… quantum dot. 49 …… First quantum well, 50
... A second quantum well, 51... A thin barrier film, 52, 53... An active region, 54... A barrier region, 55. 56
... Memory cells, 57 word lines, 58 data lines.

Continuation of the front page (56) References JP-A-4-69980 (JP, A) JP-A-3-108759 (JP, A) JP-A-2-140973 (JP, A) JP-A-61-84063 (JP) JP-A-61-82473 (JP, A) JP-A-62-163364 (JP, A) (58) Fields investigated (Int. Cl. ⁷ , DB name) H01L 27/10 H01L 21/338 H01L 21/8247

Claims (10)

(57) [Claims] 1. A semiconductor device comprising a barrier region comprising a high-resistance semiconductor, an insulator or a semi-insulator, wherein the barrier region includes a plurality of active regions, wherein the active region is capable of confining conduction carriers therein. A semiconductor device, wherein each of the active regions includes an impurity atom acting as a donor or an acceptor, and an electric dipole is generated by localization of the conduction carrier inside one of the plurality of active regions. 2. The electric dipole generated in the active region by changing the localization of the conduction carrier inside one of the active regions by the interaction of the electric dipole acting between the plurality of active regions. 2. The method according to claim 1, wherein the direction or size of the element is changed, and the change is propagated as a change in the direction or size of an adjacent electric dipole, whereby information is transmitted. Semiconductor device. 3. The active region includes first and second active regions therein.
2. The semiconductor device according to claim 1, wherein the semiconductor device has a low potential energy region. 4. The active region includes a first and a second region therein.
Wherein the electric dipole is formed depending on whether the conduction carriers are present in the first low potential energy region or in the second low potential energy region. 2. The semiconductor device according to claim 1, wherein information is held in correspondence with the electric dipole in the active region. 5. A film comprising the barrier region and the plurality of active regions, wherein an electric field is applied substantially parallel to a direction normal to the film, and the electric field is applied substantially in the same direction or substantially as the electric field. 2. The semiconductor device according to claim 1, wherein a minute region composed of electric dipoles in opposite directions is distributed inside said film to retain information. 6. A patent characterized in that the minute area composed of the electric dipoles in the same direction or substantially the opposite direction as the applied electric field corresponds to a digital signal "1" or "0". The semiconductor device according to claim 5. 7. An electric dipole is transferred between the plurality of active regions by applying an electric field substantially parallel to a direction of a plane of the film and rotating the direction of the electric field. 6. The semiconductor device according to claim 5, wherein: 8. The semiconductor device according to claim 1, wherein a pair of said active regions are disposed adjacent to each other to equivalently simulate a flip-flop. 9. An information storage device comprising a plurality of pseudo flip-flops arranged and a word line and a data line connected or approached to the plurality of pseudo flip-flops. 2. The semiconductor device according to claim 1. 10. An upper limit of an operating temperature of the semiconductor device is set to a predetermined value, and a dielectric constant due to the localization of the electric dipole at the upper limit has at least a predetermined value.
2. The semiconductor device according to claim 1, wherein at least a distance between the plurality of electric dipoles is set.