JP2964096B2 - How to read data from memory - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of reading data from a memory, and more specifically, to a method of reading data related to, for example, an output signal of a measurement signal generator from a memory. It is about.

[Conventional technology]

In the case of a power supply or measurement signal generator, for example, when supplying measurement signals to the same circuit under test by sequentially changing the function, range, output value, limit value, frequency value, interval time, etc., these different output data Are stored in a memory, and output data is sequentially read from the memory in the auto scan mode.

An example will be described with reference to the flowcharts of FIGS. First, a plurality of memory areas M ₁ , M _{2 to} M
It is assumed that different output data as described above is stored in _n . Set the number of step repetitions, start address and end address in the auto scan mode. Set the address of the step output data as the start address. Outputs the contents of the step output data address. It is determined whether the step output data address is equal to the end address. If NO, the output address is incremented by one in the step, and the process returns to the step. If YES, it is determined whether the number of repetitions has been reached in the step. If NO, the number of steps is incremented by one and the process returns to the step. If YES, the process ends.

[Problems to be solved by the invention]

As described above, the output data is sequentially read and different measurement signals are supplied to the circuit under test.
Conventionally, output data is read in the order of address +
Since it is constant at 1, depending on the circuit under test,
It is necessary to rearrange the output data. For example, if the circuit under test has a capacitor, applying a high voltage first is dangerous in later tests.
The high voltage application step should be changed as soon as possible. Further, when the memory area of an even address is used as an empty address for additional storage of output data, for example, the memory area in which the output data is not stored is read out, so that it takes time.

[Means for solving the problem]

The present invention has been made in order to solve the above-mentioned conventional drawbacks, and its structural feature is that it has a plurality of memory areas provided in electric measurement means such as a measurement signal generator, and each of the memory areas has In the memory data reading method in which the stored measurement data for the device under test is read out a predetermined number of times in the auto scan mode in which the entire memory area is read out, the output order is set by the address of each memory area. When reading data, according to the address order set in the output order setting RAM, the measurement data in the memory area corresponding to the address is sequentially read. It is in.

[Action]

According to the above configuration, by setting the address of the memory area to be read in the output order setting RAM, data in the memory area corresponding to the address is read in the setting order in the auto scan mode.

〔Example〕

FIG. 1 shows an example of a circuit configuration for implementing the data reading method. In the figure, 1 is CP
U and 2 are output data storage RAMs, and the RAM 2 is partitioned into a plurality of memory areas. 3 is RAM for output order setting, 4
Is a working RAM, 5 is a ROM in which execution instructions for the CPU 1 are written, 6 is an operation unit for storing output data in the RAM 2 via the CPU 1, 7 is an output unit for giving an output signal to a circuit under test, etc. Reference numeral 8 denotes a display unit.

First, the operation unit 6 stores output data to a power supply or a measurement signal generator (not shown) in the RAM 2. That is, the operation unit 6 sets output data including, for example, a function, a range, an output value, a limit value, a frequency value, and an interval time, and specifies the address in the RAM 2 and stores the output data in the memory area. . Similarly, output data having different output conditions is stored in the memory area while specifying a predetermined address.

Next, a case where each output data is read in the auto scan mode will be described with reference to the flowchart of FIG. First, in step ST1, the number of scans is set. Then, in the next step ST2, the output order of the memory area to be read is determined by the address for the output order setting RA.
Set to M3. In the following step ST3, the reading order is 1
Is set as the output address, and step ST4
Outputs data. That is, the output data of the memory area corresponding to the output address is
M4 is loaded, and the output condition is set in the output unit 7. Thereafter, it is determined in step ST5 whether the address is in the final reading order. If NO, the address in reading order 2 is loaded, and the process returns to step ST4. If YES, it is determined in the next step ST6 whether the number of scans has been completed. NO
If so, the number of scans is set to +1 and then the process returns to step ST2, and if YES, the process ends.

As described above, according to this data reading method, the third
As illustrated in the figure, the read order can be arbitrarily changed in the order of 5 → 2 → 10 →... → 7 → 8 at the address of the memory area. This also means that output data can be read by skipping empty addresses in the auto scan mode.

〔The invention's effect〕

As described above, according to the present invention, the output order setting RAM which can set the output order at the address of each memory area is provided, and when reading data, the output order setting RAM is set. According to the order in which the addresses are
Since the data in the memory area corresponding to the same address is sequentially read, even in the auto scan mode in which all memory areas are automatically scanned a predetermined number of times from the first address to the last address, for example, the circuit to be measured can be read. The reading order of the output data can be arbitrarily changed according to the conditions. Further, even in a memory area where no data is stored, it can be skipped and only necessary data can be read.

[Brief description of the drawings]

FIG. 1 is a block diagram showing an example of a circuit configuration provided for carrying out the present invention, FIG. 2 is a flowchart for explaining the operation of the present invention, and FIG. 3 is a diagram showing data from a plurality of memory areas according to the present invention. FIG. 4 is an explanatory view exemplifying a reading order when reading, FIG. 4 is an explanatory view for explaining a conventional data reading method in relation to a plurality of memory areas, and FIG. 5 is a flowchart for explaining the conventional operation. In the figure, 1 is a CPU, 2 is a data storage RAM, 3 is an output order setting RAM, 4 is a working RAM, 5 is a ROM, 6 is an operation unit,
7, an output unit; and 8, a display unit.

Claims (1)

(57) [Claims] An electric measurement means such as a measurement signal generator has a plurality of memory areas. Measurement data for a device to be measured stored in each of the memory areas is read from all memory areas. A data reading method for reading data a predetermined number of times in an auto scan mode, comprising: an output order setting RAM capable of setting an output order at an address of each memory area; A method of reading data from a memory, characterized in that measurement data in a memory area corresponding to an address is sequentially read in accordance with an address set in the output order setting RAM.