JP2950085B2 - Multiplexing equipment for mobile - Google Patents

Abstract

PURPOSE:To divide the processing into a processing in the abnormal state of a transmission node or in the abnormal state of an oscillation circuit and a processing in the sleep state of a master station by using a carrier-off detection circuit to clearly distinguish a sleep state through stopped communication from a fail safe state on the occurrence of a fault. CONSTITUTION:When sleep preparation start command is not outputted from a master station 2, carrier sense is executed based on an operation monitor signal obtained by sampling reception data obtained from communication data on a multiplexer communication path 4 by 1st slave stations 3a-3n and when the sleep preparation start command is outputted from the master station 2, carrier sense is directly executed based on a carrier of reception data obtained by fetching communication data on the multiplexer communication bus 4.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multiplex communication apparatus for a mobile unit having a low power consumption function and mounted on a mobile unit such as an automobile.

[0002]

2. Description of the Related Art As a multiplex communication device with a low power consumption function mounted on a mobile body such as an automobile, a device as shown in FIG. 6 has been conventionally known.

A multiplex communication apparatus 101 having a low power consumption function shown in FIG. 1 has one master station 102 serving as a master station.
And the first slave station 103a to the Nth slave station 10 serving as slave stations.
3n and a multiplex communication bus 104 for connecting them, the master station 102, the first slave station 103a to the Nth slave station 10
3n to perform data communication with the first slave stations 103a to 103a to 103n.
Each input circuit 105b connected to the Nth slave station 103n
１０５105n are collected and supplied to the CPU 107, while the control data output from the CPU 107 is supplied to the load circuits 106a１０６106n connected to the first slave station 103a〜Nth slave station 103n. . Then, after a series of communication processing ends, the first slave stations 103a to 103a
Until the wake-up signal indicating that the data of each of the input circuits 105a to 105n has changed is output from the N-th slave station 103n, the master station 102 is in the sleep state, and the first slave station 103a to the N-th slave station. The station 103n enters a sleep state to save power of the entire system.

The master station 102 is connected by a parallel bus 108 to a CPU 107 for controlling the operation of each part of the mobile unit, and is connected by a multiplex communication bus 104 to the first slave station 1.
03a to the Nth slave station 103n.
Based on the instruction from 07, any one of the first to 103rd slave stations 103a to 103n is selected to collect data and supply control data, and enter a sleep state based on a command from the CPU 107.

[0005] The first to Nth slave stations 103a to 103n
Each of the master station 10 is connected to an input circuit 105a to 105n constituted by a switch such as a door switch and a load circuit 106a to 106n constituted by a door lock actuator and the like.
2 and communicates with the master station 102 via the multiplex communication bus 104 to input circuits 105a to 105n.
Is transmitted to the master station 102, and the control data output from the master station 102 is taken into the load circuit 106a.
~ 106n. When the master station 102 enters the sleep state, the sleep state is detected and the sleep state is detected. The data change of each of the input circuits 105a to 105n is detected, and the sleep state of the master station 102 is released.

For example, a first slave station 103a is arranged in a door of a driver's seat, and one of a plurality of input port circuits provided in the first slave station 103a is connected to a door lock switch of a driver's seat. Assuming that the second slave station 103b is arranged in the door of the passenger seat, and one of the plurality of output port circuits provided in the second slave station 103b is connected to the door lock actuator of the passenger seat. , C
The master station 102 under the control of the PU 107 is the first slave station 10
A data transmission command for 3a is generated and transmitted to the first slave station 103a via the multiplex communication bus 104.

As a result, the first slave station 103a detects that data transmission from itself has been designated, collects input port data including the state of the door lock switch, generates communication data, and multiplexes the communication data. The data is transmitted to the master station 102 via the communication bus 104.

The master station 102 is connected to the multiplex communication bus 104
The communication data is received via the CPU 107 to generate received data, which is supplied to the CPU 107.

Next, the received data is processed by the CPU 107, and the state of the door switch is determined. Control data for controlling the door lock actuator is generated based on the determination result. The master station 102 that has taken in the control data generates a data reception command for the second slave station 103b, and supplies it to the second slave station 103b via the multiplex communication bus 104. Then, the master station 10
2 generates communication data based on the control data and supplies it to the second slave station 103b via the multiplex communication bus 104.

Accordingly, the second slave station 103b detects that the own station has been designated as the communication data receiving station, and takes in the communication data from the multiplex communication bus 104 to generate the reception data. While latching
It is supplied to a door lock actuator to control it.

Hereinafter, the master station 102 controls the entire system by sequentially repeating the above-described series of processes for the first slave station 103a to the Nth slave station 103n in the procedure shown in FIG.

When a series of operations such as collection of each input port data and transmission of each control data is completed and no operation is required in the key-off state, the master station 102 is set to the sleep state (based on an instruction from the CPU 107). (The prime mover is stopped), and based on the state of the multiplex communication bus 104, the first slave station 103a to the Nth slave station 103n
02 is in the sleep state upon detecting that it is in the sleep state. This reduces the power consumption of the entire system and prevents the battery from running down.

However, in a mobile body such as an automobile, even in a key-off state, such as in a door lock system,
There are load circuits that must be operated. For this reason,
After a certain period of time after the key-off state, the master station 1
02 is in the low power consumption state, transmission is stopped, and the first slave station 103a to the Nth slave station 1 confirm that the state of the multiplex communication bus 104 does not change for a predetermined period of time.
Even if the state of the door lock switch changes even if the sleep state has been detected by the detection of the switch 03n, the first slave station 103a connected to the door lock switch detects this and generates a wake-up signal. Is transmitted to the master station 102 via the multiplex communication bus 104. As a result, the master station 102 is returned from the sleep state, and the control operation of the door lock actuator is performed.

Next, the circuit configuration of the first slave station 103a will be described with reference to the block diagram shown in FIG.

The first slave station 103a shown in FIG. 1 includes a communication unit 110, a sleep / failsafe unit 111, a reception unit 112, a transmission unit 113, and a wake-up unit 114.
And the master station 10 via the multiplex communication bus 104.
2 and communicates with the base station 12 when its own station is designated as the transmitting station, while taking in input port data output from the corresponding input circuit 105a and transmitting it to the master station 12 via the multiplex communication bus 104. When the own station is designated as the receiving station, the communication data is fetched from the multiplex communication bus 104 and supplied to the load circuit 106a while latching the communication data. State, and this state is maintained until the parent station 102 is restarted. If the input port data from the corresponding input circuit 105a changes during this time, a wake-up signal is generated and transmitted to the master station 102 via the multiplex communication bus 104, and the sleep state of the master station 102 is set. Release. Furthermore, the clock signal of own station is lost for some reason,
When a signal on the multiplex communication bus 104 becomes abnormal, this is detected to invalidate control data for the load circuit 106a or to prohibit updating of control data, thereby preventing erroneous control due to signal abnormality. I do.

The communication section 110 takes in the transmission data output from the transmission section 113, sends out the data on the multiplex communication bus 104, and transmits the multiplexed communication data to the master station 102, while multiplexing the communication data output from the master station 102 into multiplex communication. Multiplexed communication bus I / F circuit 1 for generating received data via bus 104
15 and decodes the received data output from the multiplex communication bus I / F circuit 115 to determine whether the received data is a command for the own station. If the received data is a command for the own station, a reception start command is generated. Output to the receiving unit 112, if the received data is a data transmission command to the own station, generate a transmission start command and output it to the transmitting unit 113, and also generate a wake-up memory cancel signal and supply it to the wake-up unit 114 And an instruction decoder circuit 116.

The sleep / fail safe unit 111 takes in the received data output from the communication unit 110 and, when the received data has not changed for a predetermined period of time, detects this and the master station 102 detects it. A first carrier-off detection circuit that determines that the apparatus is in a sleep state and generates a first carrier-off signal; and a clock signal when the first carrier-off signal is output from the first carrier-off detection circuit. Circuit 1 that stops the occurrence of power and places the entire first slave station 103a in a low power consumption state
18 is provided.

The sleep / fail safe unit 1
Each time the clock signal output from the oscillation circuit 118 rises (or falls), the communication unit 11
D-type flip-flop 11 which samples received data output from 0 and outputs it as an operation monitoring signal
9, when the operation monitoring signal output from the D-type flip-flop 119 does not change for a predetermined period of time, this is detected, and the transmission node of the master station 102, the oscillation circuit 118, and the like are abnormal. And a second carrier off detection circuit 120 that generates a second carrier off signal
And a fail-safe circuit 121 that generates a fail-safe signal when the second carrier-off signal is output from the second carrier-off detection circuit 120.

The second carrier-off detection circuit 120 is provided in the circuit shown in FIG.
One RS flip-flop circuit 123 as shown in FIG.
One NAND gate circuit 124 and one delay circuit 1
25, and a one-shot mono-multi circuit 126 that is retriggered every time the operation monitoring signal changes, and a "0" signal is output when a predetermined time has passed since the one-shot mono-multi circuit 126 is no longer retriggered. And an AND gate circuit 12 for stopping the generation of the "0" signal when the power-on reset signal is supplied thereafter.
7 and an inverter circuit 128 for inverting the output of the AND gate circuit 127.

The second carrier off detection circuit 12
0 denotes an FET 133 that conducts when "1" is output from the inverter circuit 128 and discharges a time constant circuit 132 constituted by a resistor 130 and a capacitor 131 externally attached to the chip 129; When the capacitor 131 discharges to a level below a preset level, a hysteresis inverter circuit 134 for generating a “1” signal, a “0” signal from the AND gate circuit 127 are output, and a hysteresis inverter circuit is output. When an “1” signal is output from the RS 134, an RS flip-flop circuit 135 that generates a “0” signal and the RS flip-flop circuit 13
5 is provided with an inverter circuit 136 that generates a “1” signal when the “0” signal is output and outputs the signal as a second carrier-off detection signal.

Receiving section 112 receives a reception start command from communication section 110, receives a reception data output from communication section 110, and receives a reception data output from reception circuit 140. An output port circuit 141 for latching and resetting and erasing the latched received data and stopping updating of the received data when the fail / safe signal is output from the sleep / fail safe unit 111 is provided.

The transmitting unit 113 is provided with a corresponding input circuit 105
a input port circuit 142 which takes in the input port data output from a and outputs it to the wake-up unit 114;
A transmission circuit 143 for receiving input port data output from the input port circuit 142 when the transmission start command is output from the communication unit 110, and outputting the input port data as transmission data to the multiplex communication bus I / F circuit 115; I have.

The wake-up unit 114 includes a transmitting unit 113
Input port data output from the input port circuit 142, and checks whether or not this has changed.
When the input port data changes, a port state detection circuit 144 for generating a port change signal, and when a port change signal is output from the port state detection circuit 144, the port change signal is taken in, stored and output, and the communication unit 11
When a wake-up memory cancel signal is output from 0, a wake-up memory circuit 145 for erasing the stored port change signal, a port change signal is output from the wake-up memory circuit 145, and sleep / fail safe A wake-up circuit 146 that generates a wake-up signal when the first carrier-off signal is output from the first carrier-off detection circuit 117 of the unit 111.

Then, the wake-up unit 114
When the input port data output from the input port circuit 142 of the transmission unit 113 changes and the first carrier off signal is output from the first carrier off detection circuit 117 of the sleep / fail safe unit 111, the wake-up signal Is generated, supplied to the communication unit 110 and transmitted to the master station 102, and the sleep state of the master station 102 is released. Thereafter, when the master station 102 starts a communication operation and a wake-up memory cancel signal is output from the communication unit 110, it is determined that the sleep state of the master station 102 has been released and the generation of the wake-up signal is stopped. .

As described above, in the first slave station 103a, when the clock signal is normally output from the transmission circuit 118, the carrier of the communication data output from the transmission node is transmitted via the D-type flip-flop 119. When the transmission node goes out of control or stops for some reason and the carrier of communication data is cut off for some reason, the one-shot mono of the second carrier off detection circuit 120 shown in FIG. Multi circuit 1
26 becomes “0” level, and the time constant circuit 132
When the preset time elapses from this time, a second carrier-off signal indicating the occurrence of a failure is generated, and the fail-safe signal is output from the fail-safe circuit 121. Output
As a result, the output port circuit 141 of the receiving unit 112 is reset, and the update of the received data is stopped, so that the actuator controlled by the control data output from the output port circuit 141 does not malfunction.

In the conventional sleep / fail-safe unit having no D-type flip-flop 119, even if the transmission node is normal, if the output of the clock signal is stopped due to the failure of the oscillation circuit 118 or the like, the output port Circuit 141
Cannot be updated, and depending on the timing of the failure, the output circuit remains on and the load circuit 106 remains on.
The actuator a may run away. But,
In the first slave station 103a shown in FIG. 8, the supply of the clock signal also stops to the D-type flip-flop 119, and the carrier of the communication data is not supplied to the second carrier off detection circuit 120. Is in the same state as in the case where the actuator has stopped, thereby determining that the fail-safe circuit 121 has failed, outputting a fail-safe signal, resetting the latch of the output port circuit 141, and stopping the actuator.

Other second slave stations 103b to 103n
Is also configured in the same manner as the first slave station 103a described above.

[0028]

However, in the above-mentioned conventional mobile multiplex communication apparatus 101, the second carrier off detection circuit 120 dedicated to fail-safe monitoring is provided.
To monitor the oscillation circuit 118 and the master station 102, and perform the output control of the wake-up signal and the low power consumption control by the first carrier detection circuit 117 dedicated to sleep control. Due to the configuration of the circuit under the condition, as a result of detecting the sleep of the master station 102 and stopping the communication, it cannot be determined whether the apparatus is in the sleep state or in the fail-safe state due to an abnormality.

For this reason, even if there is a load, such as lamp lighting, which is desired to be turned off at the time of fail-safe, if a sleep state occurs before fail-safe is detected, the load of lamp lighting, etc. is turned off. In addition to this, there is a problem that the operation cannot be changed between sleep and fail-safe.

In the first slave station 103a shown in FIG.
When the first carrier-off signal is replaced with the second carrier-off signal, when the second carrier-off detection circuit 120 detects carrier-off, the oscillation circuit 118 stops operating to stop generating a clock signal, and Since the operation of the flip-flop 119 is stopped, the master station 102
Even if the transmission restarts, the oscillation circuit 118 cannot be restarted.

That is, two contradictory functions of a clock signal stop monitoring function and a clock stop function are defined as 1
Since it is difficult to realize this with one carrier-off detection circuit, there has been a problem that two expensive carrier-off detection circuits must be provided in an LSI chip.

In the present invention, in consideration of the above situation, it is possible to clearly distinguish whether communication is stopped by one carrier-off detection circuit and the communication apparatus is in a sleep state or is in a fail-safe state due to occurrence of an abnormality. Separate the processing when the transmission node is abnormal or the oscillator circuit is abnormal and the processing when the master station is sleeping.Fail-safe even when entering the sleep state with the load such as lamp lighting on. It is an object of the present invention to provide a multiplex communication apparatus with a low power consumption function of a mobile body that can turn off and clear the load.

[0033]

In order to achieve the above object, the present invention provides a master station and a plurality of slave stations, which are slave stations, connected by a multiplex communication bus, and each child station is connected by the master station. While transmitting and receiving data by designating a station, when a master station is in a sleep state, each slave station detects this and shifts to a sleep state in a mobile multiplex communication device having a low power consumption function. The master station includes a sleep preparation command unit that generates a sleep preparation start command and transmits the sleep preparation start command to each slave station before the master station enters a sleep state. When a sleep preparation start command is output, the sleep preparation circuit detects the sleep preparation start command and generates a sleep preparation signal, and when the sleep preparation signal is not output from the sleep preparation circuit, the communication data from the master station is output. While selecting a received data obtained from the sleep preparation circuit to generate a carrier detection signal, and when a sleep preparation signal is output from the sleep preparation circuit, selecting a signal obtained by sampling the reception data and generating a carrier detection signal. A selector circuit for generating, a carrier off detection circuit for performing carrier off detection based on a carrier detection signal output from the selector circuit,
An oscillation circuit that controls generation of a clock signal based on the detection result of the carrier-off detection circuit to set the slave station in a low power consumption state, and a sleep preparation circuit based on a preset abnormality detection / sleep detection condition And a fail-safe circuit for judging the output of the carrier-off detection circuit and setting a preset portion on the slave station in a fail-safe state based on the judgment result.

[0034]

In the above configuration, when the sleep preparation start command is not output from the sleep preparation command section of the master station, the reception data obtained by taking in the communication data on the multiplex communication bus by each slave station is sampled. Carrier sense is performed based on the received signal, and when a sleep preparation start command is output from the master station, a sleep preparation end command is output from the master station to the sleep preparation start command from this time. Carrier sense is performed directly based on the carrier of the received data obtained by taking in the communication data, whereby one carrier-off detection circuit detects sleep and an abnormal state.

[0035]

DESCRIPTION OF THE PREFERRED EMBODIMENTS << Overall Apparatus >> FIG. 1 is a block diagram showing a first embodiment of a mobile multiplex communication apparatus according to the present invention.

The mobile multiplex communication apparatus 1 shown in FIG.
One master station 2 serving as a master station, first slave stations 3a to 3nth slave stations serving as slave stations, and a multiplex communication bus 4 for connecting these are provided. 3a to Nth
Data communication is performed with the slave station 3n to perform communication with the first slave station 3a to 3n.
The data of each of the input circuits 5a to 5n connected to the Nth slave station 3n is collected and supplied to the CPU 7,
The control data output from the CPU 7 is transmitted to the first slave station 3a.
To the load circuits 6a to 6n connected to the Nth slave station 3n
To supply. Then, after a series of communication processes is completed, the parent station 3a to the Nth station 3n output a wake-up signal indicating that the data from each of the input circuits 5a to 5n has changed, and the parent station 3a to the Nth station 3n output the parent station. After the station 2 outputs the sleep preparation start command, the station 2 enters the sleep state and the first slave station 3
a to the N-th slave station 3n enter the sleep state to save the power of the entire system.

The master station 2 is connected by a parallel bus 8 to a CPU 7 for controlling the operation of each part of the mobile unit, and is connected by a multiplex communication bus 4 to the first slave station 3a to the Nth slave station 3.
n, and selects any of the first to third slave stations 3a to 3n based on an instruction from the CPU 7 to collect data and supply control data. Based on an instruction from the CPU 7, After a sleep preparation start command is generated and transmitted to the first slave station 3a to the Nth slave station 3n, the apparatus enters a sleep state, and a sleep preparation end command is generated. After transmitting to the station 3n, the station exits from the sleep state and exits from the sleep state in response to a wake-up signal from the first to Nth slave stations 3a to 3n.

The first to Nth slave stations 3a to 3n include input circuits 5a to 5 constituted by switches such as door switches.
n, a door lock actuator, etc., and connected to the master station 2 via the multiplex communication bus 4 and communicates with the master station 2 via the multiplex communication bus 4. , Each of the input circuits 5a to 5n
Is transmitted to the master station 2, while the communication data output from the master station 2 is fetched and supplied to the load circuits 6a to 6n as control data. Also, a sleep preparation start command and a sleep preparation end command are received from the master station 2 to prepare for sleep. When the master station 2 enters the sleep state, the sleep state is detected and the sleep state is detected. The sleep state of the master station 2 is released by detecting a data change from the circuits 5a to 5n.

<< Detailed Description of First to Nth Substations 3a to 3n >> Next, the first substation 3a described above with reference to FIG.
Will be described.

The first slave station 3a shown in FIG.
, Sleep / fail safe unit 11 and receiving unit 12
, A transmission unit 13 and a wake-up unit 14, communicate with the master station 2 via the multiplex communication bus 4, and issue a sleep preparation end command from a point in time when a sleep preparation start command is output from the master station 2. Until is output, a sleep preparation state is set. In parallel with this operation, when the own station is designated as the transmitting station by the master station 2, the input data output from the corresponding input circuit 5a is taken in, and the input data is transmitted via the multiplex communication bus 4. The data is transmitted to the master station 2 and when the own station is designated as the receiving station, the communication data is taken in from the multiplex communication bus 4 and supplied to the load circuit 6a while latching the data. When the state does not change, the apparatus enters the sleep state under conditions according to the presence or absence of the sleep preparation signal. Also, the corresponding input circuit 5
When the input port data from a changes, a wake-up signal is generated and transmitted to the master station 2 via the multiplex communication bus 4 to release the sleep state of the master station 2. Further, when the clock signal of the own station is lost or the signal on the multiplex communication bus 4 becomes abnormal for some reason, this is detected, and the control data for the load circuit 6a is invalidated according to the presence or absence of the sleep preparation signal. Or update of control data is stopped to prevent erroneous control due to signal abnormality.

When the transmission data is output from the transmission section 13, the communication section 10 takes in the transmission data and sends it out to the multiplex communication bus 4. When the communication data is supplied via the multiplex communication bus 4, A multiplex communication bus I / F circuit 15 for receiving the data and generating reception data, and decoding the reception data output from the multiplex communication bus I / F circuit 15 to determine whether the received command is a command to the own station. If the command is a data reception command for the own station, a reception start command is generated to
If the received data is a data transmission command to the own station, a transmission start command is generated and supplied to the transmission unit 13, and a wakeup memory cancel signal is generated and supplied to the wakeup unit 14, Further, if the received data is a sleep preparation start command, a sleep preparation start signal is generated, and if the received data is a sleeve preparation end signal, a sleep preparation end signal is generated and supplied to the sleep / fail safe unit 11. And an instruction decoder circuit 16.

The sleep / fail safe unit 11 includes a sleep preparation circuit 17 for generating a sleep preparation signal from when the sleep preparation start signal is output from the communication unit 10 to when the sleep preparation end signal is output, and a clock signal. Every time is input, a D-type flip-flop 18 that samples received data output from the communication unit 10 and outputs this as an operation monitoring signal;
When the sleep preparation signal is not output from the
An operation monitoring signal output from the flip-flop 18 is fetched and output as a carrier detection signal. When the sleep preparation signal is output from the sleep preparation circuit 17, the reception data output from the communication unit 10 is output. A selector circuit 19 for taking in and outputting this as a carrier detection signal, a carrier detection signal outputted from this selector circuit 19 being taken in, and the carrier detection signal has not been changed for a preset fixed time. At this time, a carrier-off detection circuit 20 is provided that detects this and determines that the master station 2 is in the sleep state or determines that an abnormality has occurred in the transmission node or the like and generates a carrier-off signal.

Further, the sleep / fail safe section 11
Stops the generation of the clock signal when the carrier-off signal is output from the carrier-off detection circuit 20, and
An oscillation circuit 21 that stops the sampling operation of the flip-flop 18 and brings the entire first slave station 3a into a low power consumption state, and outputs a fail-safe signal when a carrier-off signal is output from the carrier-off detection circuit 20. An exclusive OR mode for generating a fail-safe signal when the carrier-off signal is output from the carrier-off detection circuit 20 in a state in which the sleep preparation signal is not output from the sleep preparation circuit 17 when the single mode is generated. And a fail-safe circuit 22 for selecting one of the single mode and the exclusive OR mode based on the setting contents.

The sleep / fail safe unit 11
It works as follows. That is, when the fail-safe circuit 22 is set to the single mode, the communication unit 1 does not output a sleep preparation start signal from the communication unit 10.
0, and the D-type flip-flop 18 is operated based on the clock signal obtained by the oscillation circuit 21 to sample the received data and generate a carrier detection signal. Check whether the detection signal has changed. If the carrier detection signal does not change for a certain period of time, the carrier off detection circuit 20 detects this signal, generates a carrier off signal, supplies the signal to the wake-up unit 14, and stops the operation of the oscillation circuit 21. First
The entire slave station 3 a is set to a low power consumption state, and a fail-safe signal is generated by the fail-safe circuit 22 and supplied to the receiving unit 12.

The sleep / fail safe unit 11
When the fail-safe circuit 22 is set to the single mode and the communication unit 10 outputs a sleep preparation start signal, the communication unit 10 outputs a sleep preparation end signal until the sleep preparation end signal is output. The received data output from the communication unit 10 is captured as a carrier detection signal, and it is checked whether the carrier detection signal has changed. When the carrier detection signal does not change for a certain period of time, the carrier off detection circuit 20 detects this signal, generates a carrier off signal and supplies it to the wake-up unit 14, and stops the operation of the oscillator circuit 21 to stop the first operation. The entire slave station 3 a is set to a low power consumption state, and a fail-safe signal is generated by the fail-safe circuit 22 and supplied to the receiving unit 12.

Further, when the fail-safe circuit 22 is set to the exclusive OR mode, the reception data output from the communication unit 10 is fetched until the sleep preparation start signal is output from the communication unit 10, and While the D-type flip-flop 18 is operated based on the clock signal obtained by the oscillation circuit 21 to sample the received data and generate a carrier detection signal, it is checked whether the carrier detection signal has changed. I do. When the carrier detection signal does not change for a certain period of time, it is detected by the carrier-off detection circuit 20 to generate a carrier-off signal, and the wake-up unit 14
And the operation of the oscillation circuit 21 is stopped to bring the entire first slave station 3a into a low power consumption state. Further, a fail-safe signal is generated by the fail-safe circuit 22 and supplied to the receiving unit 12.

Further, when the fail-safe circuit 22 is set to the exclusive OR mode and the communication unit 10 outputs a sleep preparation start signal, the communication unit 10 outputs a sleep preparation end signal. Until the received data is received from the communication unit 10 as a carrier detection signal, it is checked whether the carrier detection signal has changed. When the carrier detection signal does not change for a certain period of time, the carrier detection signal is detected by the carrier off detection circuit 20 to generate a carrier off signal, which is supplied to the wake-up unit 14,
The operation of the oscillation circuit 21 is stopped, and the entire first slave station 3a is set in the low power consumption state. In this case, no fail-safe signal is generated by the fail-safe circuit 22.

The receiving section 12 has a receiving circuit 23 for receiving the received data output from the communication section 10 when a reception start command is output from the communication section 10, and two modes of a single mode and an AND mode. When the single mode is set, the received data output from the receiving circuit 23 is fetched and latched, and the sleep / fail safe unit 1 is set.
When a fail-safe signal is output from 1, the latched data is reset to a fail-safe state,
When the logical product mode is set, the receiving circuit 23
An output port that fetches and latches the received data output from the device and, when the sleep / fail safe unit 11 outputs both the sleep preparation signal and the fail safe signal, resets the latched data to enter the fail safe state. And a circuit 24.

When the output port circuit 24 is set to the single mode, when the reception start command is output from the communication unit 10, the reception unit 12 receives the reception data output from the communication unit 10. And supplies the latched received data as control data to the corresponding load circuit 6a, and resets the latched received data when a fail-safe signal is output from the sleep / fail-safe unit 11, It is made fail-safe to prevent erroneous control due to a stop of the clock signal of its own station or an abnormality in the transmission node.

When the output port circuit 24 is set to the logical product mode, the receiving unit 12 receives the received data output from the communication unit 10 when a reception start command is output from the communication unit 10, and receives the received data. While latching
The latched reception data is supplied as control data to the corresponding load circuit 6a, and the sleep / fail safe unit 1
When the sleep / fail-safe unit 11 outputs a fail-safe signal while the sleep preparation signal is being output from 1, the latched received data is reset or made fail-safe so that the clock signal of the own station is output. This prevents erroneous control due to a stop or an error in the transmission node.

The transmission unit 13 receives an input port data output from the corresponding input circuit 5a and supplies the input port data to the wake-up unit 14;
When the transmission start command is output from the input port circuit 2
And a transmission circuit 26 for receiving the input port data output from the interface 5 and outputting the input port data to the multiplex communication bus I / F circuit 15 as transmission data.

The wake-up unit 14 is configured to transmit
3 to check whether the input port data output from the input port circuit 25 has changed, and when the input port data changes, a port state detection circuit 27 for generating a port change signal; When a wake-up memory cancel signal is output from the communication unit 10 when the port change signal output from the
A wake-up memory circuit for erasing the stored port change signal;
Output a port change signal from the
A wake-up circuit 29 that generates a wake-up signal when a carrier-off signal is output from the carrier-off detection circuit 20 of the fail-safe unit 11 is provided.

The first slave station 3a has been described above.
Other second child stations 3b to Nth child station 3n are also connected to the first child station 3a.
It is configured similarly to.

<< Operation of the Entire Apparatus >> Next, FIGS. 1 and 2
The operation of this embodiment will be described with reference to the block diagram shown in FIG.

First, the master station 2 under the control of the CPU 7 generates a data transmission command for the first slave station 3a and supplies it to the first slave station 3a via the multiplex communication bus 4.

As a result, the first slave station 3a detects that data transmission from itself has been designated, and
Input port data including the state of the input circuit 5 a to which the input terminal 5 is connected is collected to generate communication data, and this is transmitted to the master station 2 via the multiplex communication bus 4.

The master station 2 receives the communication data via the multiplex communication bus 4 to generate received data, and supplies the generated data to the CPU 7.

Next, the CPU 7 processes the received data to determine the state of the input circuit 5a to which the input port circuit 25 of the first slave station 3a is connected, and generates control data based on the determination result. When this is output, the master station 2 takes in the control data and
After generating a data reception command for the slave station to which the control data is to be output, for example, the second slave station 3b, and supplying this to the second slave station 3b via the multiplex communication bus 4, the control data Based on the communication data, the communication data is generated and supplied to the second slave station 3b via the multiplex communication bus 4.

Accordingly, the second slave station 3b detects that the own station has been designated as the communication data receiving station, takes in the communication data from the multiplex communication bus 4, generates reception data, and generates the reception data. At the same time as latching, it is supplied to the load circuit 6a to which the output port circuit 24 is connected to control this.

As described above, the master station 2 transmits the first slave station 3a to the Nth slave station to the first slave station 3a to the Nth slave station 3n through the multiplex communication bus 4 in the procedure shown in FIG. After receiving the input port data of the station 3n and supplying these input port data to the CPU 7 to generate control data, the control data is taken in and transmitted to the first slave station 3a to the Nth slave station 3n. Are sequentially repeated to control the entire system.

In this state, before the sleep preparation start command is output from the master station 2, in any one of the first slave station 3 a to the N-th slave station 3 n, the oscillation circuit 21 breaks down,
When the communication stoppage occurs, the first slave station 3a to the Nth slave station 3n
Each time, the communication data is sampled and carrier sensed based on the clock signal obtained by the oscillation circuit 21, so that this is detected by the sleep / failsafe unit 11 of the slave station, and the output port circuit 24 of the reception unit 12 is detected. Is cleared to perform a fail-safe operation, and the clock signal generation operation of the oscillation circuit 21 is prohibited unless the power is turned on again thereafter.

Further, a series of operations such as collection of each input port data and transmission of each output port data are completed, and
When a sleep condition such as no operation is required in the off state is satisfied, the master station 2 generates a sleep preparation start command based on an instruction from the CPU 7 and transmits the sleep preparation start command to the first slave station 3a to the Nth slave station 3n. After that, a sleep state (a state in which the prime mover is stopped) is entered to stop the communication operation.

Thus, the first slave station 3a to the Nth slave station 3n
Receives the sleep preparation start command via the multiplex communication bus 4 to generate a sleep preparation signal, and directly carries out carrier sense on received data obtained based on communication data supplied via the multiplex communication bus 4.

Then, when the master station 2 enters the sleep state,
The first slave station 3a to the N-th slave station 3n detect that the master station 2 is in the sleep state based on the state of the multiplex communication bus 4, and enter the sleep state, thereby reducing the power consumption of the entire system. To prevent the battery from draining.

At this time, a wake-up signal is output from the wake-up circuit 29 provided in any of the first slave station 3a to the N-th slave station 3n.
Recovers from the sleep state. When the wake-up signal is not output from the wake-up memory circuit 29 of the first slave station 3a to the N-th slave station 3n, the first
The slave stations 3a to 3n maintain the sleep state while directly performing carrier sense on the received data obtained based on the communication data. When the master station 2 resumes transmission, it detects this and oscillates. Restarts the oscillation operation.

<< Detailed Operation of Sleep / Fail Safe Unit 11 >> Next, the sleep detecting operation and the fail safe detecting operation of the sleep / fail safe unit 11 will be described in further detail.

<First Operation> In this case, the fail-safe circuits 22 of the first slave station 3a to the N-th slave station 3n are set to the single mode, and the output port circuit 24 is reset in the single mode by a fail-safe signal. In such a case, when the fail-safe circuit 22 outputs the fail-safe signal by the carrier-off signal,
Since the whole circuit goes into a sleep state to be in a low power consumption state and the output port circuit 24 is reset,
Although the low power consumption state and the abnormal state have the same condition, the circuit can be constituted by one carrier detection circuit 20.

<Second Operation> In addition, the fail-safe circuits 22 of the first to third slave stations 3a to 3n are set to the exclusive OR mode, the output port circuit 24 is set to the single mode, and reset by a fail-safe signal. If the setting is made so that the operation is performed until the sleep, the contents of the output port circuit 24 are retained when sleeping in a normal sleep procedure, and the output port circuit 24 is cleared when the carrier is turned off in an abnormal procedure. The fail-safe operation can be performed, whereby the low power consumption state and the abnormal state can be controlled separately.

<Third Operation> Further, the fail-safe circuit 22 of each of the first to third slave stations 3a to 3n is set to the exclusive OR mode, the output port circuit 24 is set to the logical product mode, and a fail-safe signal is output. If the setting is made to perform until the reset, the contents of the output port circuit 24 are cleared even when sleeping in the normal procedure, and the output port circuit 24 is cleared and failed at the moment of an abnormal state. Safe operation can be performed.

Then, in one multiplex communication apparatus 1, the second operation and the third operation are selectively used for each of the output port circuits 24 of the first slave station 3a to the Nth slave station 3n, so that each part can be optimized. Can be controlled.

For example, in the second operation, the output port circuit 24 having the function of holding the contents of the output port circuit 24 during sleep and having the function of clearing the contents of the output port circuit 24 only at the time of abnormality can be used. It is used to drive a load that is desired to be turned on even during sleep.

The third operation is the output port circuit 24 of a certain slave station due to a software bug in the master station 2 or the like.
Even if the sleep state is maintained in a normal procedure with the power on, the slave station is not in the fail-safe state, but the output port circuit 24 having the function of clearing can be used. It is used when driving a load such as a motor where fail-safe is important.

As described above, in this embodiment, the master station 2
When the sleep preparation start command is not output from the first slave station 3a to the Nth slave station 3n, the operation monitoring signal obtained by sampling the reception data obtained by capturing the communication data on the multiplex communication bus 4 by the first slave station 3a to the Nth slave station 3n is output. When the sleep preparation start command is output from the master station 2 and the sleep preparation end command is output from the master station 2 from this time, the multiplex communication bus 4 is used.
Since the carrier sense is performed directly based on the carrier of the received data obtained by capturing the above communication data, the following effects can be obtained.

First, the stop monitoring of the oscillation circuit 21 and the stop and restart of the clock signal are performed by one carrier detection circuit 20, whereby the low power consumption state can be controlled and the output of the lamp lighting and the like can be controlled. The load can be controlled so as to be turned off in a fail-safe state while the device is in the on-state, and to be cleared in the sleep state.

Further, it is possible to clearly determine whether the communication is stopped due to the sleep state or the communication is stopped due to the detection of an abnormality, whereby different operations can be performed between the sleep mode and the fail-safe mode.

Further, in the conventional multiplex communication device, once,
Even in the fail-safe slave station, fail-safe may be canceled depending on the content of the abnormal state.
In this embodiment, once the fail safe state is established,
Until the power is turned on again, the fail safe can be prevented from being released.

FIG. 4 is a block diagram showing an example of the first slave station used in the second embodiment of the mobile multiplex communication apparatus according to the present invention.

The difference between the first slave station 3ab shown in this figure and the slave station shown in FIG. 2 is that, when a carrier-off signal is output from the carrier-off detection circuit 20, the oscillation circuit 21 for stopping oscillation is replaced with an oscillation circuit 21. In the state where the sleep preparation signal is being output from the sleep preparation circuit 17, when the carrier off signal is output from the carrier off detection circuit 20, an oscillation circuit 35 for stopping the oscillation is provided. In addition, the oscillation circuit 35 does not stop the oscillation, and when the abnormal state is released, the oscillation circuit 35 returns from the fail-safe state.

With this configuration, the oscillation circuit 35 maintains the oscillating state even if the fail-safe state is once entered due to some abnormality, so that when the abnormal state is released, the first slave station 3ab fails. It is possible to return from the safe state.

FIG. 5 is a block diagram showing an example of a first slave station used in the third embodiment of the mobile multiplex communication apparatus according to the present invention.

The difference between the first slave station 3ac shown in this figure and the slave station shown in FIG. 2 is that when the sleep preparation signal is not output from the sleep preparation circuit 17, the operation monitoring output from the D-type flip-flop 18 is performed. When a sleep preparation signal is output from the sleep preparation circuit 17, the signal is output as a carrier detection signal.
Instead of the selector circuit 19 which takes in the received data output from the communication unit 10 and outputs it as a carrier detection signal, when the sleep preparation signal is output from the sleep preparation circuit 17 or when the fail safe signal is output from the fail safe circuit 22 When it is output, it takes in the received data output from the communication unit 10 and outputs it as a carrier detection signal. When neither the sleep preparation signal nor the fail-safe signal is output, A selector circuit 36 for taking in the operation monitoring signal output from the amplifier 18 and outputting it as a carrier detection signal is provided.
1 is stopped to further reduce the power consumption.

With this configuration, the oscillation circuit 21 maintains the oscillating state even if the fail-safe state is once entered due to some abnormality, so that when the abnormal state is released, the first slave station 3ac fails. It is possible to return from the safe state, and at the time of fail-safe, the operation of the oscillation circuit 21 is stopped to further reduce power consumption.

Also, in the above-described embodiment, the first through
In the third embodiment, the oscillation circuits 21 and 35 are operated to cause the D-type flip-flop 18 to perform a sampling operation to generate an operation monitoring signal from received data. Oscillation circuit 2
This signal may be supplied to the selector circuits 19 and 36 as long as the signal does not change when the clock signal from 1 disappears.

That is, even if the data received from the communication unit 10 has passed through a sequential circuit or the like operated by a clock signal even once, for example, the instruction decoder circuit 16 of the communication unit 10
May be used in place of the operation monitoring signal.

[0085]

As described above, according to the present invention, 1
The two carrier-off detection circuits can clearly distinguish whether communication is stopped and the device is in a sleep state or an error occurs and the device is in a fail-safe state. Even if the process enters the sleep state while the load such as lamp lighting is on, the process is separated from the master station's sleep process.
When fail safe occurs, the load can be turned off and cleared.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a first embodiment of a multiplex communication apparatus for a mobile body according to the present invention.

FIG. 2 is a block diagram showing a detailed circuit configuration example of a first slave station shown in FIG.

FIG. 3 is a timing chart showing a communication timing example of the multiplex communication apparatus shown in FIG.

FIG. 4 is a block diagram showing an example of a first slave station used in a second embodiment of the mobile multiplex communication apparatus according to the present invention.

FIG. 5 is a block diagram showing an example of a first slave station used in a third embodiment of the mobile multiplex communication apparatus according to the present invention.

FIG. 6 is a block diagram showing an example of a conventionally known mobile multiplex communication device.

FIG. 7 is a timing chart showing an example of communication timing of the multiplex communication apparatus shown in FIG.

FIG. 8 is a block diagram illustrating a detailed circuit configuration example of a first slave station illustrated in FIG. 6;

9 is a circuit diagram showing a detailed configuration example of a second carrier off detection circuit shown in FIG.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Multiplexing apparatus for mobile objects 2 Master station 3a-3n 1st station-Nth station 4 Multiplexing communication bus 5a-5n Input circuit 6a-6n Load circuit 7 CPU 10 Communication section 11 Sleep / fail safe section 12 Receiving section Reference Signs List 13 transmission unit 14 wake-up unit 17 sleep preparation circuit 18 D-type flip-flop 19 selector circuit 20 carrier off detection circuit 21 oscillation circuit 22 fail-safe circuit 23 reception circuit 24 output port circuit

Continuation of the front page (58) Field surveyed (Int.Cl. ⁶ , DB name) H04L 12/40 H04L 29/00

Claims (3)

(57) [Claims] A master station serving as a master station and a plurality of slave stations serving as slave stations are connected by a multiplex communication bus, and the master station designates each slave station to transmit and receive data, while the master station sleeps. In the mobile multiplex communication device having a low power consumption function in which each slave station detects this and shifts to a sleep state when the master station is in the state, the master station is set to a state before the master station enters the sleep state. A sleep preparation command unit that generates a sleep preparation start command and transmits the sleep preparation start command to each slave station. Each slave station detects a sleep preparation start command from the master station and outputs a sleep preparation start command. A sleep preparation circuit for generating a preparation signal; and when the sleep preparation signal is not output from the sleep preparation circuit, selecting a reception data obtained based on communication data from the master station for carrier detection. While a signal is generated, when a sleep preparation signal is being output from the sleep preparation circuit, a selector circuit for selecting a signal obtained by sampling the received data and generating a carrier detection signal is output from the selector circuit. A carrier-off detection circuit that performs carrier-off detection based on a carrier detection signal; an oscillation circuit that controls generation of a clock signal based on a detection result of the carrier-off detection circuit to set the slave station in a low power consumption state; The output of the sleep preparation circuit and the output of the carrier-off detection circuit are determined on the basis of a preset abnormality detection / sleep detection condition, and based on the determination result, a part preset on the slave station side is failed. A multiplex communication apparatus for a mobile object, comprising: a fail-safe circuit for setting a safe state. 2. The oscillation circuit stops oscillation when a carrier-off signal is output from the carrier-off detection circuit while a sleep-preparation signal is being output from the sleep-preparation circuit. The multiplex communication device for a mobile object according to claim 1. 3. The selector circuit, when a sleep preparation signal is output from the sleep preparation circuit, or when a fail-safe signal is output from the fail-safe circuit, fetches the received data and carries the received data. The signal is output as a detection signal, and when both the sleep preparation signal and the fail-safe signal are not output, a signal obtained by sampling the received data is captured and output as a carrier detection signal. The multiplex communication device for a mobile object according to claim 1.