JP2941415B2 - Television signal processor - Google Patents

Description

Description: BACKGROUND OF THE INVENTION The present invention relates to a television signal processing apparatus, and more particularly to a high-definition television signal such as a MUSE system and a current standard television signal such as an NTSC system. EDTV receiving both
The present invention relates to a television signal processing device that converts a signal into a double-speed television signal of an (Enhanced Definition Television) system and displays the signal on a display.

[Conventional technology]

In recent years, various high-definition television systems have been proposed in response to the demand for higher image quality in television.
An E (Multiple Sup-Nyquist Sampling Encoding) method has been proposed.

MUSE method, NHK Technical Research Journal 1987 Volume 39
As described in Vol. 2, No. 172, No. 172, p18 to p53, in order to improve the point that the bandwidth of the signal is greatly increased with the improvement of the image quality, a field frequency of 60 Hz and a frame frequency of 30 Hz similar to the NTSC system are used. Adopts the interlace method.
However, since the number of scanning lines has been increased from the current NTSC format of 525 lines to 1125 lines, and the screen aspect ratio has been increased to 16: 9, the bandwidth is still excessively large.

That is, the moving part and the still part in the screen are divided and subjected to different band compression processing and transmitted.

Since the moving part in the screen does not need to be visually finer than the stationary part, intra-field offset subsampling is performed to band-compress the moving part in the field.

The above-mentioned offset subsampling in the field is
Only the moving part in the field is thinned out every other pixel on the scanning line (line), and the pixels on the line are shifted (offset) by one pixel interval between the lines.

In the still part, although the arrangement of pixels in the transmission screen is the same as that of the above-mentioned moving image, each pixel is generated by combining the pixels in two fields from the reproduction side (receiver) in order to increase the definition. , A plurality of pieces of pixel information included in each pixel are separated to increase the pixel density.

Such pixel synthesizing techniques include line offset sub-sampling (Line Offset Subsampling) for thinning out every other pixel in a line of an original image, and shifting the sampling position of the line offset sub-sampling by one pixel for each frame. Field Offset Subsampling, frequency offset for rearranging the field offset subsampled pixel array, and frame offset subsampling (Frame Offset Subsampling) for thinning out and allocating between frames.
sampling).

In addition, a mixing technique for mixing both parts is used at the boundary between the moving part and the stationary part.

In this way, on the transmitting side, the stationary part is 24 MHz,
In the moving part, the bandwidth was reduced from 16MHz to 8MHz and transmitted.

In the decoder for demodulating the MUSE transmission signal, it is necessary to separately process the signal of the stationary part and the signal of the moving part, and further, a motion detection circuit for distinguishing between the stationary part and the moving part and a signal for mixing the two parts. Since a mixing circuit, a frequency conversion circuit, and the like are required, the circuit scale is enormous and the price is high as compared with the conventional NTSC system receiver.

For this reason, "Kasezawa et al." EDTV compatible MUSE / NTSC converter "Technical Report of the Institute of Television Engineers of Japan, VOL.14, NO.8pp13-18
(1990) ”, consider receiving MUSE signals and reproducing them on both NTSC television receivers and ED (Enhanced Definition) receivers that have been improved to double-speed scanning. Have been.

FIG. 2 is a block diagram showing an example of an internal configuration of a converter for converting a MUSSE signal into the ED signal and the NTSC signal.

The MUSE baseband signal is applied to input terminal 201 and ALC
After being amplified by the amplifier 202, the signal is converted into a digital signal by the A / D converter 203.

The above digital signal is ALC (Automatic Level Controller)
l) It is fed back to the ALC amplifier 202 via a circuit to control its gain.

The next de-emphasis circuit 205 performs processing for returning the emphasis processing applied to the MUSE signal.

The output of the de-emphasis circuit 205 is coupled to a two-dimensional LPF (two-dimensional low-pass filter) 207, and the pixels of the moving part in the field decimated on the transmission side are restored and inserted from the surrounding pixels. Perform processing. This processing is called moving image processing, field interpolation processing, or two-dimensional filter processing.

The output of the two-dimensional LPF is bisected and one is coupled directly to the aliasing removal circuit 208 and the other is coupled via a one-frame delay 206.

The aliasing removal circuit 208 performs a motion detection operation of comparing a signal directly input from the two-dimensional LPF 207 and an output of the one-frame delay 206 to detect a difference between two intra-frame images. The average value signal of the current frame and the previous frame (one frame delay signal) are mixed and output to the stationary portion.

By this processing, the aliasing noise at the stationary portion generated by the frame offset subsampling processing is removed.

In the next vertical LPF209, 1125 scanning lines of the MUSE signal are
The processing of converting into 525 scanning lines of TV is performed.

The next speed converter 211 writes an input signal with a write clock synchronized with the MUSE signal and reads and outputs a signal with a read clock corresponding to the EDTV synchronization signal. Note that the contour emphasis unit 210 performs a process of emphasizing the edge portion of the luminance signal, and is inserted as necessary.

The digital EDTV signal output from the speed converter 211 is D
The signal is converted into an analog signal by the
Output from 219.

Further, the EDTV signal is read out by the speed conversion units 212 to 214 at a reading frequency of 1/2 of the speed conversion unit 211, and
The signal is converted into a baseband signal of the NTSC system via the conversion unit 216.

[Problems to be solved by the invention]

Although the above conventional EDTV-compatible MUSE / NTSC converter can convert MUSE signals to EDTV signals and NTSC signals,
NTSC signal could not be received.

Therefore, in order to receive both the MUSE signal and the NTSC signal, as shown in FIG. 3, the EDTV-compatible MUSE / NTSC converter (down converter 2) shown in FIG.
30), it is necessary to combine a conventional NTSC / EDTV converter (ED processor 240) and switch the respective outputs by the switching circuit 243 to output to the terminal 232, which causes a problem that the signal processing circuit becomes large-scale.

In particular, the large-capacity frame memories provided in each of the two converters have been the main cause of increasing the size of the signal processing circuit.

In the conventional MUSE / NTSC converter for EDTV, although the aliasing noise is removed by the aliasing removal circuit, there is a component that cannot be eliminated, thereby causing a `` flickering '' in the static portion of the EDTV output image. There is also a problem that the remaining image quality is incomplete.

SUMMARY OF THE INVENTION An object of the present invention is to basically review and reconstruct a system in which the conventional EDTV-compatible MUSE / NTSC converter and NTSC / EDTV converter are combined to eliminate the above-mentioned problems.

In other words, high-definition television signals like MUSE and NT
It receives both standard television signals, such as SC,
It can output each video signal of SE, EDTV and NTSC, and at the same time reduce the number of conventional frame memories, further omitting other circuits at the same time, greatly simplifying the circuit configuration, It is an object of the present invention to provide a television signal processing apparatus which has high image quality, has high versatility, and is economical, which eliminates aliasing noise completely and has no "flicker" on the screen.

It is still another object of the present invention to provide a television signal processing apparatus capable of outputting an image on the EDTV display at a MUSE image aspect ratio of 16: 9 or a standard aspect ratio of 4: 3.

[Means for solving the problem]

A down-converter is provided for converting a high-definition television signal into a double-speed television (ED) video signal and a standard television video signal by performing in-field processing of a received signal, and outputting the down-converter standard television signal. One of the video signal of the standard system and the input video signal of the standard television system is selected by the first input selection means, and the ED processor performs a motion adaptation process using a frame correlation to convert the video signal into a video signal of the ED system. The output of the ED processor and the output of the ED video signal of the down converter are mixed according to the motion of the image signal.

Each output of the down converter is digitized, the video signal of the standard television system is converted into a digital signal by a preprocessor, and the output of the mixing means is converted into an analog signal by a postprocessor.

Further, both the standard television system output signal of the down converter and the standard television system video signal are converted to analog and input to the first input selection means.

In addition, the ED video signal of the down converter and the output of the ED processor are digitized and input to the mixing means.

Further, the first input selection means or the preprocessor is provided by receiving a video signal of a standard television system and a broadcast of a standard television system obtained by receiving a satellite broadcast by the second input selection unit. One of the video signals of the standard television system is selected and input.

Further, one of the video signal obtained by receiving the satellite broadcast and the video signal obtained by receiving the broadcast of the standard television system is selected by the third input selection means, and the contents of the two video signals are selected by the pointer. Then, the high-definition television is supplied to the down converter, and the standard television signal is supplied to the first input selection means.

Further, in the down converter, the input signal of the high-definition television system is subjected to a field interpolation process to convert the input signal into a video signal that matches the center of gravity of the scanning line of the ED system. The data is converted into the number of scanning lines and the scanning speed of the ED system, and further converted by the first speed conversion means into the number of scanning lines and the scanning speed of the standard television system.

Further, the output of the first speed conversion means and a signal obtained by delaying the output by one field are weighted and averaged and supplied to the second speed conversion means.

Further, the video signal of the standard television system obtained by the above processing is converted into a composite video signal and a luminance / color difference separation signal by a video encoder and output.

Further, each of the selection means is controlled based on a high-quality digital signal discrimination signal output from the down converter and tuning information of a tuner.

Further, the selection means and the mixing means are controlled by a high-definition television discrimination signal output from the downconverter, tuning information of a tuner, and a motion detection signal of the high-definition television output by the ED processor. To

[Action]

Satellite broadcasting is based on a video signal of a high-definition television system (for example, the MUSE system) and a standard television system (for example, NT).
Both of the video signals based on the SC method are switched according to the time zone and transmitted.

Only the high-definition television video signal of the above two video signals is input to the down converter, and this is converted into a double-speed scanning ED video signal and a standard television video signal. Output at the same time.

The first input selection means selects one of a standard television system video signal output from the down converter and a standard television system video signal separately input from a tuner or the like.

When a high-definition television system image signal is input to the down converter, the first input selection means selects a standard television system video signal output from the down converter and inputs the video signal to the ED processor. I do.

The ED processor uses a clock signal reproduced from a synchronization signal or a scanning line of the standard television system and a scanning line of the ED system, and performs frame interpolation and inter-field interpolation for a still image portion of the input signal. That is, processing such as motion-adaptive Y / C separation and scanning line interpolation is performed, and a signal is output in which the vertical resolution is increased by suppressing the noise component and the aliasing component due to frame offset subsampling.

Output as a double-speed television (ED) signal that has been subjected to motion adaptive processing.

As a result, the processing such as the motion adaptive Y / C separation and the scanning line interpolation, which were conventionally performed by the down converter, is performed by the ED.
This is performed using the conventional functions of the processor.

The first mixing means includes an ED of the down converter.
Two signals are input: a system video signal output and an output signal of the ED processor.

The first mixing means is used for the stationary part of the image.
An output signal of the ED processor is output, an output signal of the ED processor is output for a moving part of the image, and a mixing process of the boundary between the stationary part and the moving part is performed.

When the first input selection means selects a video signal of a standard television system which is separately input from the tuner or the like, the ED processor converts the video signal into a video signal of the ED system.

〔Example〕

FIG. 1 is a block diagram illustrating the configuration of a television signal receiving and processing device according to the present invention.

The device of the present invention shown in FIG. 1 can obtain the following three features as compared with the conventional device shown in FIGS. 2 and 3.

(1) The down converter 102 of the present invention is a down converter of FIG. 3, that is, one frame delay in the configuration of FIG.
206 and the aliasing removal circuit 208 are not included.

(2) In the present invention, one of the output of the down converter 102 and the NTSC input is selected by the switching circuit 106 and the ED processor 107 is selected.
And the down converter 102
And the output of the ED processor 107 are mixed by a mixing circuit 108.

(3) With the configuration of the above (2), it is possible to completely remove the aliasing component which cannot be removed by the conventional device shown in FIG.

It should be noted that the ED processor 107 of the present invention corresponds to the ED processor 107 of FIG.
It has almost the same circuit configuration as the D processor.

Hereinafter, the features of the present invention will be sequentially described in detail with reference to FIGS.

FIG. 4 is a block diagram for explaining FIG. 1 in more detail.

In FIG. 4, the MUSE signal applied to the input terminal 101 is converted by the down converter 102 into (1) 1125 scanning lines,
30Hz frame frequency, digitized interlaced scanning
A MUSE video signal (hereinafter abbreviated as 1125/30 signal); (2) a digitized ED video signal (hereinafter abbreviated as 525/60 signal) of 525 scanning lines, a frame frequency of 60 Hz, and non-interlaced scanning; 3) It is converted into three types of signals: 525 scanning lines, a frame frequency of 30 Hz, and a digitized NTSC video signal of interlaced scanning (hereinafter abbreviated as 525/30 signal).

The 525/60 signal and the 525/30 signal are converted into a luminance signal Y and color difference signals (RY) and (BY), respectively, as shown in the figure, and output.

The down converter 102 outputs 1125/30 signals.
Output from 103, output 525/30 signal to selection circuit 106, 52
The 5/60 signal is output to mixing circuit 108.

On the other hand, the NTSC signal input from the input terminal 104 is the component C
m, and digitized color difference signal components (RY) and (BY), which are converted into 525/30 signals, and the next selection circuit 10
Output to 6.

The selection circuit 106 outputs 52 from the down converter 102.
One of the 5/30 signal and the 525/30 signal output by the pre-proset 105 is selected and output.

The ED processor 107 then performs frame sum filter processing, field interpolation processing, average interpolation processing, motion detection, double speed processing, etc., as described with reference to FIGS.
Outputs 60 signals.

The next mixing circuit mixes the 525/60 signal of the EDTV processor and the 525/60 signal of the down converter 102 according to the motion detection signal.

The post processor 109 converts the output of the mixing circuit 108 into an analog signal and outputs the result.

Further, when the display is an RGB signal input type, the post processor 109 also performs necessary color difference signal conversion.

In FIG. 4, since the MUSE signal input to the input terminal 101 is transmitted by pre-emphasized FM modulation, the digital conversion is performed by the A / D converter 301 and the de-emphasis circuit 302 performs de-emphasis processing. .

The next two-dimensional LPF 303 performs a field interpolation process on the output of the de-emphasis circuit 302, converts the output into a 1125/30 signal, outputs the signal to the terminal 103, and simultaneously transmits the signal to the vertical LPF 304.

The signal at the output terminal 103 is subjected to time-base expansion and line-sequential decoding of the color-difference signal.
By performing GB matrix processing, a signal for a television display of the MUSE system can be obtained.

In the field interpolation processing performed by the two-dimensional LPF, aliasing noise cannot be completely removed, so that “flicker” remains in the still part of the MUSE playback image.

FIG. 5 is a diagram for explaining the distribution of the aliasing noise.

In FIG. 5, the two-dimensional LPF is the horizontal frequency μ (horizontal axis)
Is limited to about 16 MHz or less. However, since the time frequency (vertical axis, field repetition frequency) λ is not limited, the aliasing components shown in a, b, c, and d in FIG.
For this reason, "flicker" appears on the screen.

The vertical LPF 304 shown in FIG.
The corresponding luminance and color difference signals are converted. That is, 1125
The position of the scanning line center of gravity of the / 30 signal is converted into a scanning line number of 1125/2 and a frame frequency of 60 Hz.

The aspect ratio of the display can be changed by the vertical LPF 304. If the pass band characteristic of the vertical LPF 304 is as shown in FIG. 6A, an image having an aspect ratio of 16: 9 can be displayed on a display having an aspect ratio of 4: 3 shown in FIG. 7A (WIDE mode). ). In addition, in the case of FIG. 6B, an image obtained by cutting off the left end, the right end, or both ends of the image having the aspect ratio of 16: 9 can be displayed on the display having the aspect ratio of 4: 3 shown in FIG. 7B ( ZOOM mode).

The speed conversion circuit 305 converts the output of the vertical LPF 304 into a luminance and color difference signal of a 525/60 signal, that is, an ED signal, and outputs it to the speed conversion circuit 306 and the delay adjustment circuit 307.

The speed conversion circuit 306 reduces the number of scanning lines of the 502/60 signal by half.
525/30 luminance and color difference signals, ie NTSC
The signals are converted to signals and output to the selection circuits 312 to 314.

The delay adjustment circuit 307 adjusts the input timing of the ED signal to the mixing circuit 108.

On the other hand, the NTSC signal input to the input terminal 104 is demodulated into color difference signals (RY) and (BY) by the color difference processing circuit 308 and is digitally converted by the A / D converters 310 and 311.

Similarly, the A / D converter 309 converts the luminance signal Y into a digital signal.

The next selection circuits 312 to 314 output the 525/30 signal output from the speed conversion circuit 306 and the 525/30 signal output from the A / D converters 309 to 311.
The signal is switched and output to the motion adaptation circuit 315.

FIG. 8 is a diagram showing an example of the internal configuration of the motion adaptation circuit 315, and FIGS. 9 and 10 are explanatory diagrams of the operation thereof.

When the selection circuit 106 in FIG. 4 selects the b side, a composite signal Cm of the NTSC system is input to the terminal 701 of the motion adaptation circuit 315.

In FIG. 8, the motion amount of the image between frames is detected by subtracting the Cm signal input from the input terminal 701 from the signal delayed by one frame by the frame memory 704 by the subtraction 724. Next, the motion amount is horizontally band-limited by the horizontal LPF 725 and input to the MAX circuit 727.

On the other hand, the color difference signals input from the input terminals 702 and 703 are time-division multiplexed by the multiplexer 713, delayed by one frame by the frame memory 714, and added by the adder 716.
Is input to the frame memory 715.

In the frame memory 715, the color difference signal delayed by one frame by the frame memory 714 is further delayed by one frame, and the output signal of the multiplexer 713 is subtracted by the subtractor 726 to obtain the motion amount of the color difference signal between two frames.

The MAX circuit 727 detects the maximum value of the above-mentioned amount of movement and the amount of movement output by the horizontal LPF 725.

The motion detection circuit 728 expands the amount of motion output from the MAX circuit 727 in the horizontal and vertical directions, performs a three-dimensional motion detection process to obtain a motion detection signal by multiplying by an attenuating coefficient in the time axis direction, and performs mixing. Output to the circuits 708, 712, 719 and the output terminal 731.

Next, an inter-frame processing and an inter-field processing of a luminance signal and a color difference signal related to the enhancement of image quality will be described.

The video signal applied to the input terminal 701 is an NTSC composite type signal including both a luminance signal and a color difference signal. Since the phase of the color difference signal component among them is inverted every line and every frame, only the luminance signal is output by canceling the color difference signal by the adder 705 or the still image portion of the image. .

Similarly, for a moving image portion of an image, the adder 707 cancels the color difference signal and outputs only the luminance signal.

The mixing circuit 708 mixes the respective luminance signal outputs of the adders 705 and 707 according to the motion detection signal output by the motion detection circuit 728, and outputs a luminance signal that has been subjected to motion adaptation processing. This makes it possible to obtain a luminance signal of a stationary portion of an image in which cross-color interference has been suppressed.

On the other hand, since the color signal is subjected to color demodulation processing,
The luminance signal components contained therein are line by line,
The phase is inverted every frame. For this reason, the adder 716 cancels the luminance signal for each frame and outputs only the color difference signal component with respect to the still portion of the image.

Since the adder 718 adds the color difference signal output from the multiplexer 713 and the color difference signal delayed by one line by the line memory 717, the luminance signal component is canceled for the moving part of the image and only the color difference signal component is added. Is output.

The mixing circuit 719 mixes the output color difference signals of the adders 716 and 718 according to the motion detection signal output by the motion detection circuit 728, and outputs a color difference signal that has been subjected to motion adaptation processing.

This makes it possible to obtain a color difference signal in which dot disturbance is suppressed during reproduction of a still image.

The luminance signal output from the mixing circuit 708 is delayed by one line by the line memory 710 and output from the output terminal 729 as an actual scanning line signal of the luminance signal.

A mixing circuit 712 mixes a signal obtained by averaging the input and output signals of the line memory 710 by an adder 711 and a signal obtained by delaying the input signal by one field by a field memory 709.

In the still part of the image, a signal delayed by one field from the input video signal is used as an interpolation scanning line signal. However, if a signal delayed by one field is used as an interpolated scanning line signal in a moving part of an image, image quality deterioration such as a double image occurs.
The output signal of the field memory 709 (field interpolation signal) and the output signal of the adder 711 (average interpolation signal) are mixed according to the motion detection signal output from the motion detection circuit 728 at
The output terminal 730 outputs a luminance interpolation scanning line signal.

The luminance signals output from the output terminals 729 and 730 as described above are input to the double-speed processing circuit 316 in FIG. 4 and are converted into 525/60 luminance signals.

The color difference signal output from the mixing circuit 719 is delayed by one line by the line memory 720 and demultiplexed by the demultiplexer 722.
And input to the adder 721.

The signals output from the demultiplexer 722 to the terminals 732 and 734 are (RY) and (BY) actual scanning line color difference signals, respectively.

The adder 721 adds and averages the color difference signal output from the mixing circuit 719 and the color difference signal output from the line memory 720 and transmits the result to the demultiplexer 723. The demultiplexer 723 supplies the interpolation scanning line signal (RY) to terminals 733 and 735. , (BY), etc. are output.

The actual scanning line signal and the interpolation scanning line signal of the above color difference are the same as the case of the luminance signal, and the double speed processing circuits 317 and 3 in FIG.
At 18, it is converted to a 525/60 color difference signal.

The video signal converted to the 525/60 signal is input to the post processor 109 via the mixing circuit 108.

Since the degree of discrimination with respect to the color difference of the human eye is relatively low, in FIG. 8, the scanning line interpolation of the color difference signal is all average interpolation regardless of the still / moving portion of the image, and the color difference signal output by the adder 721 is interpolated. The scanning line was used. However, if a field interpolation process using a field memory is performed to generate an interpolated scanning line signal similarly to the luminance signal, the vertical resolution of the color difference signal can be further improved.

As described above, the motion adaptation circuit shown in FIG. 8 converts an NTSC (standard television) signal into a high-quality luminance signal and color difference signal by frame sum processing, and creates an interpolated scanning line signal by field delay processing. And convert it to an ED signal without interlace interference.

Therefore, the circuit of FIG. 8 has the same configuration as a conventional motion adaptation circuit for converting an NTSC (standard television) signal into an ED signal.

However, the present invention has found that the motion adaptive circuit of FIG. 8 has the functions of the frame memory 206 in the conventional down-converter shown in FIG. The conventional configuration as shown in the figure is reconfigured as shown in FIG. 1 to eliminate the frame memory 206 and the aliasing removal circuit 208 in the down converter, thereby improving the efficiency of the circuit configuration.

Next, when the selection circuit 106 in FIG. 4 selects the terminal a side, that is, when the MUSE (high definition television) signal 525 /
The case where 30 conversion signals are selected will be described.

In FIG. 4, a motion adaptive processing circuit 315 separates a luminance signal and a color difference signal in the same manner as when the NTSC (standard television) signal is selected.

FIG. 9 shows frequency band characteristics obtained by the frame sum processing performed by the frame memory 704, the adder 705, the frame memory 714, and the adder 716 in FIG. α indicates a pass band, and β indicates a non-pass band.

9 and FIG. 4, it can be seen that the aliasing components a to d shown in FIG. 4 are removed because they fall within the non-passband β of FIG. That is, the two-dimensional LPF3 in FIG.
03 The aliasing component in the still part of the MUSE image included in the output is removed.

The actual scanning line signal and the interpolation scanning line signal of the luminance and color difference signals of 525/30 output from the motion adaptive circuit 315 are output from the double speed circuit 31.
The signal is converted into a 525/60 signal by 6 to 318 and used as a still partial signal of the ED image.

Next, in the mixing circuits 319 to 321 in FIG. 4, the 525/60 moving image signal output from the delay adjustment circuit 307 and the 525/60
The still image signal is mixed according to the motion of the image, and the D / A converter 322 is used.
Is converted into an analog signal by.

FIG. 10 is a diagram for explaining the 525 / 60ED conversion processing of the mixing circuits 319 to 321.

FIG. 10 (a) shows the processing of the stationary portion, in which the aliasing component is removed from the frame sum to remove the actual scanning line signal (a + a '),
(C + c '), (e + e'), etc., and similarly, the aliasing component is removed from the frame sum, and the interpolation scanning line signal (b +
b ′), (d + d ′), etc.

Since the frame sum is calculated, the noise component of the reproduced image is 3d
b, and the vertical resolution at the time of receiving the still image signal is not deteriorated.

In the moving part of the image, 1125/30 is performed by in-field signal processing according to the encoding method specified in the MUSE system.
The signal is directly converted to a 525/60 ED signal as shown in FIG. 10 (b).

The 525/60 signals are converted into analog signals by the D / A converters 322 to 324 in FIG.
It is converted to G and B signals.

As described above, it is possible to eliminate the vertical resolution difference between the still part and the moving part of the 525/60 reproduced image of the MUSE (high-definition television) of the present invention, and completely suppress the aliasing component in the still part. So you can
A high-definition reproduced image can be obtained without "flickering".

In addition, NTSC (standard television) signals can be converted to 525/60 to obtain high-definition reproduced images.

In the above embodiment of the present invention, the MUSE signal is used as the high-definition television signal, and the NTS signal is used as the standard television signal. The present invention can be applied to a television system, and a similar effect can be obtained.

The television signal receiving and processing apparatus according to the present invention receives a high-definition television signal output from, for example, a broadcast satellite (BS) tuner, or receives a terrestrial broadcast tuner standard television signal (eg, NTSC). Method) or connect a VTR to record.

The device according to the invention can be used to connect these input signals
Various configurations as shown in the following FIGS. 11 to 33 can be adopted depending on the method of generating the VTR signal.

In addition, since the input / output signals are often analog signals, different characteristics can be obtained depending on where the digital signals are converted.

FIG. 11 shows an example of a configuration for connecting the BS tuner and the NTSC tuner to the device of the present invention.

In FIG. 11, a BS (broadcast satellite) receiving antenna 1001 is shown.
(High Definition Television) signal received by BS
The signal is demodulated by the tuner 1002 and input to the down converter 102 and the selection circuit 1005. In addition, since the video signal of the NTSC system may be actually transmitted as a BS broadcast,
In this case, the BS tuner 1002 outputs an NTSC signal.

On the other hand, an NTSC (standard television) signal received by the antenna 1003 is demodulated by the VHS / UHF tuner 1004 and input to the selection circuit 1005.

The selection circuit 1005 is the NTSC output of the above-mentioned BS tuner or VHS
・ Select NTSC output of UHF tuner 1004.

The MUSE signal is converted by the down converter 102 into the same 525/30 and 525/60 signals as in FIG.

The selection circuit 106 is connected to the side a when the BS tuner is receiving the MUSE broadcast (case 1), and is connected to the side b when the BS tuner is receiving the NTSC broadcast (case 2).

The output of the selection circuit 106 is input to the mixing circuit 108 via the ED processor 106.

The mixing circuit 108 mixes and outputs the input signals according to the motion of the image in (Case 1), and outputs the s-side signal as it is in (Case 2).

With the configuration shown in FIG. 11, an image can be continuously displayed on the display 110 even when the signal received by the BS tuner is switched from the NTSC signal to the MUSE signal.

FIG. 12 is a diagram showing an embodiment of the present invention in which VTR-compatible output terminals 1104 and 1105 are provided.

The ED processor 1101 extracts an actual scanning line signal of luminance and an actual scanning line signal such as color difference (RY) and (BY) from the ED processor 107 of FIG. Mix as in 108. Next, it outputs to the video output terminals 1104 and 1105 via the video encoder 1103.

FIG. 13 shows the selection circuit 106, the ED processor 1101,
FIG. 3 is a diagram showing parts such as a mixing circuit 1102 and a video encoding circuit 1103 in further detail.

The down converter 1 is connected to the MIX circuit 1212 in the mixing circuit 1102.
The luminance signal of NTSC input from the output terminal 1204 of FIG. 02 and the actual scanning line signal of the luminance output from the motion adaptive processing circuit 315 are input, and the same processing as the mixing circuit 319 in FIG. The converter 1215 converts the signal into an analog signal.

Similarly, MIX circuits 1211 and 1210 perform color difference signal processing, and convert the signals into analog signals by D / A converters 1214 and 1213, respectively.

That is, the mixing circuit 1102 is composed of the mixing circuits 319 to 32 shown in FIG.
1, or similar to the mixing circuit 108 of FIG.
At the time of processing the signal converted to SC, the motion adaptive processing is performed, and at the time of NTSC signal processing, the actual scanning line signal output of the motion adaptive processing circuit 315 is selected.

The signal subjected to the mixing process is subjected to analog conversion by D / A converters 1213 to 1215 and applied to a video encoder 1216.

The video encoder 1216 creates a luminance / color difference separation type television signal (hereinafter, referred to as an S encoder signal) by modulating a color subcarrier frequency with a color difference signal, and outputs the television signal to an output terminal 1104. A composite television signal (hereinafter, referred to as the luminance / color difference signal)
Composite video signal) and output terminal 11
Output to 05.

As described above, the configuration of the present invention shown in FIG.
A function for obtaining an output compatible with the current VTR can be added to the configuration shown in FIG.

As a result, the VTR output (525/30 signal) at the time of MUSE reception suppresses noise and aliasing components in the still part of the image, so that the image quality is improved. In the moving part of the image, decoding according to the encoding method on the transmission side can be performed by field interpolation.

In addition, NTSC signals are subjected to ED processing to provide high-quality VTRs.
25/30 signals can be output.

FIG. 14 is a diagram showing another embodiment of the present invention capable of outputting a VTR signal.

The video encoding circuit 1103 outputs the actual scanning line signal output of the luminance of the ED processor 1101 and the color differences (RY) and (BY).
A real scan line signal is input, D / A conversion and video encoding are performed, an S-encoded signal is output to a terminal 1104, and a composite video signal is output to a terminal 1105.

FIG. 14 shows an example in which the actual scanning line signal is created by calculating the line sum in the moving part of the MUSE image as compared with the configuration shown in FIG. 12, but the vertical resolution is slightly reduced. Since the circuit 1102 can be eliminated, the circuit scale can be reduced.

Also, the line sum processing for the moving part performed by the adders 707, 711, 716, etc. shown in FIG.
If the video signals input to 706, 710, 717, etc. are output as they are, a high-quality VTR output similar to that of FIG. 11 can be obtained by the configuration of FIG.

Next, still another embodiment of the present invention corresponding to the current VTR will be described.

FIG. 15 is an embodiment of the present invention in which an S-encoding signal for VTR and a composite video signal are output from the 525/30 output of the down converter 102.

In the configuration of FIG. 15 described above, the VTR output (525/30 signal) at the time of receiving NTSC (high-definition television) includes noise and aliasing components in a stationary portion, but on the other hand, a circuit equivalent to FIG. The feature is that the MUSE signal can be simultaneously recorded on the VTR while watching NTSC on a large scale.

Further, the luminance / color difference (RY), the luminance / chrominance output from the ED processor 1101 shown in FIG. 15 and the ED processor 110 shown in FIG. 12 or FIG.
By combining the configuration for video encoding of the actual scanning line signal (BY), the NTSC signal and the high-definition television signal converted to NTSC can be recorded simultaneously.

FIG. 16 is a diagram showing another embodiment of the present invention in which the down converter 102 and the A / D converter in the preprocessor 105 in FIGS. 10, 11, 13, and 14 are shared.

In Fig. 16, BS tuner 1002 and VHF / UHF tuner
The output of 1004 is selected by the selection circuit 1005 and the A / D converter 1502
Digital conversion by the down converter 102
And three A / D converters in the A / D converters built in the preprocessor 105 and the like can be reduced.

The A / D converter 1502 operates by switching the conversion clock frequency for NTSC and MUSE.

When the input is an NTSC signal, the pointer 1503 connects the digital signal to the color demodulation circuit 1504 and the selection circuit 106, and
In the case of a signal, it is connected to the down converter 1505.

The color demodulation circuit 1504 receives (RY), (B-
A color difference signal such as Y) is created and output to the selection circuit 106.

The operation of downconverter 1505 is exactly the same as downconverter 102 except for the A / D conversion operation.

Although the pointer 1503 can be deleted, power consumption can be reduced by stopping signal supply to unnecessary circuit blocks or clocks by using the pointer 1503.

FIG. 17 shows an embodiment of the present invention in which a VTR output function is added to the configuration of FIG.

The functions of the mixing circuit 1102 and the video encoder 1103 are the same as those in FIG.

FIG. 18 is a diagram showing an embodiment of the present invention in which the mixing circuit 1102 of FIG. 17 is deleted in the same manner as in FIG.

FIG. 19 is a diagram showing another embodiment of the present invention in which the encoding circuit 1103 of FIG. 15 is connected to FIG. 16 described above.

FIG. 20 is a diagram showing an embodiment of the present invention in which an input to the ED processor 107 is switched to an analog signal.

Therefore, the 525/30 output of the down converter 102 was converted to analog by the D / A converter 1901 and input to the a side of the selection circuit 1903, and the analog NTSC signal was processed to the b side and processed by the color difference processing circuit 1902. Analog color difference signal (R-
Y) and (BY) are applied.

The A / D converter 1904 converts the selected analog signal into a digital signal and inputs the digital signal to the ED processor 107.

In the configuration shown in FIG. 20, the selection circuit 1903 and the A / D converter 1
Since the input of 904 etc. is an analog signal,
1. Compared with the configuration shown in FIGS. 13 to 18, the number of signal lines for these portions can be reduced to 1/8.

FIG. 21 is a diagram showing another embodiment of the present invention in which a tuner output switching circuit 1005 similar to FIGS. 14 and 15 is provided in the configuration of FIG.

Accordingly, even when the content of the BS broadcast is switched between MUSE and NTSC, it is possible to keep displaying the image on the display 110.

FIG. 22 is a diagram showing another embodiment of the present invention in which a function of obtaining a VTR output similar to that of FIG. 14 is added to the configuration of FIG.

In FIG. 23, the video encoding circuit 2201 is connected to FIG. 21, the S-encoded signal is output to the terminal 2202, and the composite video signal is output to the terminal 2203 in the same manner as in FIG. FIG. 11 is a diagram showing another embodiment of the present invention in which is generated.

As a result, NTSC has the same circuit scale as the configuration of Fig. 21.
MUSE while watching the signal on the display 110
The signal can be recorded on the VTR.

The video encoder of FIG. 22 is added to the configuration of FIG.
By combining 1103, a standard television signal and an NTSC signal converted from MUSE can be simultaneously recorded on a VTR.

FIG. 24 is a block diagram of the present invention in which the input switching of the ED processor 107 in FIGS. 20 to 23 is performed at the composite video signal level by the selector 2302, and the number of signal lines at the input part of the selector 2302 is reduced to 1/3. It is a figure showing other examples.

In FIG. 24, when the composite video signal is an S-encoded signal, the selection circuit 2302 is a two-system switching circuit.

In FIG. 24, the 525/30 signal output from the down converter 102 is input to the video encoding circuit 2301,
A composite video signal is created in the same manner as the video encoding circuit 1103 shown in FIG.

The selection circuit 2302 is the same as the selection circuit 106 in FIG.
Select one of the composite video signal and the analog NTSC signal input from terminal 104 to
Supply to 105.

FIG. 25 is a diagram showing another embodiment of the present invention in which a tuner output switching circuit 1005 similar to FIGS. 11 to 12, 14 to 19, and 21 is provided in the configuration of FIG.

As a result, the number of signal lines input to the selector 2302 is reduced as described above, and at the same time, the video signal output from the BS tuner
Even when the mode is switched between the SC mode and the MUSE mode, an image can be displayed on the display 110 without interruption.

FIG. 26 is a diagram showing an embodiment of the present invention in which a function of obtaining a VTR output is added to the configuration of FIG.

FIG. 27 shows the video encoding processing circuit 23 in FIG.
FIG. 16 is a diagram showing another embodiment of the present invention in which 01 is replaced with the video encoder 1103 in FIG.

Video encoder 1103 has MUS from down converter 102
The 525/30 E signal is input and converted to an S-encoded signal and output to the terminal 1401, and a composite video signal is created and output to the terminal 1402 and the selection circuit 2302.

With the above configuration, the circuit scale is slightly reduced as compared with FIG. 26, and the MUS is output while the NTSC signal is output to the display 110.
The E signal can be recorded on the VTR.

In addition, in FIG.
The signal output is analog-converted by the D / A converter 1901 shown in FIGS. 20 to 22 and then video-encoded, and the luminance, color difference (RY),
If the actual scan line signal (BY) is video-encoded, the NTSC signal and the MUSE NTSC conversion signal can be simultaneously VTR-recorded.

FIG. 28 is a diagram showing another embodiment of the present invention in which the operations of the input selection means 1 and the output signal mixing means 2 at the preceding stage of the ED processor 107 are analogized.

The D / A converter 2701 converts the 525/60 analog signal of the down converter 102 into an analog signal.
Similarly, the luminance / color difference signal and the motion detection signal are analog-converted by the D / A converter 2702, and these are mixed according to the motion detection signal by the mixing circuit 2703, and the R, G, B signals are output by the RGB matrix circuit. Convert to

With the configuration shown in FIG. 28, the number of input signal lines of the selector 1903 in the configuration shown in FIGS. 11 to 19 can be reduced to 1/8.

Further, with the configuration of FIG. 28, the number of input signal lines of the mixing circuit 2703 in the configurations of FIGS. 11 to 12, 14 to 25, and 27 can be reduced to 1/8.

FIG. 29 shows the reception contents of the BS tuner in FIG.
Display 110 when switching from NTSC to MUSE
FIG. 11 is a diagram showing another embodiment of the present invention that enables an image to be displayed continuously.

FIG. 30 is a diagram showing an embodiment of the present invention in which a function of obtaining a VTR output is added to the configuration of FIG.

With this configuration, the MUSE signal being received can be simultaneously VTR-recorded while viewing the NTSC signal.

FIG. 31 shows another embodiment of the present invention in which the input switching of the ED processor 107 shown in FIGS. 20 to 23 is performed at the composite video signal level to reduce the number of signal lines of the input section to 1/3. FIG.

In the configuration of FIG. 31, since the input signal and the motion detection signal of the mixing circuit 2703 are analog signals, the number of input signal lines is reduced to about 1/8 as compared with FIGS. 11 to 25 and FIG.

32 reduces the number of input signal lines of the selection circuit 2302 in FIG. 31 to 1/3, and further reduces the number of input signal lines of the mixing circuit 2703 to 1
FIG. 11 is a diagram showing another practical example of the present invention for reducing the number to / 8.

In the configuration of FIG. 32, the reception signal of the BS tuner is NT
Even when the mode is switched from SC to MUSE, the image can be continuously displayed on the display 110.

FIG. 33 is a diagram showing another embodiment of the present invention in which a function of obtaining a VTR output is added to the configuration of FIG.

This allows the MUSE signal being received to be simultaneously VTR-recorded while viewing the NTSC signal on the display.

The various configurations according to the present invention have been described above.
It should be noted that the configuration around the mixing circuit 108 in FIGS. 11, 12, 14, and 15 may be configured to interface with analog signals as shown in FIGS.

Furthermore, the above VTR outputs are converted from 525/30 video signals to 525/6
The present invention has the same effect even when the signal is changed to 0 signal.

Further, the ED processor 107 is not limited to the configuration shown in FIG. 8, but may be any processor that basically performs frame sum processing during still image partial processing.

Next, using FIGS. 34 and 35, the selection circuits 106, 1005, 1903, 2302, and the mixing circuit 10 of FIGS. 11, 12, and 14 to 33 are described.
A control signal generation circuit for controlling 8, 1102, 2703, and the like will be described.

FIG. 34 is a diagram showing an example of the control signal generation circuit, and FIG. 35 is a timing chart thereof. Below, for simplicity of explanation, it usually consists of multiple bits
The motion detection signal from the ED processor 107 or 1101 or the like will be described as one bit corresponding to the presence or absence of motion. Also, MU
The SE signal is a signal obtained by receiving a satellite broadcast by the BS tuner.

As shown in FIG. 34, the channel selection signal is a signal output by the tuner, and is at a high level when a channel of a BS tuner is selected and at a low level when a channel of a VHF / UHF tuner is selected. The MUSE lock signal indicates the arrival of the MUSE signal, and goes high when the MUSE signal is input, and goes low otherwise. Also, this signal is used by the MUSE decoder AF in the synchronization signal reproduction circuit in the down-converter processing circuit.
Created from C pulse.

The special function identification signal is low level during special functions such as freeze and multi-strobe performed by the ED processor.
In other periods, the signal is at a high level. The motion detection signal sets a moving portion in an image to high and a still portion to low level.

Now, the tuning signal shown in FIG. 35 is input to terminal 3303 of FIG. 34, the MUSE lock signal is input to
It is assumed that a special function identification signal is input to 3301 and a motion detection signal is input to terminal 3304.

In FIG. 34, the tuning signal applied to the terminal 3303 is transmitted to the terminal 3311 as it is, and the selection circuits 1005 and 1501 are connected to the a side (BS tuner side) corresponding to the low level. Connect to the b side (VHF / UHF tuner side). The logic element 3305 in FIG. 34 generates a MUSE / NTSC signal from the channel selection signal and the MUSE lock signal and outputs it to the terminal 3310. When this signal is at a high level, the selection circuits 106 and 190
3, 2302 is connected to the a side (the output side of the down converter 102), and to the b side (the tuner side) when the level is low.

The logic element 3306 outputs an ED processor control signal based on the MUSE / NTSC signal and the special function identification signal.

When the above signal is at a low level, the ED shown in FIG.
The mixing circuits 708, 712, and 719 in the processor 107 perform a normal mixing process, and perform a process of selecting the s side and outputting a still image when the level is high.

With this control, the ED processor 107 can perform still image processing only on the MUSE signal.

The logic element 3307 generates a mixed circuit control signal shown in FIG. 35 from the motion detection signal and the ED processor control signal, and
The signal is supplied to the mixing circuit 108, 1102 and supplied to the mixing circuit 2703 via the D / A converter 2702.

When the above signal is at low level, the mixing circuits 108, 1102, 2
702 and the like perform a normal mixing process, and when high, perform a process of selecting the s side.

With this control, in the moving part of the MUSE image, the ED processor outputs a signal subjected to line sum processing, so that the image quality is slightly degraded, but the ED processor can perform special functions such as freeze and multi-strobe.

Further, by the above control, a channel selection signal name such as MUSE or NTSC can be displayed on the display.

Also, the reception content is NT on the same channel of the BS tuner.
When switching from SC to MUSE, the image can be continuously displayed on the display.

Next, a description will be given of an embodiment of the present invention for further reducing the "flicker" of the reproduction screen.

It has already been described with reference to FIGS. 5 and 10 that the present invention can remove the a to d components of the aliasing components generated by the offset subsampling performed on the stationary portion of the image by the transmitting side with respect to the still portion of the image.

Most of the "flicker" on the screen is removed by removing the above components a to d, but the components e and f which are not removed still remain as shown in FIG. Is an obstacle to Note that the horizontal axis is the horizontal frequency μ and the vertical axis is the time frequency λ.

FIG. 37 is a diagram showing an embodiment of the present invention capable of suppressing the aliasing components e and f.

FIG. 37 shows a configuration in which a field memory 3503 and an adder 3504 having a 1/2 coefficient unit are newly added to the left portion of the downconverter 102 shown in FIG. In addition,
The adder 3504 performs averaging (field sum processing).

The filter characteristics shown in FIG. 38 are obtained by the field memory 3503 and the adder 3504.
The Hz component, that is, the aliasing components e and f are removed.

As shown in FIG. 39, since the aliasing components a to d shown in FIG. 5 have been suppressed by the frame sum processing already described in FIG. 8, adding the filter characteristic shown in FIG. Since the aliasing components e and f can be removed by the sum processing, all aliasing components in the stationary part of the MUSE can be removed, and a MUSE image completely free from "flicker" can be reproduced.

Note that the above description relates to a luminance signal,
"Flicker" can be completely removed from the color difference signal by the same processing.

〔The invention's effect〕

According to the present invention, the conventional functions of the ED processor are used to perform the frame sum and inter-field interpolation processing for the still image portion, that is, the motion adaptive Y / C separation and the scanning line interpolation, which are conventionally performed by the down converter. This eliminates the need for large-scale circuits such as field memories, frequency conversion circuits, and mixers that were provided in conventional down converters. An ED (double-speed scanning) signal converter for a television signal and a standard television signal can be provided.

At the same time, the aliasing component inherent in the high definition television signal can be suppressed to completely eliminate the "flicker" of the image and increase the vertical resolution.

In addition, the television signal processing apparatus of the present invention receives a video signal output from a high-definition television receiving tuner and a standard television receiving tuner as input, and outputs a 1125/30 high-definition television video signal and a 525/30 standard video signal. A television image signal and a 525/60 ED television image signal can be simultaneously output.

Further, a composite signal for a VTR, a luminance / color difference separation signal, and the like can be simultaneously output together with the video signals.

Further, a video signal having an aspect ratio according to the display device can be output.

According to the effects of the present invention, it is possible to provide a small and economical television apparatus which can receive all television systems, reproduce high-quality ED images, and simultaneously perform VTR recording.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a block diagram showing a basic configuration of the present invention, and FIG.
FIG. 3 is a block diagram showing a configuration example of a conventional apparatus, FIG. 4 is a detailed block diagram of an embodiment of the present invention, and FIG. FIG. 6 is a diagram illustrating the distribution of components, FIG. 6 is a characteristic diagram of a vertical LPF, FIGS. 7 (a) and 7 (b) are diagrams each showing a size of a display screen, and FIG. , FIG. 9 is a filter characteristic obtained by frame summing, FIGS. 10 (a) and (b) are explanatory diagrams of a signal processing method in a still portion and a moving portion of an image, respectively, FIGS. 11, 12 and 14 to 33. 13 is a block diagram showing various configuration examples of an embodiment of the present invention, FIG. 13 is a detailed block diagram of a VTR signal generation unit in FIG. 12, and FIG. 34 is a block diagram of a control signal generation circuit according to the present invention. FIG. 35 is a time chart of FIG. 34, and FIG. 36 is a time chart of the present invention. FIG. 37 is a diagram for explaining aliasing components removed by field sum processing, FIG. 37 is a block diagram of a configuration example of the present invention for removing aliasing components by field sum processing, FIG. 38 is a frequency characteristic diagram of FIG. 37, and FIG. FIG. 3 is a diagram showing all of the folded components removed by the present invention. 102 MUSE input terminal, 102, 230 each down converter, 103 HDTV video output terminal, 104, 241 each NTSC input terminal, 105 preprocessor, 106, 243, 1005
Each selection circuit, 107, 240, 1101 …… Each ED processor, 10
8, 319 to 321, 1102 ... each mixed circuit, 109 ... postprocessor, 110 ... display, 202 ... ALC amplifier circuit, 2
03, 301 ... each A / D converter, 204 ... ALC circuit, 205, 302 ...
... each de-emphasis circuit, 206, 704, 714, 715 ... each frame memory, 207, 303 ... each two-dimensional LPF, 208 ... folding back removal circuit, 209, 304 ... each vertical LPF, 210 ... contour emphasis Circuit, 211: Speed conversion unit, 212 to 214, 305, 306 ...
Each speed converter, 307: Delay adjustment circuit, 251, 252, 1213 ~
1215: Each D / A converter, 315: Motion adaptive processing circuit, 316
~ 318 ... Each speed circuit, 325 ... RGB matrix, 322
~ 324 ... D / A converter, 705,707,711,716,718,721 ...
… Each adder, 706, 710, 717, 720 …… Each line memory,
713 …… Multiplexer, 722 …… Demultiplexer, 72
7… MAX circuit, 728… Motion detection circuit, 1002… BS tuner, 1004… VHS / UHF tuner, 1103… Video encoding circuit, 1216 …… Video encoder, 1503 …… Pointer, 1504 …… Color demodulation circuit.

Claims (12)

(57) [Claims] An apparatus for processing a reception signal of a high-definition television system and a reception signal of a standard television system in which a band is compressed by using at least a sub-sampling system, comprising: an in-field signal processing unit; It has a first conversion unit for converting the number of scanning lines and a second conversion unit for converting the scanning speed and the number of scanning lines to a standard speed, and performs in-field signal processing on the reception signal of the high-definition television system. A down converter for converting the applied video signal into a video signal of a double-speed television (ED) system and a video signal of a standard television system and outputting the converted signal; and a reception signal of the standard television system and the down converter. First input selection means for selecting one of the standard television system video signals to be output, and standard television method selected by the first input selection means. A signal processing unit having at least a frame memory for performing motion detection of an image and performing inter-frame signal processing and in-field signal processing according to a still image portion and a moving image portion, and a double-speed scanning speed and number of scanning lines An ED processor having a conversion processing unit for converting the video signal into an ED video signal; and an output signal of the ED processor and an ED of the down converter.
And a mixing unit that mainly outputs the output of the down converter when the image is moving and the output signal of the ED processor when the image is stationary based on the video signal output of the system. A television signal processing device. 2. The down-converter according to claim 1, further comprising means for outputting the ED digital video signal and the standard television digital video signal, and further comprising: A television signal processing apparatus, comprising: a preprocessor for performing digital conversion and processing; and a postprocessor for converting an output of the mixing means to an analog signal and outputting the analog signal. 3. The downconverter according to claim 1, further comprising: means for outputting the digital video signal of the ED system and the analog video signal of the standard television system; And selecting a standard television analog video signal output from the down converter and the standard television analog video signal output from the first input selection means. A television signal processing device comprising first A / D conversion means for inputting to an ED processor. 4. The BS according to claim 1, wherein said BS receives a satellite broadcast.
Tuner and VH for receiving standard television broadcasts
F / UHF tuner, selecting one of a standard television reception signal received by the BS tuner and a standard television reception signal received by the VHF / UHF tuner and selecting the first input A television signal processing apparatus, comprising: a second input selection means for providing the means. 5. The BS according to claim 2, wherein said BS receives satellite broadcasts.
Tuner and VH for receiving standard television broadcasts
F / UHF tuner, a standard television receiving signal received by the BS tuner and a standard television receiving signal received by the VHF / UHF tuner are selected and provided to the preprocessor. 2
A television signal processing device comprising: 6. The BS for receiving satellite broadcasts according to claim 1.
Tuner and VH for receiving standard television broadcasts
F / UHF tuner, third input selecting means for selecting one of the output signals of the BS tuner and VHF / UHF tuner, and second A / A for converting the output of the third input selecting means to a digital signal D conversion means, and when the output signal of the second A / D conversion means is a high-definition television signal, the signal is provided to the down-converter, and the output signal of the second A / D conversion means is supplied to a standard television. In the case of a signal, the standard television signal is provided to the first input selection means. 7. The down converter according to claim 1, wherein said down converter performs a field interpolation process on an input signal of a high-definition television system, and outputs the output of said field interpolation process unit to said field interpolation unit. A vertical low-pass filter that converts the image signal into a video signal that matches the position of the center of gravity of the scanning line in the ED system, a first conversion processing unit that converts the output of the vertical low-pass filter into the scanning speed and the number of scanning lines in the ED system, A second conversion processing unit for converting an output of the first conversion processing unit into a scanning speed and the number of scanning lines of a standard television system, and outputting at least output signals of the first and second conversion processing units. A television signal processing device, characterized in that: 8. A field memory for delaying the output of said first speed converting means by one field, and adding means for averaging the output of said field memory and the output of said first speed converting means. Wherein the output of the adding means is provided to the second speed converting means. 9. The method according to claim 1, wherein
The ED processor has means for outputting a standard television video signal in addition to the ED video signal, and further converts the standard television video signal output by the ED processor into a composite video signal and an S-encoded signal. 1. A television signal processing apparatus, comprising: a video encoding unit. 10. A video encoding means according to any one of claims 1 to 8, wherein said video encoding means converts a standard television video signal output from said down-converter into a composite video signal and an S-encoded signal and outputs. A television signal processing device. 11. A television according to claim 1, further comprising a control circuit for switching and controlling at least said first input selection means based on channel selection information of a television receiver. Signal processing device. 12. The method according to claim 1, wherein
Means for judging whether the signal received by the tuner is one of a high-definition television signal and a standard television signal and outputting a discrimination signal, and means for outputting a motion detection signal of a video signal in the ED processor And a control circuit for controlling at least the mixing means based on the discrimination signal, the motion detection signal, and channel selection information of a television receiver.