JP2939543B1 - Superconducting sampling measurement circuit - Google Patents

Abstract

A superconducting sampling measurement circuit reduces crosstalk of a trigger pulse applied from the outside and prevents a malfunction of a sampling gate. SOLUTION: A Josephson transmission line type delay time varying device 50 measures the measured pulse waveform Iu while maintaining the superimposition relationship of the ultrashort pulse Ip on the measured pulse waveform Iu according to the superimposed timing specified at each time. In order to apply the superimposed waveform of the pulse waveform Iu and the super-short pulse Ip to the sampling gate Js with a delay of a predetermined time tdf from the rise of the trigger pulse Itu to the sampling gate Js, the signal delay line 41 having a fixed delay time tdf under a very low temperature environment Provide.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention analyzes a high-speed small signal output from a superconducting circuit generally called a Josephson circuit. The present invention relates to an improvement of a superconducting sampling measurement circuit for restoring and displaying the signal on-axis, a so-called "Josephson sampler".

[0002]

2. Description of the Related Art A Josephson sampler for measuring an output signal waveform of a superconducting circuit using a Josephson junction operating in a cryogenic environment is disclosed in, for example, Reference 1: "Electronic Technology Research Institute, Vol. 48, Vol. No. 4,
P.340-352 ", published by the Ministry of International Trade and Industry, Institute of Industrial Science and Technology, Research Institute of Electronics, etc. Reference 2: Japanese Patent Publication No. Sho 62-45640, etc. The principle and typical system configuration are shown in FIG. Has become.

A circuit under test 11, such as a Josephson transmission line mounted on a chip 10 placed in a cryogenic environment, for which transmission characteristics and input / output waveform relationships are to be measured performs a latch operation unique to the Josephson circuit system. If a reset operation at a predetermined cycle is required to perform the operation or a clock synchronous operation is performed otherwise, a clock pulse Cp from a clock pulse oscillation circuit 21 provided under an external normal temperature environment is used as described later. It is applied to the trigger pulse generation circuit 24 and the switch circuit 34. Further, in relation to this and the pre-synchronization, a power supply current (generally a pulsating current) must be supplied to the other active circuits shown in the drawing, but it is natural to supply the power supply current. This power supply system is not shown. Note that pre-synchronization means that the power supply current rises before the clock pulse Cp rises.

FIG. 2 used for describing the features of the present invention also shows the waveform relationship in this conventional example for comparison, and this is also referred to. The current amplitude of the trigger pulse Itu, which is repeatedly generated by the trigger pulse generation circuit 24 in a cycle, is actually quite large, and the rise time reaches 90% of the maximum current amplitude
The current value usually reaches several hundred μA during about 200 ps. Generally from 50 to very low temperature environment
This value is necessary to send a signal through a transmission line having a line impedance that is not as high as Ω. Note that the pulse width itself is not important, and often depends exclusively on the clock pulse Cp or the fall of the power supply current, and is considerably long from several ns to more.

The trigger pulse Itu generated by the trigger pulse generating circuit 24 is guided in a cryogenic environment and input to a gate circuit 27 composed of an appropriate Josephson gate or the like.
The circuit under test 11 transmits a minute pulse signal Iuf having a pulse width of several tens of ps and a current of about several μA given through the gate circuit 27. As a result, a minute pulse waveform Iu to be measured, which is an output pulse generated by the circuit under measurement 11 each time, is applied to a Josephson sampling gate Js preferably composed of a Josephson single junction via a load resistor Ru. Applied. Therefore,
Looking at the time relationship schematically shown in FIG. 2, the pulse waveform Iu to be measured usually ends at a considerably early stage rather than during the time when the trigger pulse Itu does not completely rise. Although the sampling gate Js was initially composed of a magnetic flux quantum interference device (SQUID), it had difficulties in high-speed operation and it was difficult to obtain a high time resolution. Has been replaced.

However, the trigger pulse Itu generated by the trigger pulse generating circuit 24 is also supplied to the variable delay line device 25 under a normal temperature environment separately from the above-mentioned path, and is determined by the variable delay line control circuit 23 from time to time. The given delay time tdv is provided as a given delay drive pulse Itp in a cryogenic environment and input to the very short pulse generation circuit 22. This extremely short pulse generation circuit 22 has an extremely short impulse Ip (hereinafter, extremely short pulse Ip) of about 10 ps even if the pulse width is long, and generally about several ps.
This extremely short pulse Ip is applied to the sampling gate Js via the load resistance Rp.

Accordingly, a synergistic current of the pulse waveform Iu to be measured and the ultrashort pulse Ip is supplied to the sampling gate Js. As shown in FIG.
Even when the extremely short pulse Ip overlaps the peak value of Iu, their current values are set so that the sum (Ip + Iu) of both does not exceed the critical current Iso of the sampling gate Js. In other words, the sum of these current values (Ip +
Iu) plus the bias current Is plus the current (Ip + Iu +
When (Is) is applied to the sampling gate Js, the sampling gate transitions to the voltage state with a predetermined probability, for example, a 50% probability in several samplings (that is, (Ip + Iu + Is) ≧ Iso. ), If the value of the bias current Is is adjusted and determined, the bias current Is
The value of the measured pulse waveform Iu at the moment when the extremely short pulse Ip is applied can be obtained from the value of. Therefore, this operation is performed by the command of the variable delay line control circuit 23 through the variable delay line device 25, for example, by changing the delay time tdv of the ultrashort pulse Ip in minute time steps of about 1 ps, By repeating this while shifting the superposition timing, the entire measured pulse waveform Iu can be restored and displayed on a time axis enlarged with high time resolution.

Here, instead of manually performing such a measuring operation, in particular, an operation of determining the bias current Is, the magnitude of the bias current Is at each sample is controlled optimally.
For automation, a bias current control circuit 30 is conventionally used as shown by a dashed line in the figure. That is, the voltage waveform obtained at the sampling gate Js
Vs is amplified by the amplifier 31, and the reference voltage Vr
Is subtracted by the comparison circuit 32 and then integrated by the integration circuit 33. The obtained DC voltage Vm is converted into a pulse waveform of the voltage value Vm by the switch 34 synchronized with the clock pulse Cp,
The bias current Is is supplied to the sampling gate Js via the resistor Rs.
(= Vm / Rs). Therefore, by adjusting the magnitude of the reference voltage Vr, it is possible to change the probability that the sampling gate Js will be in a voltage state, and in such a feedback control system, based on the output voltage Vm of the integration circuit 33, the bias current Is at each time is determined. Is calculated from the above-mentioned Is = Vm / Rs to calculate the current axis Y
If the delay time tdv from the variable delay line control circuit 23 is plotted and displayed on the appropriate known display 26 as the time axis X, the target pulse waveform Iu to be measured can be restored on the enlarged time axis. Can be displayed.

[0009]

Although the principle of operation of the Josephson sampler is as described above, the sampling gate Js sometimes malfunctions with the conventional configuration. There are several causes for this, but the biggest factor is the crosstalk of the trigger pulse Itu having a large energy as described above.

That is, as described above, the trigger pulse Itu generated by the trigger pulse generating circuit 24 placed in an external room temperature environment is considerably larger in energy than the pulse waveform Iu to be measured. Therefore, as shown in FIG.
Transition period of the rising edge of the trigger pulse Iu (200
The energy of the harmonic component contained in the chip 10 during the time of about 10 ps) is also considerably large, which causes the chip 10 in an extremely low temperature environment.
Crosstalk occurs in the upper signal system, and sneak into the sampling gate Js as an erroneous signal. In particular, the output of the trigger pulse generation circuit is divided into two, one of which is passed through a gate circuit 27 which is in a cryogenic environment as it is, and the other is passed through a variable delay line device 25 which is in a normal temperature environment, and then is placed in a very low temperature environment If the configuration is such that the signal is sent to the short pulse generation circuit 22, the slight difference in the line arrangement and line length produces a so-called skew, and the probability of occurrence of crosstalk and the magnitude thereof further increase.

This crosstalk is often wrapped around a ground conductor called a ground plane in a Josephson circuit system, but it is highly accurate in a Josephson circuit system requiring extremely high speed and minute signal transmission. Since a microstrip line structure with good impedance matching must be indispensable, there is a limit to reducing crosstalk by devising a circuit.

In addition, as a secondary problem, there is also a problem of a noise current flowing in the opposite direction from the external circuit through the output line of the sampling gate Js. In the present applicant, research has been conducted to place the bias current control circuit 30 also in an extremely low temperature environment, but at present, such a signal processing system is constructed by a semiconductor circuit system within a range recognized as being known, It is placed in a room temperature environment. In these cases,
Since the signal levels handled are completely different and the semiconductor circuit side is overwhelmingly large, even if the noise component can be reduced, it can not be ignored for the Josephson circuit system, and this will cause the output line of the sampling gate Js to go in the reverse direction. Is superimposed on the output signal of the sampling gate Js,
This causes a situation in which the measurement accuracy is deteriorated.

Further, the variable delay line device 25 for shifting the ultrashort pulse Ip by a minute time has a point to be improved in addition to the above-mentioned problem due to the fact that it is placed in a normal temperature environment. is there. As is well known, the transmission time of a transmission pulse is adjusted by mechanically expanding and contracting the length of a coaxial waveguide type transmission line as if it were a trombone. Such a type of delay time variable device is difficult to adjust with high precision, and it is easy to obscure the waveform of the transmission pulse, which deteriorates the measurement accuracy. In addition, since a large trigger pulse is directly handled, it may be a cause of noise generation. There is also a type in which taps are provided at several places in the middle of a microstrip line of a fixed length and the length of the propagation line is changed by switching this with a multiplexer, but the situation is still the same, Since a signal having a large current value must be handled, it is difficult to give a noise component to a Josephson circuit system handling a small signal, and it is also difficult to increase the time resolution and increase the number of adjustment stages.

In view of such circumstances, the present invention does not disclose a device that can basically reduce crosstalk based on the generation of a trigger pulse. In addition, a structural principle that can also reduce noise applied from an external environment if necessary is disclosed.

[0015]

In order to achieve the above object, according to the present invention, a trigger pulse generated by a trigger pulse generating circuit located outside a cryogenic environment and a circuit to be measured and an extremely short pulse generating circuit located under a cryogenic environment are used. And a sampling pulse in a cryogenic environment by superimposing a bias current on the pulse waveform to be measured passing through the circuit to be measured and the ultrashort pulse generated by the ultrashort pulse generation circuit based on the input of the trigger pulse. By applying a voltage to the gate and using a variable delay time device to control the magnitude of the bias current while shifting the superimposition timing of the ultrashort pulse by a small time width, and monitoring the output of the sampling gate, the pulse waveform to be measured is enlarged. In the superconducting sampling measurement circuit displayed on the time axis, the measured time corresponding to the respective superimposition timing determined by the delay time variable device Since the pulse waveform to be measured and the superimposed waveform of the ultrashort pulse are given to the sampling gate with a delay of a predetermined time from the rise of the trigger pulse while maintaining the superimposition relationship of the ultrashort pulse on the pulse waveform, A signal delay line having a fixed delay time is provided in a low-temperature environment.

According to the present invention, the output of the sampling gate is buffered between the sampling gate and a circuit which is outside the cryogenic environment and processes the output of the sampling gate. Josephson transmission including a Josephson transmission line that can control the signal propagation delay time according to the magnitude of the applied bias current by operating a configuration that provides a Josephson gate or a variable delay time device in an extremely low temperature environment It is also proposed to configure with a line-type delay time variable device.

In particular, in the latter case, the Josephson transmission line type delay time varying device has a pulse generation section for generating a predetermined pulse waveform at the input side of the Josephson transmission line, and the Josephson transmission line at the output side. It is desirable to have a waveform shaping unit for shaping the pulse waveform transmitted via the Song transmission line.

[0018]

FIG. 1 shows an example of the configuration of a Josephson sampler constructed according to the present invention. However, with respect to the conventional configuration already described with reference to FIG. 5, the same or similar components are denoted by the same reference numerals, and those which do not require any particular modification according to the present invention will be repeated. Description is omitted.

The most characteristic of the circuit of FIG. 1 is that the pulse waveform to be measured Iu applied to the sampling gate Js also has an extremely short pulse Ip Always constant propagation delay time
Signal delay lines 41, 41 for providing tdf are provided. This signal delay line 41 can be easily configured by a superconducting line having a length necessary to obtain a required constant delay time tdf, and in a cryogenic environment, an ultrashort pulse generation circuit 22 is mounted. Can be mounted on the same chip 10 as the chip 10.

This is the most basic improvement in the present invention, which will be described in detail later. Here, other desirable improvements in the present embodiment will be listed first. A device for shifting the superimposition timing of the ultrashort pulse Ip, that is, the sampling gate with an arbitrary small time delay tdv with respect to the rise of the pulse waveform Iu to be measured applied to the sampling gate Js
In the related art, the delay time variable device for applying the ultrashort pulse Ip to Js is, as described with reference to FIG. 5, mechanically operated at room temperature environment or includes tap switching by a multiplexer. Although the variable delay line device 25 has been described, in this embodiment, as will be described later with reference to FIG. 3, the device can be incorporated on the chip 10 under an extremely low temperature environment, and the bias current Ib The Josephson transmission line type delay time varying device 50 is capable of correspondingly varying the delay time tdv depending on the size.

Further, the output of the sampling gate Js mounted on the chip 10 under the cryogenic environment is not directly extracted but connected to the measurement system under the external environment. Has been withdrawn through. The buffer gate 44 itself may be a known existing one called a so-called 4JL gate or the like, and it is not essential whether or not the buffer gate 44 itself has a current gain (although it is preferable to have a current gain in order to handle minute signals).

However, according to the present invention, the trigger pulse
As shown in FIG. 2 as the “present invention” waveform in comparison with the “conventional example” waveform, the timing at which the pulse waveform Iu to be measured is applied to the sampling gate Js is the delay time tdf The signal can be delayed by a fixed signal delay line 41 for a certain time by the delay time tdf. Therefore, even if the trigger pulse Itu has an extremely large energy as described above, if the rise time thereof is also, for example, about 200 ps as described above, the delay time tdf is set by the signal delay lines 41 and 41. By setting the time longer than this, and desirably about 400 ps in consideration of a margin, it is possible to avoid the influence of crosstalk caused by a harmonic component generated when the trigger pulse Itu sharply rises.

Of course, the fixed delay time tdf
In this case, the timing at which the delay time variable device constituted by the Josephson transmission line type delay time variable device 50 applies the ultrashort pulse Ip to the pulse waveform Iu to be measured is minute each time. The variable delay time tdv required for shifting the time is the same as the conventional one in the relative relationship because the same fixed delay time tdf is given to both the pulse waveform Iu to be measured and the ultrashort pulse Ip. Has no effect on the measurement. In other words, the pulse waveform Iu to be measured rises always with a fixed delay time tdf caused by the signal delay line 41 introduced for the first time from the rising of the trigger pulse Itu, and the very short pulse Ip superimposed on this rises with the signal delay. Fixed delay time td due to line 41
f plus a delay time tdv defined by the Josephson transmission line delay time varying device 50 from time to time (t
df + tdv), so that the delay time relationship between the two is eventually only the delay time tdv specified by the delay time varying device 50 at each time, as in the conventional case.

In fact, the effect of introducing the variable delay time device 41 having a fixed delay time tdf is great. According to the experiments of the present inventor, the probability of malfunction of the sampling gate Js caused by the rise of the trigger pulse Itu is small. It has succeeded in greatly reducing it, and has greatly contributed to improvements in measurement accuracy and reliability.

In addition, as can be seen in this embodiment, a buffer gate is connected to the output of the sampling gate Js.
If 44 is provided, even if a semiconductor bias current control circuit 30 or the like that handles a large signal which is 1000 times larger than a Josephson circuit system under a normal temperature environment is The feedback to the sampling gate Js can be prevented, and the sensitivity and measurement accuracy are greatly improved.

Further, as is also recognized in this embodiment, a predetermined time delay tdv is given to the ultrashort pulse Ip in each case in relation to the pulse waveform Iu to be measured, and the time delay tdv is, for example, 1 ps. When a Josephson transmission line type delay time variable device 50 that can be mounted on the chip 10 in a cryogenic environment is used as a delay time variable device for adjusting with a small time width of about high resolution, noise from outside is also reduced. Since it can be prevented from sneaking into the sampling gate Js and the signal can be suppressed from being rounded, this also leads to improvement in measurement accuracy and reliability.

Such a Josephson transmission line type variable delay time device 50 is known per se, but will be described in some detail with reference to FIG. As shown in FIG. 3A, the physical structure of the Josephson transmission line 51, which is the main part of the device, is such that the upper superconductor 52 and the lower superconductor 53 overlap with a thin tunnel insulating film 54 interposed therebetween. By extending the upper and lower superconductors 52 and 53 over a required length, a transmission line having an arbitrary line length by a slender Josephson junction JJ can be constructed. An equivalent circuit of such a Josephson transmission line 51 is as shown in FIG. 3 (B), and when a bias current Ib is passed between the upper and lower superconductors 52 and 53, the overall line shape of one line is The Josephson junction JJ also looks like a cascade of many small Josephson junctions Jo connected via an inductance Lo.

Therefore, when the input signal Sin is input to one end of the length of the Josephson transmission line 51, even if the input signal Sin is not a pulse-like waveform but a ramp waveform, the signal propagating through the transmission line 51 Is a pulse waveform Ps, and a large number of small Josephson junctions Jo propagate the pulse waveform Ps as if they were dominoes. The time until each of the junctions Jo sequentially transitions to the voltage state can be finely adjusted, and eventually the propagation time until the output from the other end of the transmission line can be adjusted with a minute time width.

Therefore, when such a Josephson transmission line type delay time varying device 50 is used, an extremely short pulse
The delay time variable control circuit 43 for varying the generation timing of Ip in a minute time width is substantially a variable circuit of the bias current Ib.

However, if the propagation time is long, the pulse width of the propagation pulse Ps is widened, although not as much as when the conventional variable delay line device 25 is used. As shown in FIG. 3C, on the input side of the Josephson transmission line 51, a pulse generator 55 including a pulse generator 57 for generating a pulse waveform of a predetermined shape in response to the input of the input signal Sin is provided. Has a waveform shaping unit 56 for shaping the propagated pulse.
It is good to use 50. At this time, the pulse generator 56 in the former stage and the waveform shaping unit 56 in the latter stage have an equivalent circuit structure similar to that of the transmission line 51, but the applied bypass current is fixed to a desired value Ibf. A pulse having a required amplitude and a required pulse width can be stably obtained.

The use of such a Josephson transmission line type delay time varying device 50 is particularly advantageous because it can be placed in an extremely low temperature environment. As shown in FIG. It is only necessary to branch from the sending gate circuit 27, and there is no need to branch the output of the trigger pulse generating circuit 24 into two under a normal temperature environment as in the conventional example shown in FIG. In other words, a large trigger pulse from the trigger pulse generation circuit 24 can be guided to the chip 10 in a cryogenic environment only through one signal line, and the problem of skew caused by wiring arrangement You can escape from.

However, the signal delay line 41 having a fixed delay time according to the most basic configuration of the present invention is located at the position shown in FIG. 1 as apparent from the principle shown in FIG. It is not necessarily required. After the trigger pulse Itu is introduced in a cryogenic environment, the pulse waveform Iu to be measured and the ultrashort pulse Ip need only be provided somewhere on the path leading to the sampling gate Js. Even if two are not used, the trigger pulse Itu introduced in the cryogenic environment is first passed through one signal delay line 41 after or before the gate circuit 27, and the output is used as a path for generating a pulse waveform to be measured. It may be branched to a path for generating an extremely short pulse.

FIG. 4 shows another preferred embodiment of the present invention in which only the circuit under test 11 is mounted on its own circuit chip 10B to be measured, and the remaining measurement system part is mounted on the measurement circuit chip. The circuit to be measured is mounted on 10A.
A configuration is disclosed in which the connection between the circuit 11 and the superconducting sampling measurement circuit is made through a connection 46 by wire bonding or flip chip bonding between the measurement circuit chip 10A and the circuit chip 10B to be measured. For the other parts, the description described with reference to FIG. 1 and the description regarding the conventional example described with reference to FIG. 5 can be cited. The internal configuration of the bias current control circuit 30 is not shown.

In this embodiment, the pulse waveform Iuf, which is the source of the pulse waveform to be measured, is transmitted from the measurement circuit chip 10A to the circuit chip to be measured 10B via a connection 46 which is typically shown in the form of a bonding pad. It is given to the circuit under test 11. The measured pulse waveform Iu that has passed through the circuit under measurement 11 returns to the measurement circuit chip 10A via another connection section 46 again, and is applied to the sampling gate Js.

In such an embodiment, the measuring circuit chip
Even if the circuit under test 11 is manufactured by a manufacturing process different from that of the component on 10A, it can be measured.
For example, there is no problem when the side of the measurement circuit chip 10A is made of an Nb or NbN-based material and the circuit under test 11 is made of an oxide high-temperature superconducting material. Also the connection
If a removable bonding pad connection structure or wire bonding connection structure is adopted as 46, the Josephson sampler circuit system on the measurement circuit chip 10A can be connected to the circuit under test 11 on the circuit chip 10B to be measured. Therefore, one Josephson sampler can be used for measurement of several Josephson circuits. However, this concept itself has already been filed by the applicant in Japanese Patent Application No. Hei 9-13.
The application has been filed as 3518, so you can refer to it if necessary. Various other ideas are disclosed therein.

[0036]

According to the present invention, the problem of crosstalk in which the sampling gate malfunctions due to the rise of a trigger pulse of a large energy applied from outside the cryogenic environment can be greatly reduced, and high accuracy and high reliability can be achieved. Can be provided.

Further, according to the lower aspect of the present invention, the provision of the buffer gate at the output of the sampling gate improves the noise resistance performance, and similarly provides a very short pulse with a predetermined delay time at each time. For variable delay time devices,
Using a Josephson transmission line type delay time variable device that can vary the delay time according to the magnitude of the bias current in a cryogenic environment also requires a high-precision to maintain a good pulse waveform and improve noise resistance. Can contribute to measurement.

[Brief description of the drawings]

FIG. 1 is a schematic configuration diagram of a first embodiment of a superconducting sampling measurement circuit configured according to the present invention.

FIG. 2 is an explanatory diagram for explaining the present invention based on a waveform relationship of each unit.

FIG. 3 is an explanatory diagram of a Josephson transmission line type delay time variable device preferably used in the present invention.

FIG. 4 is a schematic configuration diagram of a second embodiment of the present invention.

FIG. 5 is a schematic configuration diagram of a typical example of a conventional superconducting sampling measurement circuit.

[Explanation of symbols]

 10 Chip placed in a cryogenic environment 10A Measurement circuit chip 10B Circuit under test 11 Circuit under test 22 Ultrashort pulse generation circuit 24 Trigger pulse generation circuit 25 Variable delay line device 41 Signal delay line with fixed delay time 43 Bias current variable Circuit (variable delay time control circuit) 44 Josephson buffer gate 46 Connection unit 50 Josephson transmission line type delay time variable device 51 Josephson transmission line 55 Pulse generation unit 56 Waveform shaping unit Js Sampling gate Itu Trigger pulse Ip Very short pulse Iu Pulse waveform to be measured Is bias current Ib Bias current for delay time variable control

──────────────────────────────────────────────────続 き Continuation of the front page (72) Inventor Hiroshi Ako 1-1-4 Umezono, Tsukuba-shi, Ibaraki Pref. Japan Institute of Industrial Science and Technology (56) References JP-A-60-121600 (JP, A) 61-240171 (JP, A) (58) Fields investigated (Int. Cl. ⁶ , DB name) G01R 13/00-13/42 H01L 39/00-39/24

Claims (5)

(57) [Claims] A trigger pulse generated by a trigger pulse generation circuit located outside a cryogenic environment is supplied to a circuit under measurement and an ultra-short pulse generation circuit located under a cryogenic environment, and a measured pulse passing through the circuit to be measured is provided. A bias current is further superimposed on the pulse waveform and the ultra-short pulse generated by the ultra-short pulse generation circuit based on the input of the trigger pulse, and the bias current is superimposed and applied to the sampling gate under the ultra-low temperature environment. By controlling the magnitude of the bias current while shifting the superimposition timing of the extremely short pulse by a very small time width, and monitoring the output of the sampling gate, the pulse waveform to be measured is displayed on an enlarged time axis. A superconducting sampling measurement circuit; the circuit for measuring the pulse waveform to be measured according to the respective superimposition timings determined by the delay time variable device; In order to apply the measured pulse waveform and the superimposed waveform of the ultrashort pulse to the sampling gate with a delay of a predetermined time from the rise of the trigger pulse while maintaining the superimposition relationship of the ultrashort pulse,
A signal delay line with a fixed delay time is provided in the cryogenic environment; 2. The superconducting sampling measurement circuit according to claim 1, wherein the cryogenic environment is provided between the sampling gate and a circuit outside the cryogenic environment and processing the output of the sampling gate. A superconducting sampling measurement circuit, wherein a Josephson gate is provided below and buffers the output of the sampling gate. 3. The superconducting sampling measurement circuit according to claim 1, wherein said variable delay time device is operated in a cryogenic environment, and a signal propagation delay time is set according to a magnitude of a bias current applied. A superconducting sampling measurement circuit, comprising: a Josephson transmission line type delay time variable device including a controllable Josephson transmission line. 4. The superconducting sampling measuring circuit according to claim 3, wherein said Josephson transmission line type delay time varying device includes a pulse for generating a predetermined pulse waveform at an input side of said Josephson transmission line. A superconducting sampling measuring circuit, characterized in that the generating section has a waveform shaping section for shaping a pulse waveform transmitted via the Josephson transmission line on an output side. 5. The superconducting sampling measurement circuit according to claim 1, wherein the component to be placed in the cryogenic environment in the superconducting sampling measurement circuit is the circuit to be measured. The circuit to be measured is mounted on a measuring circuit chip different from the circuit to be measured; the circuit to be measured and the superconducting sampling measuring circuit are connected by wire bonding between the measuring circuit chip and the circuit to be measured. Alternatively, a superconducting sampling measurement circuit characterized by being formed by flip chip bonding.