JP2914041B2 - Method of forming insulating film - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for forming an insulating film on a device isolation insulating film and an interlayer insulating film of a semiconductor integrated circuit by a plasma CVD (chemical vapor deposition) method.

[0002]

BACKGROUND OF THE INVENTION Single crystal silicon substrate on which a semiconductor integrated circuit is formed, a groove dug silicon dioxide in the trench (SiO ₂₎ or borosilicate glass (BPSG: boro-p
An element isolation region or a trench capacitor in which an insulator such as a phosphosilicate glass is buried is formed.

A conventional method for forming a trench isolation region will be described with reference to cross-sectional views of FIGS.

First, as shown in FIG. 4 (a), a CVD method is used to bury an insulator in a trench 6 formed by dry etching in a P ^- type silicon substrate 1 using a resist (not shown) as a mask. BPSG film 5 on the entire surface
a is growing.

The CVD method for growing the BPSG film 5a includes:
A gas using monosilane (SiH ₄ ), phosphine (PH ₃ ) and oxygen (O ₂ ) as a supply gas, or tetra-orthoethoxysilane (TEOS: Si (OC ₂
H _{5) 4),} trimethyl borane (TMB: B (CH _3)
3 ), trimethyloxyphosphine (TMOP: PO
Some use (CH ₃ ) ₃ ) and oxygen (O ₂ ). There are a pressure reduction method and a normal pressure method, respectively.

The concentration of each component of the BPSG film 5a is determined by considering B ₂ O ₅ / S in consideration of glass reflow characteristics in a flattening step.
iO ₂ = 4 to ₂₀ mol%, P ₂ O ₅ / SiO ₂ = 4 to
It is controlled to 20 mol%.

In the case of a trench having a narrow opening width of 1 μm and a depth as deep as about 5 μm, that is, a so-called large aspect ratio, when the BPSG film 5 a is entirely grown, the reactant gas flows in the depth direction of the trench 4. As a result, the reaction gas molecules hardly reach the bottom of the trench 4. As a result, the growth rate of the BPSG film 5a is highest at the corner 6 of the trench and gradually decreases toward the bottom of the trench 4.

When the BPSG film 5a is grown, the thickness is increased at the corners 6 of the trench and becomes overhanging and joined from both sides, so that a void (cavity) is generated inside the trench 4. Therefore, before the trench 4 is closed, B
The growth of the PSG film 5a must be interrupted. 1μ width
When the m trench is buried, the thickness of the BPSG film 5a is generally controlled to 0.5 μm.

Next, as shown in FIG.
Reflow heat treatment at 1000 ° C and corner 6 of trench
Overhang of the BPSG film 5a is eliminated.

Next, as shown in FIG.
A BPSG film is grown by the VD method to completely bury the Tren 4.

Next, as shown in FIG.
The reflow heat treatment at 1000 ° C.
The depression of the PSG film 5a is eliminated.

Next, as shown in FIG. 4E, the BPSG film 5 is formed by dry etching or wet etching.
is etched back to complete the trench isolation region.

[0013]

Conventionally, the step coverage (step coverage) of a trench having a large aspect ratio in a CVD method is poor, so that it is necessary to perform a reflow heat treatment at a high temperature of 950 to 1000 ° C. Therefore, the probability of introducing a crystal defect into the semiconductor layer increases, and the yield and reliability of the semiconductor element may be reduced.

Further, a defect is introduced into the PN junction between the P ⁻ type silicon substrate and the N ⁺ type buried layer by the high temperature heat treatment, so that the leak current increases. The N ⁺ type buried layer rises in the vertical direction, and the concentration gradient with the N ⁻ type epitaxial layer becomes small. As a result, the characteristics of the semiconductor device are significantly reduced.

[0015]

According to the present invention, there is provided a method of forming an insulating film, comprising: a lower electrode to which a high-frequency power source whose output can be periodically switched is applied; and a shower to which nitrogen trifluoride is introduced. In a growth chamber provided with a parallel plate electrode composed of an upper electrode, a reaction gas composed of tetraethylorthosilicate, nitrous oxide, ammonia and nitrogen trifluoride is turned into plasma, and an insulating film is vapor-phase grown on the surface of the semiconductor substrate. Things.

[0016]

An insulating film having excellent step coverage is obtained by periodically repeating a process of depositing an insulating film by microwave plasma CVD and a process of performing RIE (reactive ion etching) using nitrogen trifluoride as a reaction gas. Can be formed.

[0017]

As a first example of the embodiment of the present invention will be described with reference to FIG. 1 showing a plasma CVD apparatus used for the growth of the SiO _2.

The plasma CVD apparatus comprises a growth chamber 7, TEOS
It comprises a plasma chamber 8 and an N ₂ O plasma chamber 9. An upper electrode 10 and a lower electrode 11 are provided in the growth chamber 7.
And a microwave oscillator 12 is connected to the TEOS plasma chamber 8 and the N ₂ O plasma chamber 9, respectively.

A sample wafer 13 having a trench with a large aspect ratio is arranged on the lower electrode 11 in the growth chamber 7. A blocking capacitor (capacitor) 15 and a high-frequency oscillator 14 are connected to the lower electrode 11 in series. In order to arbitrarily control the pressure in the growth chamber 7, a vacuum pump 21 is provided below.

First, the MFC from the TEOS tank 16
(Mass flow controller) 100 sccm by 17
Is introduced into the TEOS plasma chamber 8. The TEOS plasma chamber 8 has a microwave oscillator 12
To apply 2.4 GHz, 500 W microwave from
Transform TEOS into plasma efficiently.

Meanwhile, introducing N ₂ O with a flow rate controlled to 25sccm by the N ₂ O gas cylinder 18 MFC17 to N ₂ O plasma chamber 9. A microwave of 2.4 GHz and 500 W is applied from the microwave oscillator 12 to the N ₂ O plasma chamber 9 to efficiently turn N ₂ O into plasma.

NF _{3 from} cylinder 19 by MFC17
NF _3, whose flow rate is controlled to 0 sccm, is introduced into the growth chamber 7 through countless introduction holes formed in the surface of the upper electrode 10. The pressure in the growth chamber 7 is controlled to 1 × 10 ⁻² Pa by a valve (not shown) attached to the vacuum pump 21. At this time, the TEOS plasma chamber 8 and the N ₂ O plasma chamber 9
A pressure difference is generated between the silicon and the growth chamber 7, and the active species mainly composed of silicon generated in the TEOS plasma chamber 8 and N ₂
Active chemical species centered on oxygen radicals generated in the O plasma chamber 9 are transported into the growth chamber 7.

The plasma generated in the TEOS plasma chamber 8 contains a large amount of organic species mainly composed of an ethylalkoxy group (C ₂ H ₅ O—). If introduced as it is, contamination with organic chemicals spreads on the side wall of the growth chamber 7. Therefore, in order to condense and remove organic chemicals near the outlet of the TEOS plasma chamber 8, an electronic cooling mechanism 20 maintained at 5 ° C. is provided. The substance condensed and removed by the electronic cooling mechanism 20 is mainly ethanol (C ₂ H _5).
OH).

The TEOS plasma and the N ₂ O plasma introduced into the growth chamber 7 collide with the NF ₃ molecules moving downward, and the sample wafer 1 placed on the lower electrode 11
3 is transported to the surface. The lower electrode 11 has a heater (not shown) for heating the sample wafer 13 to 370 ° C.
Is embedded. TE reaching the sample wafer 13
The OS plasma and N ₂ O plasma react with the help of thermal energy to form silicon dioxide (SiO ₂ ).

In the CVD of SiO ₂ using TEOS, the rate-determining step of the reaction is not a gas phase reaction but a surface reaction. Moreover, a polymer (intermediate product) is generated on the surface by the polymerization of TEOS plasma, and flows in a liquid state when it is adsorbed on the wafer surface. Therefore, the step coverage is remarkably superior to that of SiH ₄ based CVD. Is a feature.

Further, in a large trench having an aspect ratio of 5: 1 or more, the wraparound of TEOS plasma and N ₂ O plasma to the bottom becomes worse, and a portion having a high growth rate and a portion having a small growth rate are generated. Causes an overhang that increases the film thickness.

[0027] Therefore after the growth of the short SiO ₂ in the microwave plasma CVD method, a SiO ₂ of greater were part of the growth rate is etched back by RIE. By repeating this growth and etchback, an insulating film with good step coverage can be formed.

Specifically, microwave plasma C for 10 seconds
SiO ₂ is grown on the surface of the sample wafer 13 by the VD method. After that, the output of the microwave oscillator 12 is stopped for 5 seconds.

When the output of the microwave oscillator 12 is stopped, the generation of the plasma in the TEOS plasma chamber 8 and the N ₂ O plasma chamber 9 is interrupted. T from TEOS plasma chamber 8
EOS molecules are introduced from the N ₂ O plasma chamber 8 into the growth chamber 7 as they are.

However, since the electron cooling mechanism 20 is provided at the outlet of the TEOS plasma chamber 8, TEOS molecules are condensed and hardly reach the inside of the growth chamber 7. Therefore, only the molecules of NF ₃ and N ₂ O exist in the growth chamber 7. Therefore, the high-frequency oscillators 14 to 13.
A high frequency of 56 MHz and 300 W is applied to the lower electrode 11.

Since the upper electrode 10 is grounded, the parallel plate electrode 1 composed of the upper electrode 10 and the lower electrode 11
Between 0 and 11, a plasma of a mixed gas of NF ₃ and N ₂ O is generated. In plasma, electrons flow to the upper electrode 10 which is an anode because the mobility of electrons is much larger than the mobility of ions.

As a result, a current flows between the two electrodes 10 and 11, and charges are stored in the blocking capacitor 15. When charge is accumulated in the blocking capacitor 15 while a high-frequency voltage is applied between the electrodes 10 and 11, a cathode fall occurs, and the lower electrode 11
An ion sheath layer is formed in the vicinity of the surface. In the ion sheath layer, active ions mainly composed of NF ₂₊ are accelerated by a vertical electric field, and RIE proceeds. In RIE, chemical etching by active radicals in plasma is performed simultaneously with physical etching by cations accelerated in the vertical direction.

SiO ₂ is etched by the following formula using fluorine radicals (F ^* ) in NF ₃ plasma.

SiO ₂ + 4F ^* → SiF ₄ ↑ + O ₂ (1) The SiO ₂ grown in the trench having a large aspect ratio is converted to R
Etch back by IE, Si on the surface of sample wafer
O ₂ is removed by physical etching, the corner of the SiO ₂ good trenches wraparound of the reaction gas are removed by chemical etching. As in the case of the plasma CVD method, the etching rate becomes lower at the bottom of the trench where the flow of the reaction gas is poor.

After performing RIE for 5 seconds and etching back SiO ₂ , the output of the high-frequency oscillator 14 is stopped. Next, the output of the microwave oscillator 12 is applied for 10 seconds to perform microwave plasma CVD to grow SiO ₂ . After that, the SiO ₂ is etched back again for 5 seconds, and then the operation of growing SiO ₂ for 10 seconds is repeated.
The time schedule of the microwave oscillator 12 at this time is shown in FIG. 2A, and the time schedule of the high-frequency oscillator 14 is shown in FIG.

When microwave plasma CVD is performed for 10 seconds, the film thickness of SiO ₂ growing on the surface of the sample wafer and the corner of the trench having the highest growth rate is 20 n.
m. The thickness of SiO ₂ grown on the bottom of the trench having the lowest growth rate is 10 nm.

On the other hand, when RIE is performed for 10 seconds, SiO ₂
Is etched back to a depth of 10 nm. Therefore, 10 nm of SiO ₂ grows at the corner of the trench every cycle of microwave CVD and RIE etchback,
Conformable growth in which 10 nm of SiO ₂ grows on the bottom surface of the trench is realized.

By alternately repeating microwave plasma CVD and RIE etch back for 50 cycles,
It can be seen that SiO ₂ can be embedded in a trench having an opening diameter of 1 μm and a depth of 5 μm. As shown in FIG. 3C, the trench can be completely filled with SiO ₂ without performing the reflow by the high-temperature heat treatment.

Further, the SiO ₂ grown on the surface other than the trench opening can be etched by continuous RIE. That is, as shown in the time schedule of FIG. 2B, after the microwave plasma CVD and the RIE etchback are repeated for 50 cycles, the RIE etchback is continuously performed for 250 seconds, and the thickness grown on the surface other than the trench opening is obtained. 0.5 μm of SiO ₂ is entirely removed.

Conventionally, trenches are buried by insulating film growth, high temperature glass reflow, and etch back. In this embodiment, a series of microwave plasma CVD and RI
The SiO ₂ can be buried without causing voids (voids) in the trench by the E-etchback, and other SiO ₂ deposited on the surface of the epitaxial layer can be removed.

By burying the trenches without high-temperature reflow treatment, crystal defects did not occur, the buried layer did not rise, and the device characteristics did not deteriorate.

Next, as a second embodiment of the present invention, Si
Growth of ₃ N ₄ will be described with reference to FIG.

In this embodiment, N ₂ O cylinder 18 is replaced with N
Install H ₃ cylinder. Of NH ₃ 20sccm which was controlled by mass flow _over the controller 17 is introduced into the plasma chamber 9.

2.4 MHz from the microwave oscillator 12,
When a microwave of 500 W is generated, a Si ₃ N ₄ (silicon nitride) film grows on the sample wafer 13 in the growth chamber 7.

The Si ₃ N ₄ film is chemically etched by the following reaction in the reactive ion etching using fluorine radicals (F ^* ).

Si ₃ N ₄ + 12F ^* → 3SiF ₄ ↑ + 2N ₂ ↑ (2) The sample wafer 13 is heated to 370 ° C., and the cycle of microwave plasma CVD and RIE etch-back is repeated to form Si in the trench having a large aspect ratio. _Three
N ₄ can be embedded. Since Si ₃ N ₄ has better moisture resistance and insulation resistance than SiO ₂ , it is mainly used as an interlayer insulating film for multilayer electrode wiring. In this embodiment, an interlayer insulating film made of Si ₃ N ₄ can be formed without performing high-temperature reflow processing.

Next, a sample wafer in which the first and second embodiments of the present invention are applied to the step of forming the trench isolation region will be described with reference to the cross-sectional views of FIGS.

[0048] First, as shown in FIG. 3 (a), P ^- after forming the N ⁺ -type buried layer 2 -type silicon substrate 1, N ^-
The epitaxial layer 3 is grown.

Next, as shown in FIG. 3B, dry etching is performed using a resist (not shown) as a mask to form a trench 4 and then the resist is removed.

Next, as shown in FIG. 3C, the microwave plasma CVD and the RI of the first or second embodiment are performed.
By repeating the E-etchback cycle, FIG.
As shown in FIG. 4C, SiO ₂ or Si ₃ is formed in the trench 4.
An insulating film 5 made of N ₄ is buried.

As compared with the conventional method of sequentially performing the insulating film growth, the high-temperature glass reflow and the etch back, the number of steps can be greatly reduced. The temperature of the sample wafer was also lowered to 370 ° C., and the problem that the impurities of the N ⁺ type buried layer 2 formed on the P ⁻ type silicon substrate 1 were re-diffused was solved. At the same time, it was possible to solve the problem that defects were introduced into the PN junction formed by the P ⁻ type silicon substrate 1 and the N ⁺ type buried layer 2 to increase the leak current.

[0052]

According to the present invention, microwave plasma CVD using tetraethylorthosilicate, nitrous oxide and ammonia as a reaction gas and RIE etchback using nitrogen trifluoride as a reaction gas are alternately repeated to form SiO _{2 in a} trench having a large aspect ratio. Alternatively, an insulating film made of Si ₃ N ₄ can be buried without generating voids (cavities).

As compared with the conventional method of sequentially performing the growth of the insulating film, the high-temperature glass reflow, and the etch-back, the insulating film can be buried and planarized in a single step, and the manufacturing process can be shortened. did it.

The conventional high-temperature glass reflow process was eliminated, and the temperature of the manufacturing process could be reduced. There is no need to worry about the device characteristics being degraded due to the buried layer rising or crystal defects being introduced. The yield in the device manufacturing process has increased, and the reliability has improved.

[Brief description of the drawings]

FIG. 1 is a schematic view showing a plasma CVD apparatus used in one embodiment of the present invention.

FIG. 2A shows a plasma C used in an embodiment of the present invention.
5 is a graph showing a time schedule of a microwave oscillator of the VD device. (B) is a graph showing a time schedule of the high-frequency oscillator of the plasma CVD apparatus used in one embodiment of the present invention.

FIG. 3 is a cross-sectional view of a sample wafer showing a process of forming a trench isolation region by a plasma CVD apparatus used in one embodiment of the present invention.

FIG. 4 is a cross-sectional view of a sample wafer showing a conventional process of forming a trench isolation region.

[Explanation of symbols]

1 P ^- -type silicon substrate 2 N ⁺ -type buried layer 3 N ^- -type epitaxial layer 4 trench 5 insulating film 5a BPSG film 6 trench corners 7 growth chamber 8 TEOS plasma chamber 9 N ₂ O plasma chamber 10 upper electrode 11 lower electrode Reference Signs List 12 microwave oscillator 13 sample wafer 14 high-frequency oscillator 15 blocking capacitor 16 TEOS tank 17 MFC 18 N ₂ O cylinder 19 NF ₃ cylinder 20 cooling mechanism 21 vacuum pump

Claims (3)

(57) [Claims] 1. A method for forming an insulating film in which a reactive gas comprising tetraethyl orthosilicate, nitrous oxide, ammonia, and nitrogen trifluoride is turned into plasma, and an insulating film is vapor-phase grown on a surface of a semiconductor substrate. 2. A growth chamber provided with a parallel plate electrode comprising a lower electrode on which a semiconductor substrate is set and to which a high-frequency power is applied, and an upper electrode having a nozzle into which nitrogen trifluoride is introduced in a shower shape. A method for forming an insulating film according to claim 1. 3. The method for forming an insulating film according to claim 2, wherein a high frequency power supply whose output can be periodically switched is used.