JP2910453B2 - Bipolar semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a bipolar semiconductor device, and more particularly to a structure of a collector region.

[0002]

2. Description of the Related Art A conventional bipolar semiconductor device will be described with reference to the drawings.

Referring to FIG. 4A, which is a sectional view of a bipolar semiconductor device, a first bipolar transistor constituting a conventional bipolar semiconductor device has a vertical N-type transistor.
This is a PN-type bipolar transistor, and is formed on the surface of an N-type epitaxial layer 3 provided on the surface of a P-type silicon substrate 1 via an N ⁺ -type buried layer 2. The concentration of the N-type impurity in the N-type epitaxial layer 3 is 1 × 10 ¹⁶
cm ^-3 . Each bipolar transistor is insulated and isolated by the element isolation region 13. This element isolation region 13 penetrates the N-type epitaxial layer 3 and the N ⁺ -type buried layer 2 and reaches the P-type silicon substrate 1.
The N-type epitaxial layer 3 surface is formed and the N ⁺ -type collector phosphorus region 17 to reach the base region 5 and the N ⁺ -type buried layer 2 of P-type, the base region 5 surface emitter region 6 of N ⁺ -type Is formed. The N-type collector region of the bipolar transistor includes the N ⁺ -type buried layer 2, the N-type epitaxial layer 3, and the N ⁺ -type collector phosphorus region 17.

The N ⁺ -type collector phosphorus region 17 is formed by, for example, thermal diffusion of phosphorus before forming the base region 5. Since the impurity concentration of the N-type epitaxial layer 3 is low, the N ⁺ -type collector phosphorus region 17 is required to lower the collector series resistance.

The N-type epitaxial layer 3 is covered with a silicon oxide film 7. On the silicon oxide film 7, an N-type polycrystalline silicon resistor 18c made of an N-type polycrystalline silicon film is provided. The N-type polycrystalline silicon resistor 18c is formed by arsenic ion implantation of about 5 × 10 ¹⁴ cm ⁻² , and the sheet resistance of the N-type polycrystalline silicon resistor 18c is about 300Ω / □. N-type polycrystalline silicon resistor 18
A silicon oxide film 8 is formed on the silicon oxide film 7 including the c surface. Openings are formed at predetermined positions of the silicon oxide films 7 and 8. Through these openings, an emitter wiring 9 connected to the emitter region, a base wiring 10 connected to the base region 5, a collector wiring connecting the N ⁺ -type collector phosphorus region 17 and the N-type polycrystalline silicon resistor 18c. 11 and N-type polycrystalline silicon resistor 1
The wiring 12 connected to 8c is formed.

Referring to FIG. 4B, which is a sectional view of a bipolar semiconductor device, a second bipolar transistor constituting a conventional bipolar semiconductor device has a vertical N-type transistor.
It is a PN type bipolar transistor. The second bipolar transistor differs from the first bipolar transistor in that a buried metal region 16b is provided instead of the N ⁺ -type collector phosphorus region 17.
The buried metal region 16b is filled with a metal such as tungsten. Therefore, the collector series resistance of the second bipolar transistor is lower than the collector series resistance of the first bipolar transistor.

[0007]

The first bipolar transistor constituting the above-mentioned conventional bipolar semiconductor device has the following disadvantages. When the N ⁺ -type collector phosphorus region 17 is formed by thermal diffusion, phosphorus diffuses downward in the N-type epitaxial layer 3 and simultaneously in the lateral direction. In order to prevent the diffused phosphorus from coming into contact with the P-type base region 5, the designed position of the N ⁺ -type collector phosphorus region 17 is sufficiently separated from the base region 5 or the N ⁺ -type collector phosphorus region 17. Must be separated by an insulating film. Therefore, in such a bipolar transistor, it is difficult to miniaturize the element.

On the other hand, the second bipolar transistor constituting the above-described conventional bipolar semiconductor device has the following disadvantages. Since the impurity concentration of the N-type epitaxial layer 3 is low, a Schottky junction is formed between the metal filling the buried metal region 16b and the N-type epitaxial layer 3. Therefore, the buried metal region 1
A current path for carrier injection is formed in the N ⁺ -type buried layer 2 from the lateral direction of 6b. This current path corresponds to the base region 5
In order to prevent contact with the buried metal region 16
b must be separated from the base region 5. Therefore, in such a bipolar transistor, it is difficult to miniaturize the element.

[0009]

A feature of the first aspect of the bipolar semiconductor device of the present invention is that an N-type buried layer selectively provided on the surface of a P-type silicon substrate is insulated and separated from the N-type buried layer. An N-type epitaxial layer provided on the buried layer and a P-type epitaxial layer provided on the surface of the epitaxial layer
-Type base region, an emitter region of N type provided in the surface of the base region, and an insulating film provided on the epitaxial layer, the provided position of a predetermined distance from said base region A trench penetrating the insulating film and the epitaxial layer and reaching the buried layer, and containing a high concentration of arsenic formed by a vapor growth method filling the trench.
It was possess an N-type first polycrystalline silicon film, of the groove
At the upper end, it is connected to the first polycrystalline silicon film.
A low-concentration N-type second polycrystalline silicon film provided on the insulating film;
Through the recon film and the second polycrystalline silicon film.
This has an opening reaching the first polysilicon film
And there.

The second aspect of the bipolar semiconductor device of the present invention is as follows.
The feature of the embodiment is that it is selectively provided on the surface of a P-type silicon substrate.
N-type buried layer and the buried layer
An N-type epitaxial layer provided on the
P-type base region provided on the surface of the epitaxial layer
And an N-type emitter provided on the surface of the base region
Region and an insulating film provided on the epitaxial layer.
And the insulating film and the epitaxial
A first groove penetrating the layer and reaching the buried layer is
Being provided at a predetermined distance from the base area
Contains a low concentration of arsenic formed by vapor deposition
N-type polycrystalline silicon film fills the first groove and
Extending over the insulating film, and the polycrystalline silicon
The N-type impurity concentration of the epitaxial film is
Higher than the impurity concentration of the first groove and filling the first groove.
Through the polycrystalline silicon film to
A second groove to be provided, and the second groove
Is filled with a metal film.
is there.

Preferably, the metal film is tungsten.
Film, in which a titanium film, a titanium nitride film and a titanium film are sequentially formed
It is. Alternatively, the main component of the metal film is molybdenum.
Or copper.

[0012]

Next, the present invention will be described with reference to the drawings.

FIG. 1A is a plan view of a bipolar semiconductor device, and FIG. 1 is a cross-sectional view taken along line AA in FIG. 1A.
Referring to (b), the bipolar transistor constituting the bipolar semiconductor device according to the first embodiment of the present invention is a vertical NPN bipolar transistor.
It is formed on the surface of an N-type epitaxial layer 3 provided on the surface of a P-type silicon substrate 1 via a ⁺ -type buried layer 2. The concentration of the N-type impurity in the N-type epitaxial layer 3 is about 1 × 10 ¹⁶ cm ⁻³ . Each bipolar transistor is insulated and isolated by the element isolation region 13. This element isolation region 13 penetrates the N-type epitaxial layer 3 and the N ⁺ -type buried layer 2 and reaches the P-type silicon substrate 1. On the surface of the N-type epitaxial layer 3, P
Type base region 5 and a trench 14 (first region) filled with N ⁺ type polycrystalline silicon film 4a and reaching N ⁺ type buried layer 2.
And an N ⁺ -type emitter region 6 is formed on the surface of the base region 5. This N ⁺ -type polycrystalline silicon film 4a is made of silane (SiH ₄ ) and arsine (AsH).
₃ ) is formed by a vapor phase growth method using The base region 5 contains boron of about 10 ¹⁸ cm ⁻³ , and the emitter region 6 contains arsenic of about 10 ²⁰ cm ⁻³ . The N-type collector region of the bipolar transistor includes the N ⁺ -type buried layer 2, the N-type epitaxial layer 3,
And the N ⁺ -type polycrystalline silicon film 4 a filling the groove 14.

The N-type epitaxial layer 3 is covered with a silicon oxide film 7. On the silicon oxide film 7, an N-type polycrystalline silicon resistor 18a made of an N-type polycrystalline silicon film is provided. This N-type polycrystalline silicon resistor 18a
Covers the upper end of the groove 14. The N-type polycrystalline silicon resistor 18a is formed by ion implantation of arsenic of about 5 × 10 ¹⁴ cm ⁻² , and the sheet resistance of the N-type polycrystalline silicon resistor 18a is about 300Ω / □. A silicon oxide film 8 is formed on silicon oxide film 7 including the surface of N-type polycrystalline silicon resistor 18a. Silicon oxide films 7, 8
An opening is formed at a predetermined position. In particular, at the position where the groove 14 is formed, an opening is provided which penetrates through the silicon oxide film 8 and the N-type polycrystalline silicon resistor 18a and reaches the N ⁺ -type polycrystalline silicon film 4a. Via these openings, the emitter wiring 9 connected to the emitter region 6, the base wiring 10 connected to the base region 5,
A collector wiring 11 for connecting N ⁺ -type polycrystalline silicon film 4a to one end of N-type polycrystalline silicon resistor 18a;
Wiring 1 connected to the other end of type polycrystalline silicon resistor 18a
2 are formed.

Referring to FIG. 1 and FIG. 2 which is a cross-sectional view of the manufacturing process of the bipolar semiconductor device, the bipolar transistor constituting the bipolar semiconductor device of the first embodiment is formed as follows. You.

First, an N ⁺ -type buried layer 2 is selectively formed on the surface of a P-type silicon substrate 1 and a film thickness of 1.0 μm
N-type epitaxial layer 3 having a specific resistance of about 0.1 Ωcm
Is formed, and an element isolation region 13 is formed. Next, a P-type base region 5 is selectively formed by boron ion implantation, and an N-type emitter region 6 is similarly formed by arsenic ion implantation. After a silicon oxide film 7 having a thickness of about 50 nm is formed on the entire surface, a groove 14 as a first groove is formed by anisotropic etching at a position at a predetermined distance from the base region 5. This groove 14 reaches the N ⁺ type buried layer 2 (FIG. 2A).

Next, an N ⁺ -type polycrystalline silicon film 4 is formed on the entire surface by a vapor phase growth method using silane (SiH ₄ ) and arsine (AsH ₃ ). The impurity concentration of this N ⁺ -type polycrystalline silicon film 4 is at least 5 × 10 ¹⁸ cm ⁻³ . Further, since the N ⁺ -type polycrystalline silicon film 4 is N ⁺ -type at the film forming stage and the N-type impurity is arsenic, it can be heat-treated (at most about 800 ° C.) The arsenic contained in the N ⁺ -type polycrystalline silicon film 4 does not diffuse into the base region 5 [FIG.
(B)]. Next, the N ⁺ -type polycrystalline silicon film 4 is etched back, and an N ⁺ -type polycrystalline silicon film 4a filling the trench 14 is formed [FIG. 2 (c)].

Next, a polycrystalline silicon film is formed on the entire surface, and arsenic ions are implanted into the polycrystalline silicon film to form an N-type polycrystalline silicon film. This N-type polycrystalline silicon film is patterned to form an N-type polycrystalline silicon resistor 18a. Subsequently, a silicon oxide film 8 is formed on the entire surface.
Is formed [FIG. 2 (d)]. Next, a predetermined opening is formed, and further, an emitter wiring 9, a base wiring 10, a collector wiring 11, and a wiring 12 are formed. In addition,
The opening for connecting the collector wiring 11 and the N ⁺ -type polycrystalline silicon film 4a has the above-described structure because of the interposition of a high-resistance N-type polycrystalline silicon resistor 18a between them in this connection. [FIG. 1 (a),
(B)].

In the first embodiment, the trench 14 is filled to connect the collector wiring 11 and the N ⁺ type buried layer 2 with N ^+.
Since the type polycrystalline silicon film 4a is N ⁺ type at the film forming stage and the N type impurity is arsenic,
Arsenic hardly diffuses into the base region 5 even in the heat treatment at about ° C. Therefore, the distance between the groove 14 and the base region 5 is the same as that of the conventional N ⁺ -type collector phosphorus diffusion region (FIG. 4).
(Refer to (a)) and the distance between the base region and the base region can be reduced by about 20%, and the device can be easily reduced.

Referring to FIG. 3 which is a sectional view of a bipolar semiconductor device, a bipolar transistor constituting a bipolar semiconductor device according to a second embodiment of the present invention has N N-type polycrystalline silicon film 18b is filled, and this N-type polycrystalline silicon film 18b extends on silicon oxide film 7 to form a resistance element. Is provided with a groove 24 (second groove) reaching the N ⁺ type buried layer 2, and the groove 24 is provided with a buried metal region 16 a.
Other configurations are substantially the same as those of the first embodiment.

The method of forming the N-type polycrystalline silicon film 18b is as follows. After the silicon oxide film 7 is formed on the entire surface and the trench 14 is formed, the entire surface is formed by the same method as the formation of the N ⁺ -type polycrystalline silicon film 4 of the first embodiment (see FIG. 2B). Then, an N-type polycrystalline silicon film is formed. However, the impurity concentration of the N-type polycrystalline silicon film is sufficiently lower than the impurity concentration of the N ⁺ -type polycrystalline silicon film 4, and the sheet resistance of the N-type polycrystalline silicon film is 30%.
It is set to be about 0Ω / □. This N-type polycrystalline silicon film is patterned to form an N-type polycrystalline silicon film 18b. The method of forming an N-type polycrystalline silicon film by forming a non-doped polycrystalline silicon film and thermally diffusing arsenic or ion-implanting the non-doped polycrystalline silicon film in the lateral direction is also necessary. Is not preferred.

The buried metal region 16a is formed by sequentially forming a tungsten film 16aa, a titanium nitride film 16ab, and a titanium film 16ac. Tungsten film 16aa, titanium nitride film 16ab, and titanium film 1
Instead of forming the buried metal region 16a by 6ac, it may be formed by a metal film containing molybdenum or copper as a main component.

The collector series resistance of the second embodiment is:
It is about the same as the collector series resistance of the second conventional bipolar transistor, and lower than the collector series resistance of the first embodiment. In the second embodiment, since the buried metal region 16a is surrounded by the N-type polycrystalline silicon film 18b having a higher impurity concentration than the N-type epitaxial layer 3, the buried metal region 16a and the N-type epitaxial layer 3 No Schottky junction is formed between them. For this reason, the distance between the base region 5 and the groove 14 can be reduced by about 30% as compared with the distance between the conventional N ⁺ -type collector phosphorus diffusion region (see FIG. 4B) and the base region. In addition, the device can be easily reduced in size.

[0024]

A first aspect of the bipolar semiconductor device of the present invention as described in the foregoing, the region connected to the collector line and the N ⁺ -type buried layer, N ⁺ -type buried layer that the N-type epitaxial layer surface And a N ⁺ -type polycrystalline silicon film at the growth stage filled in the first groove. The second aspect of the bipolar semiconductor device of the present invention
In the aspect, the connection region may include the first groove and the first groove.
And N-type polycrystalline silicon filled in the groove, a second groove provided in the N-type polycrystalline silicon film, and a buried metal region formed in the second groove. For this reason, according to the present invention, the distance between the P-type base region and the connection region is shorter than in the related art, and the device can be easily reduced.

[Brief description of the drawings]

FIG. 1 is a plan view and a sectional view of a first embodiment of the present invention.

FIG. 2 is a cross-sectional view of the manufacturing process of the first embodiment.

FIG. 3 is a sectional view of a second embodiment of the present invention.

FIG. 4 is a cross-sectional view of a conventional bipolar semiconductor device.

[Description of Signs] 1 P-type silicon substrate 2 N ⁺ -type buried layer 3 N-type epitaxial layer 4, 4a N ⁺ -type polycrystalline silicon film 5 Base region 6 Emitter region 7, 8 Silicon oxide film 9 Emitter wiring 10 Base wiring 11 Collector wiring 12 Wiring 13 Element isolation region 14, 24 Groove 15, 18b N-type polycrystalline silicon film 16a, 16b Buried metal region 16aa Tungsten film 16ab Titanium nitride film 16ac Titanium film 17 N ⁺ type collector phosphorus region 18a, 18c N-type poly Crystalline silicon resistors

Claims (4)

(57) [Claims] 1. An N-type buried layer selectively provided on a surface of a P-type silicon substrate, an N-type epitaxial layer provided on the buried layer by being insulated and separated, and an N-type epitaxial layer provided on a surface of the epitaxial layer. A P-type base region provided, an N-type emitter region provided on a surface of the base region,
The epitaxial and an insulating film provided on layer, filling said base said insulation film provided on the position of the region from the predetermined distance and the groove of the epitaxial layer through reaching the buried layer, the grooves to is formed by vapor deposition possess an N-type first polycrystalline silicon film containing a high concentration of arsenic, into contact with the first polycrystalline silicon film at the upper end of said groove
A low-concentration N-type second
Penetrating through the polycrystalline silicon film and the second polycrystalline silicon film
An opening reaching the first polycrystalline silicon film . Selectively provided wherein a surface of the P-type silicon substrate
Separated from the N-type buried layer,
An N-type epitaxial layer provided on the layer;
A P-type base region provided on the surface of the axial layer;
An N-type emitter region provided on the surface of the base region;
An insulating film provided on the epitaxial layer.
And penetrating the insulating film and the epitaxial layer,
A first groove reaching the buried layer is located from the base region.
It is provided at regular intervals, and is formed by vapor phase epitaxy and contains a low concentration of arsenic.
Type polycrystalline silicon film fills the first groove, and
Extending over the edge film, and further,
N-type impurity concentration in the epitaxial layer is N-type impurity
Concentration, and penetrates the polycrystalline silicon film filling the first groove.
And a second groove reaching the buried layer is provided.
And that the second groove is filled with a metal film.
And a bipolar semiconductor device. 3. The bipolar semiconductor device according to claim 2 , wherein said metal film comprises a laminated film in which a tungsten film, a titanium nitride film, and a titanium film are sequentially formed. 4. The bipolar semiconductor device according to claim 2 , wherein a main component of said metal film is molybdenum or copper.