JP2908430B1 - Host processor monitoring apparatus and monitoring method for multiprocessor system - Google Patents

Abstract

Provided is a host processor monitoring device for reliably detecting an operation stop state due to a failure of a host processor in a multiprocessor system. A host processor monitoring device in a multiprocessor system having a plurality of processors sharing a shared device and a communication mechanism for communicating between the processors is disclosed. Here, each processor has an exclusive lock mechanism. Further, when the operation is started, each processor sets the status data in the shared device to "in operation", and sends a message indicating that the own processor is operating to another message at regular intervals via the communication mechanism. Means for broadcasting to the processor. When each processor cannot receive a message from all other operating processors, it attempts to lock the exclusive control mechanism of each other processor that cannot receive the message, and when the exclusive control mechanism can lock, the processor that cannot receive the message. Has means for executing recovery processing assuming that termination or failure has occurred, and continuing monitoring of processors that cannot receive telegrams when locking is not possible.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a monitoring device and a monitoring method for a host processor in a loosely-coupled multiprocessor system, and more particularly to a monitoring device and a monitoring device for a host processor for confirming stoppage of operation of a host processor using an exclusive control mechanism. About the method.

[0002]

2. Description of the Related Art In recent years, improving the reliability of an information processing system has become an important issue. The multiprocessor system includes a plurality of host processors as shown in FIG. 5, and can cope with the above problem. The multiprocessor system having such a configuration is an information processing system that can realize high reliability particularly in online transaction processing and virtual destination control.

For example, in the case of virtual destination control for storing a message to a terminal, when a registration request for a virtual destination message is received, the message is output to a terminal connected to the multiprocessor system. When the error occurs, the output processing can be replaced by another host processor and continued without relying on humans. Japanese Patent Application Laid-Open No. 63-316251 discloses a multiprocessor system in which an extended storage device composed of a semiconductor device is used in place of a magnetic disk device normally used in common, thereby enabling high-speed access. There is.

In a multiprocessor system, a method of recognizing that a failure has occurred in an arbitrary host processor which is a component of the system has been retrospectively investigated in a past patent application. The host processor is designed to update a specific area of the shared auxiliary storage device between the host processors at fixed time intervals, and if the specific area is not updated for a certain time or more, a failure occurs in the host processor. There is disclosed a host processor monitoring method which recognizes that:

Japanese Patent Application Laid-Open No. 4-219860 discloses an exclusive control method for managing shared resources between host processors. Information indicating that the shared resources are being updated / referenced on a shared file. In a multiprocessor system of a placing method, as a method for coping with a path failure between the host processor and the multisystem control processor, a monitoring timer is placed corresponding to each host processor,
The host processor monitors whether or not the processing of the host processor is completed within a predetermined time based on the time from the start to the reset of the monitoring timer, and when a failure occurs, notifies the other host processor of the failed host and performs recovery processing. A scheme is disclosed.

Further, Japanese Patent Application Laid-Open No. 4-340649 discloses that each host processor detects the occurrence of its own fault and reports this to a down monitoring means provided in one of the host processors via a down notification means. Notify,
There is disclosed a host processor monitoring method for notifying another host processor again from the down notification means.

[0007]

However, JP-A-63-193260 and JP-A-4-21986 are known.
The prior art disclosed in Japanese Patent Publication No. 0 has the following problems. That is, when the host processor configuring the multiprocessor system has a high load, the specific area of the shared auxiliary storage device between the host processors cannot be updated, and it is recognized that a fault has occurred in the high-load host processor. That is.

As described above, a multiprocessor system is a system in which, when a failure occurs in a host processor for which a request has been made, processing is replaced by another host processor and continued without relying on manual labor. When the host processor of the multiprocessor system is under heavy load,
If it is mistakenly recognized that a failure has occurred, an unnecessary recovery process is performed in an attempt to substitute the process with another host processor. Conventionally, unnecessary recovery processing increases the load on the host processor that executes the recovery processing and increases the load on the entire multiprocessor system. Further, in the prior art disclosed in Japanese Patent Application Laid-Open No. 4-340649, no countermeasure is taken against a situation in which the self-diagnosis by each host processor does not succeed and the occurrence of a failure is overlooked.

The present invention has been made in view of the above-mentioned problems in the conventional host processor monitoring method, and the multiprocessors of the entire multiprocessor system monitor each other's other multiprocessor systems, and monitor the host processor. It is an object of the present invention to provide a host processor monitoring method capable of reliably detecting an operation stop state including a failure occurrence.

[0010]

According to an embodiment of the present invention, there is provided a multiprocessor having a plurality of processors sharing a shared device and a communication mechanism for communicating between the processors. The system, wherein each processor, when the operation is started, sets the status data in the shared device to operating when the operation is started, and transmits a message indicating that the own processor is operating to the communication. Means for broadcasting to other processors at regular time intervals via a mechanism, and exclusive control of each of the processors not receiving a message when messages from all the operating processors among the other processors are not received. Attempt to lock the mechanism,
When the exclusive control mechanism can be locked, the processor performs a recovery process assuming that the processor is terminated or a failure has occurred, and when the lock cannot be performed, the processor monitoring device in the multiprocessor system includes a unit that continues monitoring the processor. Provided.

Here, in the processor monitoring device in the multiprocessor system, when each of the processors starts operation, attempts to receive a message via the communication mechanism, and when the message can be received, the processor monitors the message. It is possible to identify that the source processor is in operation.

Further, in the processor monitoring device in the multiprocessor system, each of the processors refers to the status data in the shared device for all the other processors when the operation is terminated, and all the other processors refer to the status data in the shared device. In the initial state, the termination processing of the entire multiprocessor system is performed, and if at least one of the other processors is in operation, the termination processing of each processor can be performed.

A plurality of processors sharing a shared device, a communication mechanism for communicating between the processors, and each processor, when operating in a multiprocessor system having an exclusive lock mechanism, when the shared device is started, Setting the status data in operation to operating; transmitting a message indicating that the own processor is operating to another processor at regular time intervals via the communication mechanism; and Attempting to lock the exclusive control mechanism of each of the processors for which no message is received when no message is received from all of the operating processors among the processors, and when the exclusive control mechanism can lock, the processor is terminated or Perform recovery processing assuming that a failure has occurred, and continue monitoring the processor when locking is not possible Processor monitoring method in a multiprocessor system comprising that steps are provided.

Here, in the processor monitoring method in the multiprocessor system, when each of the processors starts operation, an attempt is made to receive a signal from another processor via the communication mechanism. When possible, the method may further comprise the step of identifying that the source processor of the telegram is operational.

Further, in the processor monitoring method in the multiprocessor system, when each processor terminates its operation, the processor refers to state data in the shared device for all processors other than its own processor, When all the other processors are in the initial state, the process further includes a step of performing a termination process of the entire multiprocessor system, and performing a termination process of the own processor if at least one of the other processors is in operation. It is possible to

Also, when a plurality of processors sharing a shared device, a communication mechanism for communicating between them, and each processor are operated in a multiprocessor system having an exclusive lock mechanism, when the shared device is started, Setting the status data in operation to operating; transmitting a message indicating that the own processor is operating to another processor at regular time intervals via the communication mechanism; and Attempting to lock the exclusive control mechanism of each of the processors for which no message is received when no message is received from all of the operating processors among the processors, and when the exclusive control mechanism can lock, the processor is terminated or Perform recovery processing assuming that a failure has occurred, and continue monitoring the processor when locking is not possible Storage medium is provided having recorded thereon a program for executing that step.

Here, in the storage medium storing the program, when each of the processors starts operation,
Attempting to receive a telegram from another processor via the communication mechanism and, if the telegram is successfully received, identifying that the source processor of the telegram is in operation can be further executed. It is.

Further, in the storage medium storing the program, each of the processors, when ending the operation,
Referring to state data in the shared device for all other processors; and, when all of the other processors are in the initial state, perform a termination process of the entire multiprocessor system, and perform one of the other processors.
If one or more are in operation, it is possible to further execute a step of performing a termination process of each processor.

[0019]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention locks a shared exclusion mechanism between host processors, monitors the state of each host processor constituting a multiprocessor system, and manages the operation state of the entire multiprocessor system. To provide.

Hereinafter, embodiments of the present invention will be described with reference to the drawings. FIG. 1 is a diagram showing a configuration of a multiprocessor system employing a host processor monitoring method according to an embodiment of the present invention. In FIG. 1, a multiprocessor system is a system program control mechanism for performing exclusive control of resources available between host processors 1 and 2 operating under program control and host processors constituting the multiprocessor system. A shared exclusion control mechanism 31 corresponding to each host processor,
32, a communication mechanism 4 between host processors, which is a system program control mechanism for transmitting and receiving messages between host processors constituting the multiprocessor system,
This is a resource shared between the host processors constituting the multiprocessor system, and is constituted by a shared auxiliary storage device 5 in which the host processor performs reference updating for state management.

The host processor 1 includes a host start unit 11, a remote host monitoring unit 12, and a host end unit 13, and is capable of accessing a storage medium 15 via a drive 14. Further, the host processor 2
It includes a host start unit 21, another host monitoring unit 22, and a host termination unit 23, and can access a storage medium 25 via a drive 24. Further, the shared auxiliary storage device 5 includes, as a first control area, an area 51 for recording the state of the host processor 1 and an area 52 for recording the state of the host processor 2. Region 51 and region 52
Is information in the host processor monitoring record in the shared auxiliary storage device 5.

In the multiprocessor system shown in FIG. 1, two host processors 1 and 2 are shown as host processors for convenience of explanation. However, in general, the number of host processors is arbitrary and a plurality of host processors are provided. The area for recording the state is set in correspondence with these host processors constituting the multiprocessor system. The states of the host processor include an "initial state" and an "operating state".

The host start unit 11 performs processing necessary for starting monitoring between host processors in the multiprocessor. The host start unit 11 operates when the host processor constituting the multiprocessor is started, locks the shared exclusion mechanism 31 for the own host processor, and changes the state 51 of the own host processor in the shared auxiliary storage device 5 from the initial state to the operating state. State, and receives the operating message transmitted by another host processor from the inter-host processor communication mechanism 4, recognizes that the other host processor has been activated by the received message, and notifies the other host processor. In addition to starting the failure monitoring, all the operating messages for notifying all the host processors constituting the multiprocessor system via the inter-host processor communication mechanism 4 that the host processor has been activated are transmitted to the host processor. It is transmitted to the mechanism 4 at regular intervals. In the above operating message,
Stores the identifier of the own host processor.

The other host monitoring unit 12 has a function for the host processor 1 to detect a failure of another host processor. The other-host monitoring unit 12 operates when the above-described in-operation message has not been received for a certain period of time, and attempts to lock the shared exclusion mechanism 32 for the host processor corresponding to the host processor identifier that has not been received. In the above lock attempt, if the lock is successful, it is considered that the host processor has terminated or a failure has occurred, and a recovery operation is performed. If the lock could not be achieved, the processor is operating under a high load, and it is assumed that the in-operation message could not be transmitted, and the monitoring is simply continued.

The host termination unit 13 has a function of stopping monitoring of the host processor by another host processor when terminating the host processor constituting the multiprocessor. The host termination unit 13 operates when the host processor constituting the multiprocessor terminates,
State 51 of own host processor in shared auxiliary storage device 5
Is changed from the “operating state” to the “initial state”, and the shared exclusion mechanism 31 for the host processor is unlocked.
Thereafter, by not transmitting the operating message from the own host processor, the failure monitoring by the other host processors is stopped. Host start unit 21, other host monitoring unit 22,
The host end unit 23 performs the same control as the host start unit 11, the other host monitoring unit 12, and the host end unit 13, respectively.

FIGS. 2, 3 and 4 are flowcharts showing the operation of the host processor monitoring system according to the embodiment of the present invention. Hereinafter, referring to FIG. 1, FIG. 2, FIG.
The operation of the host processor monitoring method according to the embodiment of the present invention will be described with reference to the flowchart of FIG.

First, the operation of the host start units 11 and 21 will be described with reference to the flow of FIG. 2. Hereinafter, in the present embodiment, the case where the host processor is started by inputting a command, for example, the host processor 1 Is started by inputting a command, and after the start of the host processor 1 is completed, the host processor 2 is started by inputting a command. During this time, the host processors monitor each other for faults, and the multiprocessor system is operated. The operation in the case is shown.

First, in step 111, the host start unit 11 of the host processor 1 locks the shared exclusion mechanism 31 for the host processor 1. At step 112,
The state 51 of the host processor 1 of the shared auxiliary storage device 5 is changed from the “initial state” to the “operating state”. Step 11
At step 3, an attempt is made to receive a running message addressed to the own host processor transmitted from another host processor via the inter-host processor communication mechanism 4. This operating message stores the identifier of the transmission source host processor.

If it is determined in step 114 that the active message addressed to the host processor has been successfully received, the process proceeds to step 115.
Is executed, and when it fails, step 115 is skipped. Here, since the host processor 2 has not been started, there is no information from the other host processors received by the host processor 1 and step 115 is skipped. Thereafter, in step 116, the host processor 1
Transmits the operating message of the host processor 1 to all other host processors using the inter-host processor communication mechanism 4. In this operating message, the identifier of the host processor is stored in advance. However, in this case, since the host processor 2 has not been started, the transmission processing to the host processor communication mechanism 4 results in an error. This transmission processing is performed at regular intervals.

On the other hand, the host start unit 21 of the host processor 2 locks the shared exclusion mechanism 32 for the host processor 2 in step 111. In step 112, the state 52 of the host processor 2 of the shared auxiliary storage device 5 is changed from the "initial state" to the "operating state". Step 113
Then, an attempt is made to receive the in-operation message sent to the host processor from the host processor 1 by the communication mechanism 4 between the host processors of the system. This operating message stores the identifier of the transmission source host processor.

If it is determined in step 114 that the active message addressed to the host processor has been successfully received, step 115
Is executed, and when it fails, step 115 is skipped. As a result, the host processor 2 recognizes that the host processor 1 is running, and executes step 115. In step 115, the host processor identifier of the host processor 1 is stored in the memory of the host processor 2. At step 116, the host processor 2
Transmits the operating message of the host processor 2 to all other host processors using the inter-host processor communication mechanism 4. As a result, the host processor 1 receives the operating message from the inter-host processor communication mechanism 4, recognizes that the host processor 2 has been activated, and proceeds to step 11
In step 5, the host processor identifier of the host processor 2 is stored in the memory of the host processor 1.

Next, the operation of the other host monitoring units 12 and 22 will be described with reference to the flow of FIG. 3. Hereinafter, in this embodiment, when a failure occurs in the host processor, for example,
An operation when a failure occurs in the host processor 2 or processing is delayed because the host processor 2 is operating under a high load, and the host processor 1 cannot receive the operating message of the host processor 2 will be described. As described above, the host processor 1 receives the operating message transmitted by the host processor 2 at regular intervals by the host start unit 11 via the inter-host processor communication mechanism 4 of the system, and the host processor 2 is activated. The host processor identifier of the host processor 2 is stored in the memory as information indicating that the host processor 2 is operating.

First, the other host monitoring unit 12 of the host processor 1 stores the message in operation in the memory of the host processor 1 when the operating message cannot be received from the inter-host processor communication mechanism 4 for a predetermined time in step 121. Attempt to lock the shared exclusion mechanism 32 for the host processor 2 corresponding to the set host processor identifier. Step 1
22, the shared exclusion mechanism 32 for the host processor 2
Are locked, steps 123 and 124 are executed. If it cannot be locked, it is recognized that transmission of the operating message is taking a long time due to the high load of the host processor or the like, and the steps 123 and 124 are skipped and the monitoring by the other host monitoring unit 12 is simply continued. .

At step 123, the state 52 in the shared auxiliary storage device 5 of the host processor 2 corresponding to the host processor identifier in the memory from which the in-operation message could not be received.
See If the "initial state" is recorded in the state 52, the host processor 2 recognizes that the processing has ended. If the "operational state" is recorded, the host processor 2 recognizes that a failure has occurred in the host processor 2. A continuation process or a recovery process of the process interrupted by the termination or failure of the host processor 2 is performed. In step 124, the shared exclusion mechanism 32 for the host processor 2 corresponding to the host processor identifier on the memory from which the in-operation message could not be received is unlocked, and the host processor identifier stored on the memory is cleared. The other host monitoring unit 22 performs the same operation as the operation of the other host monitoring unit 12 shown in the above flow.

Finally, the operation of the host termination units 13 and 23 will be described with reference to the flow of FIG. 4. Hereinafter, in the present embodiment, when a termination command is input to the host processor, for example, the host processor 1 After the host processor 1 terminates as a result of the termination command
An operation when a termination command is input to the host processor 2 to terminate the multiprocessor system will be described. As described above, the host processor 1 now has the host starting unit 11
Locks the shared exclusion mechanism 31 for the host processor 1 and sets the state 5 of the host processor 1 in the shared auxiliary storage device 5 to
1 is in the “operating state”. Host processor 2
Locks the shared exclusion mechanism 32 for the host processor 2 by the host start unit 21 and sets the state 52 of the host processor 2 of the shared auxiliary storage device 5 to the “operating state”.

When a termination command is input to the host processor 1, the host termination unit 13 of the host processor 1
First, in step 131, the shared auxiliary storage device 5 is referred to. In step 132, it is checked whether there is any host processor other than the own host processor in which the “operational state” is written. As a result of the check, if there is an “operating state”, steps 133 and 134 are executed, and only the operation of the own host processor is ended. "In operation"
If not, steps 136 and 137 are executed, and the entire multiprocessor system ends.

Now, since the state 52 of the host processor 2 of the shared auxiliary storage device 5 is "operating state", the host processor 1 changes the state 51 of the host processor 1 in the shared auxiliary storage device 5 to "initial state" in step 133. State ”.
Thereafter, in step 134, the shared exclusion mechanism 31 for the host processor 1 is unlocked. As a result of the above series of processing, the host processor 2 can detect the end of the host processor 1 by the above-described mechanism. By continuing the interrupted processing, the operation of the multiprocessor system is continued.

When a termination command is input to the host processor 2 after termination of the host processor 1, the host termination unit 23 of the host processor 2 has no operating host processor other than its own host processor. That is, step 1
At 32, it is determined that there is no host processor other than the own host processor in which the “operating state” is written. Accordingly, it is recognized that the entire multiprocessor system is to be terminated, and after waiting for the processing being executed to be completed, in step 136, the termination processing of the entire multiprocessor system is performed. Finally, in step 137, the shared exclusion mechanism 32 for the host processor 2 is unlocked.

In this embodiment, as information for detecting the possibility of a failure of another host processor,
Instead of using a message via a communication mechanism between host processors, which has a communication function between host processors, a second control area (not shown) is installed in the shared auxiliary storage device, similarly to the prior art. However, it is also possible to adopt a method in which information corresponding to the above-described operating message is transferred between the host processors in the second control area. However, in order to adopt this method and to complete the embodiment of the present invention, the exclusive control described above is not performed in units of the shared auxiliary storage device, but is performed in units of areas in the shared auxiliary storage device in detail. It needs to be a method that can do it.

The exclusive control described above does not necessarily need to be performed only on resources shared between host processors, and resources exclusively allocated to one host processor are assigned to the resources. Exclusion control between tasks when used under competition of multitasks started in the host processor is also included in the category. Further, the above-described exclusive control is such that when a failure occurs in the locked host processor, the lock is automatically released.

[0041]

As described above, the host processor monitoring method according to the present invention can reliably monitor the occurrence of an abnormality in a host processor constituting a multiprocessor system without relying on humans. In particular, in the past, there was a case where the host processor was erroneously recognized as having an abnormality when the load was high, but such a situation can be completely prevented.

When the operation of the host processor is stopped, it is possible to reliably determine whether the cause is a failure or the termination of the host processor. As described above, the continuation of the processing of the host processor in the operation stopped state and the recovery processing can be reliably performed by another host processor.

[Brief description of the drawings]

FIG. 1 is a diagram showing a configuration of a multiprocessor system having a host processor monitoring device according to an embodiment of the present invention.

FIG. 2 is a flowchart showing an operation of a host start unit in the host processor monitoring device according to the embodiment of the present invention.

FIG. 3 is a flowchart illustrating an operation of another host monitoring unit in the host processor monitoring device according to the embodiment of the present invention.

FIG. 4 is a flowchart showing an operation of a host termination unit in the host processor monitoring device according to the embodiment of the present invention.

FIG. 5 is a diagram illustrating a configuration of a conventional general multiprocessor.

[Explanation of symbols]

 1, 2 host processors 31, 32 shared exclusion control mechanism 4 communication mechanism between host processors 5 shared auxiliary storage device 11, 21 host start unit 12, 22 other host monitoring unit 13, 23 host end unit 14, 24 drive 15, 25 storage Medium 51, 52 Area for recording the status of the host processor

Claims (9)

(57) [Claims] 1. In a multiprocessor system having a plurality of processors sharing a shared device and a communication mechanism for communicating between the processors, each processor includes an exclusive control mechanism and its own processor when operation is started. Means for broadcasting a message indicating that the processor is in operation to the other processors at regular time intervals via the communication mechanism, and receiving messages from all the operating processors among the other processors. If not, attempt to lock the exclusive control mechanism of each processor that does not receive the message.If the exclusive control mechanism can be locked, the processor performs recovery processing assuming that a termination or failure has occurred. Processor monitoring device in a multiprocessor system comprising means for continuing monitoring of the processor 2. When each processor starts operation, it tries to receive a message via the communication mechanism, and when the message can be received, it identifies that the source processor of the message is in operation. 2. The method according to claim 1, further comprising:
Processor monitoring device in a multiprocessor system according to claim 1. 3. The processor sets status data in the shared device to a status indicating that the device is in operation when the operation is started, and changes the status data in the shared device to another status when the operation is terminated. Referring to all the processors, when all the other processors are in the initial state, the entire multiprocessor system is terminated, and if at least one of the other processors is in operation, the processing of each of the processors is performed. 3. The processor monitoring device in a multiprocessor system according to claim 1, further comprising means for performing an end process. 4. In a multiprocessor system having an exclusive control mechanism, a plurality of processors sharing a shared device, a communication mechanism for communicating between the processors, and when the operation is started, the own processor Broadcasting a message indicating that it is in operation to another processor at regular intervals via the communication mechanism, and not receiving messages from all of the other processors in operation among the other processors Attempting to lock the exclusive control mechanism of each processor for which no message is received, and when the exclusive control mechanism can be locked, the processor performs recovery processing assuming that a termination or failure has occurred, and when the lock cannot be performed. Processor in a multiprocessor system comprising the step of continuing to monitor the processor Monitoring method 5. When each processor starts operation, the processor attempts to receive a signal from another processor via the communication mechanism, and when the signal can be received, the source processor of the signal operates. 5. The method according to claim 4, further comprising the step of identifying that the processor is running. 6. The processor according to claim 1, wherein when the operation is started, each processor sets status data in the shared device to a status indicating that the shared device is operating, and when the operation is terminated, the status data in the shared device is set. A step of referring to all other processors except the own processor, and when all of the other processors are in an initial state, perform termination processing of the entire multiprocessor system, and perform at least one of the other processors in operation. 6. The method according to claim 4, further comprising the step of performing a termination process of the own processor.
A processor monitoring method in a multiprocessor system according to any one of the above. 7. A multiprocessor system having an exclusive control mechanism, a plurality of processors sharing a shared device, a communication mechanism for communicating between the processors, and a processor, when the operation is started, when the operation is started. Broadcasting a message indicating that it is in operation to another processor at regular intervals via the communication mechanism, and not receiving messages from all of the other processors in operation among the other processors Attempting to lock the exclusive control mechanism of each processor for which no message is received, and when the exclusive control mechanism can be locked, the processor performs recovery processing assuming that a termination or failure has occurred, and when the lock cannot be performed. Is a storage medium storing a program for executing a step of continuing monitoring of the processor. 8. When each of the processors starts operation, it attempts to receive a signal from another processor via the communication mechanism, and when the signal can be received, the processor that has transmitted the signal has The storage medium storing the program according to claim 7, further comprising a step of identifying that it is in operation. 9. When each processor starts operation, the processor sets status data in the shared device to a status indicating that the shared device is operating, and when ending the operation, the processor changes the status data in the shared device. A step of referring to all other processors, and when all the other processors are in an initial state, perform a termination process of the entire multiprocessor system, and if at least one of the other processors is in operation, 9. A storage medium storing the program according to claim 7, further comprising a step of performing a termination process of each processor.