JP2896007B2 - Digital camera signal processing circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a digital camera signal processing circuit, and more particularly to, for example, a CCD having a mosaic type color filter or a stripe type color filter.
Converts the output signal from the digital signal into a digital signal and processes it.
The present invention relates to a digital camera signal processing circuit.

[0002]

2. Description of the Related Art Generally, a mosaic type color filter as shown in FIG. 6A is provided on a light receiving surface of a CCD of a single-panel video camera. Light incident on the light receiving surface via the color filter is converted into an electric signal by the CCD. The electric signal corresponding to each color filter is output from the CCD as a dot-sequential image signal mixed for every two consecutive upper and lower pixels so as to correspond to television interlace. For example, in an odd field, the imaging signal of the upper left pixel (R + G + 2B) in FIG. 6B passes through the filter array (R + B and G + B) at the left end of the first and second lines in FIG. 6A. It is formed by the sum of the obtained electric signals. That is, the sum of the electric signals obtained from the filter arrangement of the first line and the second line in FIG.
(B) The upper image pickup signal is formed. Similarly, FIG.
The sum of the electric signals obtained from the filter arrangements of the third line and the fourth line in FIG. 6A forms the imaging signal of the lower pixel in FIG.

In an even field, FIG.
The sum of the electric signals obtained from the filter arrangements of the second line and the third line in FIG. 6A forms the imaging signal of the upper pixel in FIG. 6C, and the fourth line and the fifth line in FIG. The sum of the electric signals obtained from the line filter arrangement is shown in FIG.
(C) The imaging signal of the lower pixel is formed. When two pixels are added to such an imaging signal in the horizontal direction, FIG.
As shown in 1), a low-frequency luminance signal (hereinafter, “Y _L ”)
(2R + 3G + 2B) is obtained. When two pixels are subtracted in the horizontal direction, as shown in FIG.
± (2R−G) or ± (2B−G), which is a line-sequential color component (hereinafter “Cr” or “Cb”), is obtained. Since the signs of the color components Cr and Cb are inverted in a dot-sequential manner, control is performed so that the signs become positive.

Since these color components are line-sequential signals,
It needs to be synchronized. Then, after obtaining an image signal for 3H by synchronizing the image signal from the CCD using two 1H delay elements, three low-frequency luminance components Y _L1 , Y _L2 and Y _L3 , And three color components Cr ₁ ,
Cb ₂ and Cr ₃ or Cb ₁ , Cr ₂ and Cb
Create ₃ . The color components synchronized in this manner are generated according to, for example, the averaging shown in Expression 1.

[0005]

[Number 1] _{Y L = 1/2 (Y} L2 + 1 / 2Y L1 + 1 / 2Y L3) Cr = Cr 2 or _{1/2 (Cr 1 + Cr 3)} Cb = 1/2 (Cb 1 + Cb 3) or Cb ₂ From these three color components, primary color signals R, G, and B are generated according to Equation 2.

[0006]

[Number 2] _{10R = Y L + 4Cr-Cb} 5G = Y L -Cr-Cb 10B = Y L -Cr + 4Cb However, when photographing a uniform bright object,
The electric charge of a pixel provided with a complementary color filter which takes in more light than a green filter is saturated before the electric charge of a pixel provided with the green filter. As a result, CC
D outputs a signal in which the green component is relatively large, different from the actual color component ratio.

More specifically, in a video camera equipped with a CCD having a mosaic type color filter shown in FIG. 7A, when a uniform white subject of R = G = B = 10 is photographed, FIG. ), The level of the pixel provided with the complementary color filter is “20”, and the level of the pixel provided with the green filter is “10”. Now, assuming that the saturation level of each pixel is "10", the pixel provided with the complementary color filter is saturated, so that the level of each pixel is all "10" as shown in FIG. 7C. And
The levels of the signals output from the CCD are all "20" as shown in FIG. 7D, and as shown in FIGS. 7D-1 and 7D-2, Y _L = 40, Cr = 0 and Cb = 0 are calculated. Thereby, the primary color signals R, G
When B and B are calculated, R = 4, G = 8 and B = 4, and the green component is larger than the red component and the blue component.
Therefore, the image becomes greenish (highlight green) as a whole.

[0008]

In order to reduce such highlight green, in a conventional analog camera signal processing circuit, the level of a modulated color signal is changed on the high luminance side using, for example, a clipping circuit. Has been done. On the other hand, in a digital camera signal processing circuit to which the present invention is directed, the concept of such an analog camera signal processing circuit cannot be applied as it is. This is because in the digital camera signal processing in order to change the color component level RGB signal after the gamma correction or (R- Y) - while it is necessary to perform in (B Y), as a luminance signal to be used for its control Is preferably used before gamma correction. If the digital camera signal processing circuit is configured in the same way as the analog signal processing circuit due to such a phase difference, many D flip-flops are required for timing adjustment, and the circuit becomes complicated and large-scale. Further, it is necessary to convert the sampling frequency depending on the above-described phase difference, which also causes a circuit to be complicated and to increase the scale.

SUMMARY OF THE INVENTION Therefore, a main object of the present invention is to provide a digital camera signal processing circuit having good color reproducibility without increasing the circuit scale.

[0010]

According to a first aspect of the present invention, there is provided a digital camera signal processing circuit for converting an output signal from a CCD having a color filter into a digital signal and processing the digital signal. A digital camera signal processing circuit comprising first suppression means for suppressing a color component level between a gamma correction circuit and a modulation circuit when the value is larger than a threshold value.

A second aspect of the present invention relates to a C filter having a color filter.
A digital camera signal processing circuit that converts an output signal from a CD into a digital signal and processes the digital signal, wherein a color component level is suppressed between a gamma correction circuit and a modulation circuit when a luminance signal level is smaller than a second threshold value. A digital camera signal processing circuit including a second suppression unit.

[0012]

According to the first invention, the luminance signal level before the gamma correction is compared with a first threshold value, and when the luminance signal level exceeds the first threshold value, for example, an output from the high luminance part suppression gain calculating circuit is output. The color component level between the gamma correction circuit and the modulation circuit is suppressed in accordance with the suppressed gain. Therefore, in the first invention, highlight green is reduced.

In the second invention, the luminance signal level before the gamma correction is compared with a second threshold value, and when the luminance signal level is lower than the second threshold value, for example, the luminance signal level is output from a low luminance part suppression gain calculating circuit. The color component level between the gamma correction circuit and the modulation circuit is suppressed according to the suppression gain. Therefore, according to the second aspect, when a low-luminance subject is photographed, the occurrence of color components in places where there is no actual color due to the influence of noise or the like is reduced.

[0014]

According to the present invention, a digital camera signal processing circuit with good color reproducibility can be obtained with a simple circuit.
The above and other objects, features and advantages of the present invention will become more apparent from the following detailed description of embodiments with reference to the drawings.

[0015]

FIG. 2 shows a digital camera signal processing circuit 10 according to this embodiment, which outputs an output signal from a CCD (not shown) having a color filter having an arrangement as shown in FIG. The camera signal converted into a digital signal by a converter (not shown) is processed. Y not shown
In accordance with the color signals separated by the C separation circuit, dot-sequential R, G, and B signals are obtained and input to the gamma correction circuit 12. The gamma correction circuit 12 performs gamma correction using a known ROM or the like so as to compensate for the non-linear electro-optical conversion characteristics of the picture tube. . The high-low luminance chroma suppressing circuit will be described later in detail with reference to FIGS. 1 to 5. However, depending on the level of the luminance signal before passing through the gamma correction circuit, the chroma is suppressed on the high luminance side and / or the low luminance side. This is to suppress the signal level. The color difference matrix circuit 16 generates color difference signals (RY) and (BY) based on the R, G, and B signals output from the high / low luminance chroma suppression circuit 14.

Referring to FIG. 1, a high / low luminance chroma suppressing circuit 14 inserted between gamma correction circuit 12 and color difference matrix circuit 16 selects RGB signals supplied from gamma correction circuit 12 at its upper input. The circuit 18 is received. The output of the multiplication circuit 20 is provided to the lower input of the selection circuit 18. One input of the multiplication circuit 20 is provided with an input RGB signal.

Further, the CPU 22 determines the threshold LT of the low-luminance portion.
H and the threshold value HTH of the high-luminance portion are output, and are supplied to the low-luminance-portion suppression gain calculation circuit 24 and the high-luminance-portion suppression gain calculation circuit 26, respectively. Low luminance part suppression gain calculation circuit 24 and high luminance part suppression gain calculation circuit 2
6 further includes a luminance signal (Y signal) separated by the above-described YC separation circuit and before passing through a gamma correction circuit (not shown).
Is given. The CPU 22 further outputs a gradient coefficient k for the high-luminance-section suppression gain calculating circuit 26. As will be described later in detail with reference to FIG. 3, when the luminance signal is smaller than the threshold LTH set by the CPU 22, the low luminance part suppression gain calculation circuit 24 calculates a suppression gain for suppressing the chroma signal, Select it 2
8 to the upper input. Similarly, when the luminance signal level exceeds the threshold value HTH set by the CPU 22, the high-luminance-section suppression gain calculation circuit 26 calculates a suppression gain for suppressing the chroma signal according to the gradient coefficient k. To the lower input of the selection circuit 28.

The low-luminance threshold LTH and the luminance signal set by the CPU 22 are applied to the AB input of the comparator 30, respectively. The comparator 30 outputs “0” when A> B, and outputs “1” when A ≦ B. That is, the comparator 30 outputs “ 0 ” when the level of the luminance signal is lower than the threshold LTH, that is, when the luminance is low. The output of the comparator 30 is provided to the decode circuit 32 together with a subtraction result signal (Y-HTH) from a subtraction circuit 48 (FIG. 4: described later) included in the high luminance suppression gain calculation circuit 26 described above. That is, the output of the comparator 30 is the maximum of the subtraction result signal.
It is given to the input of the AND gate 33 along with the upper bits are given through the respective remaining bits of the subtraction result signal OR gate 34 to the input of the AND gate 3 3. The output of AND gate 33 is connected to the input of OR gate 36.
And the output of the comparator 30 is inverted and
The other input of the port 36 is provided. Therefore, the comparator
30 and OR gate 36 output selection signals S1 and S2 to selection circuits 28 and 18, respectively, according to the truth table shown in Table 1.

[0019]

[Table 1]

Referring to Table 1, in the comparator 30, A
> When B is regardless of the subtraction result signal (Y-HTH), and outputs a selection signal S1 is "0" from the comparator 30, and outputs a selection signal "1" from the OR gate 36.
Therefore, at this time, the suppression gain calculated by the low-luminance-section suppression gain calculation circuit 24 is output from the selection circuit 28.
The result is output to the multiplication circuit 20, and the multiplication result of the multiplication circuit 20 is output through the selection circuit 18. Also, the comparator 30
In the case of A ≦ B is the subtraction result (Y-HTH) is "-" when or "0", from the OR gate 36 outputs a selection signal of "0". Therefore, at this time, the selection circuit 18 outputs the input RGB signal as it is to the output RGB signal.
Select as B signal. Further, in the comparator 30, A
When ≤B and the subtraction result (Y-HTH) is "+", the comparator 30 and the OR gate 36 output the selection signals S1 and S2 of "1". Therefore, at this time, the suppression gain from the high-luminance-part suppression gain calculation circuit 26 selected by the selection circuit 28 is given to the multiplication circuit 20, and the multiplication result of the multiplication circuit 20 is output as an output RGB signal through the selection circuit 18. Will be.

Referring to FIG. 3, low-luminance-part suppression gain calculating circuit 24 of this embodiment receives a luminance signal as described above. This luminance signal is transmitted to bit shift circuits 38, 40,
42 and 44. Bit shift circuit 38,
Reference numerals 40, 42, and 44 respectively denote input luminance signals of “5”.
Bits, “4 bits”, “3 bits”, and “2 bits” are up-shifted so that the input luminance signal is 32 bits each.
Times, 16 times, 8 times and 4 times. Each output of these bit shift circuits 38-44 is applied to a selection circuit 46.
The threshold value LTH of the low-luminance portion output from the CPU 22 in FIG. 1 is set to a numerical value “0”, “8”, “1”.
6 "," 32 "or" 64 ". Therefore, the selection circuit 46 operates the bit shift circuit 3 according to the threshold LTH of the low-luminance portion set by the CPU 22.
Any one of the outputs from 8-44 is selected and given to the upper input of the selection circuit 28 as a low-luminance-section suppression gain.

The high-luminance-section suppression gain calculating circuit 26 shown in FIG. 4 includes a subtraction circuit 48 for subtracting the high-luminance-section threshold value HTH set by the CPU 22 (FIG. 1) from the luminance signal. The subtraction result signal (Y−
HTH) is supplied to the decode circuit 32 (FIG. 1) as described above, and is supplied to the selection circuit 50 and the bit shift circuits 52, 54 and 56 as they are. Bit shift circuits 52, 54 and 56 up-shift the subtraction result output from subtraction circuit 48 by "1 bit", "2 bits" and "3 bits", respectively, and subtract the subtraction result (Y-HTH) by 2 bits. Times, 4 times and 8 times.
Therefore, (Y-HTH), 2 (Y
-HTH), 4 (Y-HTH) and 8 (Y-HTH)
Is entered. The selection circuit 50 outputs one of the four inputs to a gradient coefficient k given from the CPU 22 (FIG. 1).
Select according to. After the output of the selection circuit 50 is clipped by the overflow clipping circuit 52, it is provided as a subtraction input of the subtraction circuit 54.

In the overflow clipping circuit 52, the numerical value given from the selecting circuit 50 to the subtracting circuit 54 exceeds, for example, "256".
Is output from the high-luminance-section suppression gain. This is because when a negative suppression gain is output, an extra bit is required to handle the negative value. Therefore, the overflow clip circuit 52 is used to prevent the output suppression gain value from becoming negative,
Simplify the circuit.

It is to be noted that a numerical value "256" is fixedly input to the subtraction circuit 54. Therefore, the "256-overflow clip circuit 52 (selection circuit 5)
1) is supplied to the lower input of the selection circuit 28 shown in FIG. 1 as a high-luminance-part suppression gain. Assuming that the level of the luminance signal is X, this level X is the threshold LT of the low luminance section.
H, the decoding circuit 32
Selection signal S1 from the comparator 30 of "0" is output, OH
Selection signal S2 of "1" is output from the A gate 36. Therefore, the low-luminance-section suppression gain (indicated by the slope of the lower left in FIG. 5) calculated by the low-luminance-section suppression gain calculation circuit 24 according to the threshold value LTH as shown in FIG. Can be Therefore, the multiplying circuit 20 multiplies the input RGB signal by the low-luminance-part suppression gain. At this time, since the selection circuit 18 has selected the lower input, the RGB signal suppressed by the low luminance part suppression gain shown in FIG. 5 is output from the high / low luminance chroma suppression circuit 14 shown in FIG. .

Further, when the level X of the luminance signal threshold HTH larger than the high luminance portion, the comparison of the decoding circuit 32
The selection signals S1 and S2 of “1” are both output from the circuit 30 and the OR gate 36. Therefore, the selection circuit 28 outputs the high-luminance-section suppression gain (FIG. 5) calculated by the high-luminance-section suppression gain calculation circuit 26 as described above.
(Indicated by the slope of the lower right) is applied to the multiplication circuit 20. The multiplication circuit 20 multiplies the input RGB signal by the high-luminance-part suppression gain. Therefore, the selection circuit 18, that is, the high / low luminance chroma suppression circuit 14 outputs the RGB signals suppressed by the high luminance section suppression gain.

It should be noted that the level of the luminance signal has two threshold values LT
When it is between H and HTH Since outputs a selection signal "0" from the OR gate 36 of the decoding circuit 32 as described above, in this case, RGB signal is input as the selection circuit 18 i.e., It is output from the high / low luminance chroma suppression circuit 14. According to this embodiment, when a luminance signal having a level higher than a certain threshold is input, the RGB signal is suppressed. When the luminance signal is input, the RGB signals are suppressed.
It is possible to suppress color signal noise generated when a low-luminance subject is photographed.

According to this embodiment, since the color components are suppressed between the gamma correction circuit 12 and the color difference matrix circuit 16, this suppression circuit can be directly applied to a digital VTR to be realized in the future. There is the advantage that the output from 14 can be recorded.

[Brief description of the drawings]

FIG. 1 is a block diagram showing in detail a high / low luminance chroma suppressing circuit in the embodiment shown in FIG. 2;

FIG. 2 is a block diagram showing one embodiment of the present invention.

FIG. 3 is a block diagram showing in detail a low-luminance-part suppression gain calculating circuit shown in FIG. 1;

FIG. 4 is a block diagram showing in detail a high-luminance suppression gain calculating circuit in the embodiment of FIG. 1;

FIG. 5 is a graph showing a suppression gain obtained by the embodiment of FIG. 2;

FIG. 6 is an illustrative view showing a CCD having a mosaic type color filter and signals obtained therefrom;

FIG. 7 is an illustrative view explaining that a highlight green is generated;

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 10 ... Digital camera signal processing circuit 12 ... Gamma correction circuit 14 ... High / low luminance chroma suppression circuit 16 ... Color difference matrix circuit 18, 28 ... Selection circuit 20 ... Multiplication circuit 22 ... CPU 24 ... Low luminance part suppression gain calculation circuit 26 ... High Suppression gain calculation circuit for luminance section 30 Comparator 32 Decoding circuit

──────────────────────────────────────────────────続 き Continuing on the front page (72) Inventor Seiji Kawakami 2--18 Keihanhondori, Moriguchi-shi, Osaka Sanyo Electric Co., Ltd. (72) Inventor Masao Takuma 2--18 Keihanhondori, Moriguchi-shi, Osaka (56) References JP-A-62-13191 (JP, A) JP-A-5-244617 (JP, A) JP-A-64-52371 (JP, U) (58) Fields investigated (Int.Cl. ⁶ , DB name) H04N 9/07

Claims (5)

(57) [Claims] 1. A method according to claim 1, wherein an output signal from a CCD having a color filter is converted into a digital signal, and then a luminance signal and a
A YC separation circuit for separating the color signals,
A gamma correction circuit for performing the correction, and an output of the gamma correction circuit
Wherein the digital camera signal processing circuit and a color difference matrix circuit, when the level of the luminance signal is greater than a first threshold value to be converted to No.
A first suppression means for suppressing a color component level of a color signal is provided.
The first suppressing means is connected to the γ correction circuit and the color difference
Digital camera signal processing circuit arranged between the trix circuit. 2. The high-luminance-section suppression gain calculation circuit for calculating a first suppression gain based on the luminance signal, the first threshold value and a predetermined coefficient, the first suppression means includes: A comparison circuit that compares a level with the first threshold value; a multiplication circuit that multiplies the first suppression gain output from the high luminance section suppression gain calculation circuit with the color signal ; As a result, the level of the luminance signal
Selects the output of the multiplier when the value of the multiplier is greater than a first threshold.
And when the level of the luminance signal is smaller than a first threshold value
2. An output circuit for selecting and outputting the color signal.
The digital camera signal processing circuit according to the above. 3. After converting an output signal from a CCD having a color filter into a digital signal , a luminance signal and a chrominance signal are converted.
A YC separation circuit for separating the color signals,
A gamma correction circuit for performing the correction, and an output of the gamma correction circuit
Wherein the digital camera signal processing circuit and a color difference matrix circuit, when the level of the luminance signal is less than the second threshold value to be converted to No.
Second suppression means for suppressing the color component level of the color signal is provided.
Between the γ correction circuit and the color difference matrix circuit.
Digital camera signal processing circuit arranged . 4. The low-luminance-section suppression gain calculation circuit for calculating a second suppression gain based on the luminance signal and the second threshold value, wherein the second suppression means calculates a second suppression gain based on the luminance signal and the second threshold. A comparison circuit that compares the luminance signal with a second threshold, a multiplication circuit that multiplies the color signal by a second suppression gain output from the low-luminance-section suppression gain calculation circuit, and a comparison result obtained by the comparison circuit. The signal level is at a second threshold
If it is smaller, the output of the multiplier circuit is selected and the luminance signal is selected.
When the signal level is greater than the second threshold, the color signal is selected.
4. The digital camera signal processing circuit according to claim 3, further comprising an output circuit for selectively outputting . 5. A digital camera signal processing circuit comprising a first suppressing means according to claim 1 and a second suppressing means according to claim 2.