JP2882239B2 - Data format controller for disk drive - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a controller for controlling a data format of a disk drive, and more particularly, to a data read / write method for a disk drive, which is a new type such as an MFM recording method and an FM recording method. The present invention relates to a disk device that handles a serial data string accompanied by clock data having a certain regularity with respect to data.

[0002]

2. Description of the Related Art Conventionally, two main types of recording systems for disk devices, especially floppy disk devices, are FM and MFM recording systems. In the case of the FM recording method, the serial data to be read from and written to the disk device has a data configuration in which one clock bit is always added to one new data bit. That is, as shown in the following figure, one byte of new data is (D7, D6, D5,
In the case of D4, D3, D2, D1, D0), serial data exchanged between disk devices is 2-byte data in which 1-bit data is embedded between data.

New data: D7 D6 D5 D4
D3 D2 D1 D0 Serial data: 1 D7 1 D6 1 D5 1
D4 1 D3 1D2 1 D1 1 D0 For example, when 1-byte new data is FEh, this serial data is 2 bytes of FFFEh.

On the other hand, in the case of the MFM recording system, the serial data to be read from and written to the disk device has a data structure in which one clock bit is added to one new data bit in the same manner as in the FM recording system. New data of (D7, D6, D5, D4, D3, D
In the case of (2, D1, D0), serial data exchanged between disk devices is 2-byte data in which 1-bit data is embedded between each data, that is, new data as follows: D7 D6 D5 D4 D3 D2 D
1 D0 Serial data: C7 D7 C6 D6 C5 D5
C4 D4 C3D3 C2 D2 C1 D1 C
0 D0. However, there are the following rules for generating this clock bit.

Cn = Dn-1 * Dn For example, when the new data of one byte is A1h, the serial data is two bytes of 44A9h.

A data format in a disk device using these recording methods is composed of a sector including an ID and a DATA field as shown in FIGS. 6 and 7. To identify the head of each field, The identification is performed by detecting the unique data pattern of the address mark located after the SYNC field for synchronizing the serial data. In particular, since the data pattern of the clock bits of these address marks is a unique data pattern that does not conform to the data generation rules of the recording method, the head of each address mark is detected by detecting this clock bit.

The method of reading this data format is described below. In particular, as an LSI (hereinafter, abbreviated as FDC) for controlling the data format of a floppy disk drive, μPD765A and μP made by NEC Corporation are used.
D72065, and write and read were performed on the disk device using the above-described recording method.

FIG. 2 illustrates a case where data of a data field of one sector is read from a floppy disk device.

That is, first, a SYNC byte data pattern is detected from serial read data coming from a floppy disk device, and then a clock bit and a data bit forming an address mark of an ID field are detected. Further, after a cylinder byte, a head, a sector, a sector length, which are predetermined sector numbers, and a CRC byte for detecting whether or not there is an error in reading them, a SYNC byte, which is a head of a DATA field following the ID field, is detected. And the detection of the address mark in the DATA field is started in the same manner as the mark byte in the ID field. After the mark byte is correctly detected, a new data bit following the mark byte is transferred by a predetermined number of data bytes to the host system in units of one byte, and the CRC following the data byte is transferred.
The presence or absence of a read error at the time of reading is detected using a byte.

[0010]

As described above, the data in the data field can be transferred without transferring the clock bit.
In the FDC that transfers only the data bits, when the developed software is written and stored in the data field of each sector, there is a problem that the software is always read and copied carelessly.

In order to prevent this illegal data copying, the developer intentionally changes the arrangement of the sectors, changes the recording method for each cylinder, and changes the C in the DATA field.
Destruction of the RC tool using a special device or MS
-A special format configuration that cannot be easily copied by an OS (operating system) such as DOS must be considered, and there has been a problem that a device and software for controlling the special format must be developed. .

[0012]

[MEANS FOR SOLVING THE PROBLEMS] MFM recording method and FM
A controller for controlling a data format of a disk device supporting a recording method, a means for identifying an ID field and a DATA field constituting a sector; a means for identifying a synchronization byte and an address mark byte constituting each field; It is provided with at least means for converting serial data input from the disk device into byte units and outputting the data. After detecting the INDEX address mark, the data bits and the clock bits constituting the data after this mark byte are each 1 byte. It is characterized by outputting.

[0013]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS As shown in FIG. 8, the present invention is particularly applicable to reading data formatted by the above-mentioned .mu.PD765A, which is conventionally used, in particular, an INDEX address mark following an INDEX signal indicating a track rotation start point. The FDC has a function of reading subsequent data and alternately outputting data bits of the data located immediately after the data and its clock bit in byte units.

Here, as explained in the prior art, M
Description will be made using a data string recorded by FM. When reading from the floppy disk device serial data in which one byte of clock bit is generated as follows for one byte of new data, the new data is: D7 D6 D5 D4 D3 D2
D1 D0 Serial data: C7 D7 C6 D6 C5 D5
C4 D4 C3D3 C2 D2 C1 D1 C
0 D0 In the conventional FDC, one byte of new data (D7 D6
D5, D4, D3, D2, D1 and D0) are output to the host system.
Then, one byte of new data (D7 D6 D5 D4
D3 D2 D1 D0) and one byte of clock bit data (C7 C6 C5 C4 C3C2 C1 C
0) is output to an upper-level host system.

That is, the FDC waits for the input of the INDEX signal indicating the rotation start point of the track, and then detects the SYNC field which is a synchronous clock signal following the INDEX signal as shown in FIG. After detecting the INDEX address mark, which is a mark byte consisting of 4 bytes, data transfer to the host interface is started for each byte from the following data including the data of this address mark and the above-mentioned data bit and clock bit each. I do.

The functional configuration of the FDC of the present invention will be described with reference to FIG. 1 is a random access memory (RA
M), 2 is a read only memory (ROM), 3 is a central processing unit (CPU) of this FDC, 4 is an interface for receiving and transmitting data with the host system, 1
0 is a data separator for generating a reproduced read data signal 12 and a clock signal 13 synchronized with the serial read data from the floppy disk drive,
Reference numeral 7 denotes new data from the reproduction read data output from the data separator 10 using the synchronous clock signal 13.
Reference numeral 8 denotes a shift register for storing a byte by using a synchronous clock signal 13 to store a clock bit from the reproduced read data output from the data separator 10. Reference numeral 9 denotes a register for storing comparison reference data for comparing data codes of the shift register 8 for storing 1-byte clock bits. These data are compared in units of bytes using signals 14 and 15, and are compared. The result is input to the comparison circuit 11 that outputs the result, and the result of the comparison is confirmed by the CPU 3 described above.

Next, in the FDC having the above-described function, in the control flowchart shown in FIG. 3, in particular, in the case where an operation at the time of reading is performed for data subsequent to the address mark byte immediately following the detection of the ID field. 1 will be described with reference to FIG.

I to read from the host system
To detect the SYNC byte field, which is the synchronization clock signal located before the NDEX address mark,
First, FFh, which is the data pattern of the clock bit of the SYNC byte portion, is written to the comparison register 9 via the internal bus 6 to detect the SYNC byte, and the data pattern of the shift register 8 in which the clock bit is set becomes FFh. Can be confirmed via the comparison circuit 11 so that the SYNC byte field can be confirmed. After this confirmation, it is confirmed that the data pattern of the shift register 8 in which the data bits at that time are stored is 00h. By being able to confirm this, it can be confirmed that it is a SYNC byte field. Next, detection of an address mark byte following the SYNC byte is started. That is, 14h, which is the first clock bit byte of the first address mark, is set in the comparison register 9 and waits until the shift register 8 becomes the same as this data. The data, that is, the data code of the first address mark is C
Check that it is 2h. Similarly, for the second and third address marks following this, for the data of one byte unit from the above detection, the clock bit byte of 14h is set in the comparison register 9. Then, it is confirmed that the data in the shift register 8 is the same as this data.
Confirm that it is 2h. Similarly, for the fourth address mark, for the data in units of 1 byte from the above detection, the clock bit byte 01h is set in the comparison register 9 to set the shift register 8 Is the same as this data, and similarly, the data of the shift register 7 immediately after that is respectively confirmed that the data code of the address mark is FCh.

After the address mark is confirmed, the data bit and the clock bit are (C2h, 14).
h) (C2h, 14h) (C2h, 14h) (FCh,
01h) of the host interface 4
To the external bus terminal 5, and thereafter, the serial data bit input from the floppy disk device becomes 1
The data code of the shift registers 7 and 8 is transferred to the host interface 4 via the internal bus 6 and output to the external bus terminal 5 every time the data advances by the byte.

As described above, the data after the mark byte immediately after the target ID field is detected can be output to the host system for each data bit and its clock bit for each byte.

In the first embodiment, the MFM recording method has been described. Next, the FM recording method used in the floppy disk device shown in FIG. 9 will be described.

In the second embodiment as well, when reading data that has been previously formatted as in the first embodiment,
When reading the written data by changing the recording method of the data excluding the SYNC byte and the address mark of the DATA field of each sector from the conventional recording method,
The FDC has a function of alternately outputting a data bit and its clock bit including a mark byte following an ID field of a target sector in byte units. Here, as described in the related art, the data string recorded by FM reads serial data in which 1-byte clock bits are generated for new data of 1 byte as described below, as in the MFM recording method. New data: D7 D6 D5 D4 D3 D2
D1 D0 Serial data: C7 D7 C6 D6 C5 D5
C4 D4 C3D3 C2D2 C1 D1 C0
D0 In the conventional FDC, one byte of new data (D7 D6
D5, D4, D3, D2, D1 and D0) are output to the host system.
In C, as in the first embodiment, one byte of new data (D7 D
6 D5 D4 D3 D2 D1 D0) and one byte of clock bit data (C7 C6 C5 C4 C3 C
2 C1 C0) is output to an upper-level host system.

That is, similar to the first embodiment of the MFM recording, the control flowchart for detecting the target INDEX address mark and transferring the data is the same as the MFM recording method shown in FIG.

Next, only the differences between the FDC having the above-described function and the MFM recording will be described.

That is, in the control flowchart shown in FIG. 3, the respective functions of FIG. 1 will be described with reference to FIG. 5 particularly when a read operation is performed on data after the address mark byte of the DATA field.

I to read from the host system
To detect the SYNC byte field, which is the synchronization clock signal located before the NDEX address mark,
First, FFh, which is the data pattern of the clock bit of the SYNC byte portion, is written to the comparison register 9 via the internal bus 6 to detect the SYNC byte, and the data pattern of the shift register 8 in which the clock bit is set becomes FFh. Can be confirmed via the comparison circuit 11 so that the SYNC byte field can be confirmed. After this confirmation, it is confirmed that the data pattern of the shift register 8 in which the data bits at that time are stored is 00h. By being able to confirm this, it can be confirmed that it is a SYNC byte field. Next, detection of one byte address mark byte following the SYNC byte is started. That is, D7h, which is the clock bit byte of this address mark, is set in the comparison register 9 and waits until the shift register 8 becomes the same as this data, and the data of the shift register 7 immediately after it becomes the same, that is, the data code of this address mark Is FCh.

After this address mark has been confirmed, the data bit and the clock bit (FCh, D7
h) The 8-byte DATA is transferred to the host interface 4 and output to the external bus terminal 5, and thereafter, every time a serial data bit input from the floppy disk device advances by 1 byte, the data in the shift registers 7 and 8 is transferred. The code is transferred to the host interface 4 via the internal bus 6 and output to the external bus terminal 5.

As described above, similarly to the MFM recording method, the data after the mark byte immediately after the detection of the target ID field is replaced with the data bit and the clock bit by one.
It can be output to the host system byte by byte.

[0029]

According to the FDC of the present invention described above,
After detecting the INDEX address mark, a data bit and a clock bit constituting data including the mark byte can be output. For this reason, when only the clock bits are read based on the FDD medium on which the data is independently generated and recorded by the software developer without being based on the generation method of the MFM recording method and the generation method of the FM recording method, this FDC After the data bits and clock bits are transferred to the host system using, the data code of these clock bits is checked to see if it matches the data originally generated by the host system to identify whether the data is original data or not. Can do 2
The following functions can be provided.

In the conventional FDC, the data of the clock bit after the address mark of the DATA field is always generated based on the generation method of the MFM recording method and the FM recording method. Cannot be matched with the data of the specified clock bit, especially this clock bit can be as long as the number of data bytes in a sector, and an astronomical clock can be used if one file covers several tens of sectors. Since the bit data pattern can be obtained, there is an effect that copying cannot be performed.

On the other hand, in the conventional FDC read operation, D
The data of the clock bit after the address mark of the ATA field is not verified at all at the time of reading no matter what kind of data row is. Therefore, even if there is a clock bit that does not match the recording method, there is no problem with the conventional FDC. To be able to lead without any problems, MS-D
Since data can be recorded in a format that matches the format supported by the OS such as the OS, special recording methods such as changing the recording method for each cylinder and interleaving the sectors discontinuously as in the past are available. There is no need to consider a suitable recording method, and there is an effect that original data can be recorded very easily.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a first embodiment.

FIG. 2 is a diagram showing a conventional control flow.

FIG. 3 is a diagram showing a control flow according to the first embodiment.

FIG. 4 is a diagram illustrating a control flow according to a second embodiment.

FIG. 5 is a diagram illustrating a control flow according to a third embodiment.

FIG. 6 is a diagram showing a conventional data format.

FIG. 7 is a diagram showing a conventional data format.

FIG. 8 is a view showing a data format of the first embodiment.

FIG. 9 is a diagram showing a data format according to the second embodiment.

[Explanation of symbols]

Reference Signs List 1 RAM 2 ROM 3 CPU 4 Interface circuit with host system 5 External bus 6 Internal bus 7 Circuit for stacking data bits coming from disk device 8 Circuit for stacking clock bits coming from disk device 9 Register for keeping expected clock data pattern 10 Data separator 11 Comparison circuit

Claims (1)

(57) [Claims] 1. A controller for controlling a data format of a disk device supporting the MFM recording system and the FM recording system, an interface circuit with an upper host system, a CPU for controlling a sequence of the whole controller, and a CPU for the CPU. R where the sequence is programmed
OM, a RAM that can be used by the CPU for general purposes, a data separator that synchronizes phase with serial read data input from the disk device and outputs read data and a synchronization signal, and an output of the data separator circuit. It comprises at least two registers for separating a clock bit and a data bit from two signals and storing each of them, and a comparison circuit for comparing a value of the register for storing a clock bit with an expected data value set in advance from the CPU. And IN following the INDEX signal indicating the starting point of the track.
A DEX address mark is detected, and a data bit and a clock bit constituting the detected address mark byte and a data bit and a clock bit constituting subsequent data are similarly set to 1 each.
A data format controller for a disk device, wherein the data is output to an interface with a host system in units of bytes.