JP2879034B1 - OFDM receiver - Google Patents

Abstract

The present invention automatically determines a symbol length mode of a received OFDM signal. When a mode is searched, a symbol length mode signal of a search initial value is output from a mode control circuit to a timing generation circuit, and an average number of symbols between symbols of the averaging circuit is set according to a guard length of the mode. rear,
In accordance with the mode signal and the average number of times, the amplitude detection circuit 106
The signal amplitude is detected by the averaging circuit 107, and the correlation amplitude is detected by the delay circuit 108, the correlation detection circuit 109, the averaging circuit 110, and the amplitude detection circuit 111. next,
The signal amplitude is determined by the mode control circuit 112. If the signal amplitude is out of the predetermined range, the correlation amplitude and the signal amplitude are detected again.
When it is within the predetermined range, the correlation amplitude is determined. When the correlation amplitude is smaller than the threshold, it is determined that the mode is not correct, and a search for the next mode is performed. If not less than the threshold value, the mode is determined to be correct, and the mode is shifted to the mode holding state.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an OFDM receiving apparatus for receiving an orthogonal frequency division multiplexing (OFDM) signal having a plurality of transmission symbol length modes having different guard periods and effective symbol periods.

[0002]

2. Description of the Related Art In recent years, digital modulation systems have been actively developed for transmission of audio signals and video signals. In particular, in terrestrial digital broadcasting, an orthogonal frequency division multiplexing (hereinafter, referred to as OFDM) transmission system that is resistant to multipath interference has attracted attention. Hereinafter, a conventional technique related to the present invention will be described.

[0003] In the OFDM system, a guard period is added before an effective symbol period in order to prevent intersymbol interference due to multipath interference. FIG. 10 shows one symbol waveform of the OFDM signal. The guard period is obtained by cyclically copying a part of the effective symbol.

It is desirable that the length of the guard period is determined by the assumed multipath delay time. For this,
For example, in the DVB-T standard (ETSI 300 744), guard lengths of 1/32, 1/16, 1/8, and 1/4 are defined for two types of effective symbol lengths (2048 and 8192 samples). ing.

[0005] As described above, an OF having a plurality of transmission symbol length modes having different guard periods and effective symbol periods.
When receiving a DM signal, it is desirable that the receiving side can automatically detect and demodulate the signal.

[0006]

As described above, O
When there are a plurality of symbol length modes as an FDM signal, it is desirable that the receiving side can automatically detect and demodulate this.

SUMMARY OF THE INVENTION It is an object of the present invention to provide an OFDM receiver capable of automatically determining the symbol length mode of a received OFDM signal and performing demodulation processing.

[0008]

In order to achieve the above object, an OFDM receiver according to the present invention is configured as follows.

(1) In an OFDM receiving apparatus for receiving an OFDM signal having a plurality of transmission symbol length modes having different guard periods and effective symbol periods, any one of the plurality of transmission symbol length modes is selected. Mode signal generating means for generating a mode signal indicating the selected mode, correlation detecting means for detecting a correlation in the guard period of the OFDM signal according to the mode signal generated by the mode signal generating means, and mode signal generating means An inter-symbol averaging means for averaging the output of the correlation detection means for a specified number of times in a symbol cycle according to a mode signal generated in Generated by the mode signal generating means from the detection level of the correlation level detecting means. Mode determining means for determining whether or not the mode signal is correct; and causing the mode signal generating means to sequentially generate mode signals corresponding to each of the plurality of transmission symbol length modes, and finally determining that the mode signal is correct by the mode determining means. Mode signal switching control means for generating a mode signal to be generated by the mode signal generation means, performing symbol synchronization in a symbol length mode corresponding to the mode signal switched and set by the mode signal switching control means, and according to the synchronization timing. The OFDM signal is demodulated.

(2) In the configuration of (1), further, an envelope detecting means for detecting the envelope of the OFDM signal and an output of the envelope detecting means are compared with a specified level, and a signal of the OFDM signal is obtained from the comparison result. Input determination means for determining whether or not the signal level is appropriate, wherein the mode determination means performs determination only when the signal level is determined to be appropriate by the input determination means. is there.

(3) In the configuration of (1), the mode determination means compares a detection level of the correlation level detection means with a specified level, and determines that a mode signal when the level exceeds the specified level is correct. The signal switching control means includes:
The mode signals generated by the mode signal generating means are sequentially switched, and the mode signal generating means stops the mode signal switching when the mode determination means first determines that the mode signal is correct. .

(4) In the configuration of (1), the mode signal switching control means causes the mode signal generation means to sequentially generate mode signals corresponding to all modes, and the mode determination means determines whether each mode signal is generated. Are compared with each other, and the mode signal having the maximum value is determined to be correct.

(5) In the configuration of (1), the inter-symbol averaging means increases the number of averaging as the length of the mode signal guard length decreases.

(6) In the configuration of (1), the mode signal switching control means includes:
A mode signal is generated in ascending order of the mode determination time according to the symbol length and the average number of times between symbols.

(7) In the configuration of (1), when it is possible to selectively receive OFDM signals of a plurality of channels, a mode for holding mode information determined to be correct by the mode determination means for each reception channel. Holding means, wherein the mode signal switching control means reads the mode information of the selected channel from the mode holding means at the time of the next channel selection and generates a mode signal corresponding to the mode signal generating means as an initial value. It is a feature.

[0016]

Embodiments of the present invention will be described below in detail with reference to the drawings.

(First Embodiment) FIG. 1 is a block diagram showing a configuration of an OFDM receiver according to a first embodiment of the present invention. In FIG. 1, a signal of a predetermined channel selected by a tuner 101 is frequency-converted into an IF (intermediate frequency) band, then converted into a digital signal by an A / D (analog / digital) converter 102, and further converted to a quadrature detector. The signal is converted into a baseband signal (I signal and Q signal) by 103.

The output of the quadrature detector 103 is supplied to an FFT (Fast Fourier Transform) circuit 104. The FFT circuit 104 performs FFT processing on the effective symbol period of the OFDM signal according to the timing signal supplied from the timing generation circuit 113, and thereby obtains symbol data of each carrier. The output of the FFT circuit 104 is supplied to the demodulation circuit 105, and the symbol data of each carrier is demodulated and output.

On the other hand, the baseband OFDM signal obtained by the quadrature detector 103 is supplied to an amplitude detection circuit 106, where the signal amplitude level is detected, and then the averaging circuit 1
07 for the specified number of times.
The envelope of the received signal is obtained. This averaging circuit 10
The signal amplitude signal of the OFDM reception signal obtained in step 7 is supplied to the mode control circuit 112.

The O output from the quadrature detector 103
The FDM signal is delayed for a predetermined period by the delay circuit 108 and supplied to the correlation detection circuit 109. The correlation detection circuit 109 detects the correlation of the OFDM signal before and after the delay by the delay circuit 108, and the correlation detection output is averaged a specified number of times by the inter-symbol averaging circuit 110 and supplied to the amplitude detection circuit 111. This amplitude detection circuit 111
Detects the amplitude level of the averaged correlation detection signal, whereby the correlation amplitude in the guard period of the OFDM reception signal is detected. The correlation amplitude signal obtained by the amplitude detection circuit 111 is supplied to the mode control circuit 112 and also to the synchronization detection circuit 114.

The mode control circuit 112 enters a mode search state when the power is turned on or when the channel is switched, and sequentially generates mode signals corresponding to all the combinations of the guard length and the effective symbol length to generate a mode signal. The correctness of the mode is determined from the output of the averaging circuit 107 and the amplitude detection circuit 111 for each signal. If it is determined to be correct, the mode signal at that time is held and a mode synchronization flag "1" is generated. Otherwise, the next mode signal is generated and a mode synchronization flag "0" is generated. . The mode signal is supplied to the timing generation circuit 113, and the mode synchronization flag is supplied to the synchronization detection circuit 114.

The synchronization detection circuit 114 is a mode control circuit 1
When the mode synchronization flag from “12” is “1”, the correlation amplitude signal from the amplitude detection circuit 111 is taken in to detect symbol synchronization, and the synchronization detection signal is supplied to the timing generation circuit 113. This timing generation circuit 1
13 sets the delay time of the delay circuit 108 to an effective symbol period corresponding to the mode according to the mode signal from the mode control circuit 112, and sets the correlation detection width of the correlation detection circuit 109 to a guard period corresponding to the mode. Then, the average interval of the inter-symbol averaging circuit 110 is set to the symbol period corresponding to the mode. Then, when a synchronization detection signal is input from the synchronization detection circuit 114, a timing signal indicating an effective symbol period is generated from the synchronization detection signal. This timing signal is supplied to the FFT circuit 104 and is subjected to the FFT processing for each effective symbol.

When the mode control circuit 112 determines that the mode is asynchronous in the mode holding state, the mode synchronization flag is set to "0" and the mode is searched again.

Next, the delay circuit 108 and the correlation detection circuit 10
9. The detection of the correlation in the guard period by the inter-symbol averaging circuit 110 will be further described.

First, the delay circuit 108 delays an input signal by an effective symbol period in accordance with a control signal from the timing generation circuit 113. The output of the delay circuit 108 and the output of the quadrature detector 103 are respectively
9. As shown in FIG. 10, since the guard period is a cyclic copy of a part of the effective symbol,
The correlation in the guard period can be detected by calculating the correlation between the input signal and a signal delayed by an effective symbol.

FIG. 2 shows a specific example of the correlation detection circuit 109. 2, an input 2 from a delay circuit 108 is converted into a complex conjugate signal by a complex conjugate operation circuit 201, supplied to a complex multiplication circuit 202 together with an input 1 from the quadrature detector 103, and subjected to complex multiplication to shift the guard period width. Average circuit 20
3 is supplied. The moving average circuit 203 calculates the moving average of the output of the complex multiplier 202 with the guard period width according to the control signal from the timing generation circuit 113. The output of the correlation detection circuit 109 is supplied to an inter-symbol averaging circuit 110.

The inter-symbol averaging circuit 110 averages the output of the correlation detection circuit 109 for a predetermined number of times in the symbol period (guard length + effective symbol length) in accordance with the control signal from the timing generation circuit 113, and outputs the result. As described above, when the mode of the guard length and the effective symbol length is correct, the correlation can be detected in the guard period portion within one symbol.

Next, the mode detection algorithm will be further described.

FIG. 3 shows a specific example of the mode control circuit 112. In FIG. 3, the determination circuit 301 includes an amplitude detection circuit 1
Compare the correlation amplitude supplied from 11. Further, the determination circuit 302 determines whether the signal amplitude supplied from the averaging circuit 107 is within a predetermined range. The mode determination circuit 303 determines whether the mode is correct based on the determination outputs of the determination circuits 301 and 302, and controls the mode generation circuit 304 and the synchronization protection counter 305 based on the determination result.

The mode generating circuit 304 generates a mode signal corresponding to a mode specified by a control signal (load, reset, +1) from the mode determining circuit 303. The mode signal is supplied to the timing circuit 113. You. The synchronization protection counter 305 generates a mode synchronization flag in response to a count control signal (reset, +1) from the mode determination circuit 303. The mode synchronization flag is supplied to the synchronization detection circuit 114, and the symbol synchronization detection is performed. Is shared with

The operation of the above configuration will be described with reference to FIGS.

FIG. 4 shows the operation in the mode search state when the power is turned on or the channel is switched. First, when power is turned on or a channel is switched, a mode search is started. In this mode search, in the mode control circuit 112, a load signal designating a mode search initial value is output from the mode determination circuit 303 to the mode generation circuit 304, whereby the mode generation circuit 30
The initial value of the search for the guard length and the effective symbol length is set to 4, and the corresponding mode signal is output from the mode generation circuit 304. Further, a reset signal is output from the mode determination circuit 303 to the synchronization protection counter 305, whereby the synchronization flag generated by the counter 305 is set to "0" (ST1).

The mode signal generated by mode generation circuit 304 is supplied to timing generation circuit 113. At this time, the timing generation circuit 113 sets the average number of times between symbols in the inter-symbol averaging circuit 110 according to the mode of the guard length specified by the mode signal (ST2). That is, the shorter the number of samples in the guard period, the worse the S / N of the correlation output of one symbol becomes. Therefore, the S / N can be improved by increasing the average number of times between symbols. For example, if the number of valid symbol samples is 20
48, the number of guard length samples is 64, 128, 256,
In the case of detecting the correlation in the four modes of 512, FIG.
As shown in FIG.
By reducing the number to 6, 8, and 4, the S / N of the correlation output after inter-symbol averaging can be made equal. This makes it possible to reliably detect the correlation regardless of the guard length.

When the average number is set as shown in FIG. 5, the mode search is performed in the order of short time required for mode determination, that is, in the order of 512, 256, 128, and 64 guard lengths. As a result, the average time for mode determination becomes the shortest.

After setting the average number of times between symbols, the amplitude detection circuit 106 and the averaging circuit 107 detect the signal amplitude in accordance with the mode signal and the average number, and the delay circuit 10
8. Correlation amplitude is detected by the correlation detection circuit 109, the intersymbol averaging circuit 110, and the amplitude detection circuit 111 (ST
3). Next, in the mode control circuit 112, the signal amplitude is determined by the determination circuit 302 (ST4). When the signal amplitude is out of the predetermined range (No), the correlation amplitude and the signal amplitude are detected again without performing the mode determination. This can prevent erroneous determination of the mode when the amplitude of the received signal changes due to fading or the like. When the signal amplitude is within a predetermined range, (Y
es) The correlation amplitude is determined (ST5). If the correlation amplitude is smaller than a predetermined threshold (No), the mode is determined to be incorrect and the next mode is searched (ST5).
6). When the correlation amplitude is equal to or larger than a predetermined threshold, (Ye
s) The mode is determined to be correct, and the synchronization protection counter 30
5, the mode synchronization flag is set to "1" (ST7), and the mode search ends (transition to the mode holding state).

FIG. 6 shows the operation of mode detection in the mode holding state. At the start of mode holding,
The output of the synchronization protection counter 305 is "0" as shown in FIG.
, And the correlation amplitude and the signal amplitude are detected according to the held mode signal and the average number of times (ST8). Next, the signal amplitude is determined (ST9). If the signal amplitude is out of the predetermined range (No), the correlation amplitude and the signal amplitude are detected again without performing the mode determination. This can prevent erroneous determination of the mode when the amplitude of the received signal changes due to fading or the like. When the signal amplitude is within a predetermined range (Yes),
The correlation amplitude is determined (ST10). If the correlation amplitude is equal to or greater than a predetermined threshold (ST11), the mode is determined to be correct, the synchronization protection counter 305 is reset, and the detection of the correlation amplitude and the signal amplitude is performed again. Do. When the correlation amplitude is smaller than the predetermined threshold (No), the count value of the synchronization protection counter 305 is incremented by +1 (ST1).
2). Further, the output of the synchronization protection counter 305 is compared with a predetermined value (ST13). If the counter output is not equal to the predetermined value (No), the correlation amplitude and the signal amplitude are detected again. When the counter output is equal to the predetermined value, that is, when it is determined that the mode is not correct consecutively for the predetermined number of times (Yes), the mode synchronization flag is set to “0” and the mode holding is ended (transition to the mode search state). Do).

As is clear from the above description, the OFDM receiver according to the configuration of the above embodiment has a guard period length,
The mode is sequentially searched from the initial setting mode for each mode based on the combination of the effective symbol lengths, and a mode in which a correlation amplitude equal to or higher than a predetermined level is obtained is recognized as an appropriate mode, and synchronization detection is performed. Even when there are a plurality of symbol length modes, this can be automatically detected and demodulated.

At this time, the mode is determined only when the signal amplitude is within the predetermined range. Therefore, it is possible to prevent erroneous determination of the mode when the amplitude of the received signal fluctuates due to fading or the like. In addition, since the number of times of averaging the correlation amplitude signal is increased or decreased according to the mode, the S / N of the correlation output after inter-symbol averaging can be made equal, and the correlation can be detected reliably regardless of the guard length. Can be. further,
After the correlation is detected and the synchronization is maintained, when the correlation is not detected for the specified number of times or more, the mode shifts to the mode re-search, thereby preventing a situation where synchronization is lost due to temporary S / N deterioration or the like. Can be.

(Second Embodiment) Next, a second embodiment of the present invention will be described with reference to FIGS.

The overall configuration of this embodiment is the same as that shown in FIG. 1, but the configuration of the mode control circuit 112 is slightly different. FIG. 7 shows a configuration of the mode control circuit 112 of the present embodiment. In FIG. 7, the same parts as those in FIG. 3 are denoted by the same reference numerals, and different parts will be described here.

The mode control circuit 112 is the same as the previous embodiment in that the mode determination is performed in order, but in the previous embodiment, the mode control circuit 112 shifts to the mode holding state when the mode is detected. In the present embodiment, a method is used in which the determination is performed for all the modes, the mode in which the correlation amplitude is maximized is set to the reception mode, and the mode is switched to the reception mode.

In FIG. 7, a maximum value detection circuit 306 detects the maximum value of the correlation amplitude supplied from the amplitude detection circuit 111, and the detection result is supplied to the mode determination circuit 307 together with the determination result of the determination circuit 302. You. The mode determination circuit 307 determines whether the mode is correct based on the determination output of the determination circuit 302 and the detection output of the maximum value detection circuit 306. Based on the determination result, the mode generation circuit 3
04 and the synchronization protection counter 305 are controlled.

The operation of the mode control circuit 112 having the above configuration will be described with reference to FIG.

FIG. 8 shows the operation in the mode search state when the power is turned on or the channel is switched. First, when power is turned on or a channel is switched, a mode search is started. In this mode search, the mode control circuit 112 outputs a load signal designating a mode search initial value from the mode determination circuit 307 to the mode generation circuit 304, whereby the mode generation circuit 30
The initial value of the search for the guard length and the effective symbol length is set to 4, and the corresponding mode signal is output from the mode generation circuit 304. Further, a reset signal is output from the mode determination circuit 303 to the synchronization protection counter 305, whereby the synchronization flag generated by the counter 305 is set to "0" (ST21).

The mode signal generated by mode generation circuit 304 is supplied to timing generation circuit 113. At this time, the timing generation circuit 113 sets the average number of times between symbols in the inter-symbol averaging circuit 110 according to the mode of the guard length specified by the mode signal (ST22). That is, S / N is improved by increasing the average number of times between symbols.

After setting the average number of times between symbols, the amplitude detection circuit 106 and the averaging circuit 107 detect the signal amplitude in accordance with the mode signal and the average number, and the delay circuit 10
8. Correlation amplitude is detected by the correlation detection circuit 109, the intersymbol averaging circuit 110, and the amplitude detection circuit 111 (ST
23). Next, in the mode control circuit 112, the signal amplitude is determined by the determination circuit 302 (ST24). When the signal amplitude is out of the predetermined range (No), the correlation amplitude and the signal amplitude are detected again without performing the mode determination. This prevents erroneous determination of the mode when the amplitude of the received signal changes due to fading or the like. When the signal amplitude is within a predetermined range (Yes),
The maximum value of the correlation amplitude is detected (ST25). Next, it is determined whether all modes have been searched (ST26). If there are remaining modes (No), the next mode is searched (S26).
T6). If all modes have been searched (Yes), the mode of the maximum correlation is set to the mode generation circuit 304.
To reset the synchronization protection counter 305, set the mode synchronization flag to "1" (ST27), and terminate the mode search (transition to the mode holding state). The operation in the mode holding state is the same as in the previous embodiment, and a description thereof will be omitted.

As described above, in this embodiment, the search is performed for all the modes and the mode having the maximum correlation amplitude is selected, so that the search time is slightly longer than that of the previous embodiment. However, the correlation determination can be performed with higher accuracy. Other specific effects are first
This is the same as the embodiment.

(Third Embodiment) Next, a third embodiment of the present invention will be described with reference to FIG. In FIG. 9, the same portions as those in FIG. 1 are denoted by the same reference numerals, and different portions will be mainly described here.

FIG. 9 shows the configuration of an OFDM receiver according to the third embodiment. In FIG. 9, a mode signal of a detected guard length and an effective symbol length is transmitted from a mode control circuit 112 to a memory 7 by a microcomputer 701 for each channel.
02 is stored. When a predetermined channel is selected after the mode signal of each channel is written once to the memory 702, the mode signal of the selected channel is supplied from the memory 702 to the mode control circuit 112 by the microcomputer 701, and the mode signal is initialized. As a value, a mode search is performed as shown in FIG.

Since it is considered that the guard length and the effective symbol hardly change in the same channel, the time for mode search is shortened as described above. The operation can be started from the mode holding state shown in FIG. 6 by using the mode signal from the memory 702 at the time of channel selection. In this case, only when the mode has changed, the mode control circuit 112 determines that the mode is asynchronous and performs the mode search.

[0051]

As described above, according to the present invention, it is possible to provide an OFDM receiving apparatus capable of automatically determining the symbol length mode of a received OFDM signal and providing the same for demodulation.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a configuration of an OFDM receiving apparatus according to a first embodiment of the present invention.

FIG. 2 is a block diagram showing a specific configuration example of a correlation detection circuit used in the first embodiment.

FIG. 3 is a block diagram showing a specific configuration example of a mode control circuit used in the first embodiment.

FIG. 4 is a flowchart for explaining a mode search operation according to the first embodiment;

FIG. 5 is a diagram illustrating an example of an average number of times between symbols for each mode according to the first embodiment.

FIG. 6 is a flowchart for explaining a mode holding operation according to the first embodiment;

FIG. 7 is a block diagram showing a specific configuration example of a mode control circuit of an OFDM receiver according to a second embodiment of the present invention.

FIG. 8 is a flowchart illustrating a mode search operation according to the second embodiment.

FIG. 9 is a block diagram showing a configuration of an OFDM receiver according to a third embodiment of the present invention.

FIG. 10 is a waveform chart showing a waveform of an OFDM signal.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 101 ... Tuner 102 ... A / D converter 103 ... Quadrature detector 104 ... FFT circuit 105 ... Demodulation circuit 106 ... Amplitude detection circuit 107 ... Average circuit 108 ... Delay circuit 109 ... Correlation detection circuit 110 ... Intersymbol averaging circuit 111 ... Amplitude Detection circuit 112 mode control circuit 113 timing generation circuit 114 synchronization detection circuit 301, 302 determination circuit 303 mode determination circuit 304 mode generation circuit 305 synchronization protection counter 306 maximum value detection circuit 307 mode determination circuit 701 ... microcomputer 702 ... memory

Continuation of the front page (72) Noboru Taga Inventor, No. 8 Shinsugita-cho, Isogo-ku, Yokohama-shi, Kanagawa Prefecture Inside Toshiba Multimedia Engineering Laboratory Co., Ltd. (56) References JP-A-9-312582 (JP, A) JP-A-10 −126372 (JP, A) (58) Fields investigated (Int. Cl. ⁶ , DB name) H04J 11/00

Claims (7)

(57) [Claims] 1. An OFDM receiving apparatus for receiving an OFDM (Orthogonal Frequency Division Multiplexing) signal having a plurality of transmission symbol length modes in which a guard period and an effective symbol period are different, comprising: selecting one of the plurality of transmission symbol length modes; Mode signal generating means for selecting one of the modes and generating a mode signal indicating the selected mode; correlation detecting means for detecting the correlation of the guard period of the OFDM signal according to the mode signal generated by the mode signal generating means; An inter-symbol averaging means for averaging the output of the correlation detection means for a specified number of times in a symbol cycle according to a mode signal generated by the mode signal generation means; Correlation level detection means; and the mode signal from the detection level of the correlation level detection means. Mode determining means for determining whether a mode signal generated by the generating means is correct, and causing the mode signal generating means to sequentially generate mode signals corresponding to each of the plurality of transmission symbol length modes. A mode signal switching control unit for causing the mode signal generation unit to generate a mode signal determined to be correct by the determination unit; and a symbol synchronization in a symbol length mode corresponding to the mode signal switched and set by the mode signal switching control unit. And demodulating the OFDM signal in accordance with the synchronization timing. 2. An envelope detecting means for detecting an envelope of the OFDM signal, and an output of the envelope detecting means is compared with a specified level, and based on the comparison result, whether the signal level of the input of the OFDM signal is appropriate. 2. The OFDM receiving apparatus according to claim 1, further comprising: input determining means for determining whether the signal level is appropriate by the input determining means. . 3. The mode determination means compares the detection level of the correlation level detection means with a specified level, and determines that a mode signal when the level exceeds the specified level is correct. 2. The mode signal generating means according to claim 1, wherein the mode signals generated by the signal generating means are sequentially switched, and the mode signal generating means stops the mode signal switching when the mode determining means first determines that the signal is correct. OFDM receiver. 4. The mode signal switching control means causes the mode signal generation means to sequentially generate mode signals corresponding to all modes, and the mode determination means compares correlation levels at the time of generation of each mode signal with each other. 2. The OFDM receiver according to claim 1, wherein the mode signal having the maximum value is determined to be correct. 5. The OFDM receiving apparatus according to claim 1, wherein said inter-symbol averaging means increases the number of times of averaging as the length of said mode signal guard length decreases. 6. The mode signal switching control means for causing the mode signal generation means to generate mode signals in ascending order of a mode determination time according to a symbol length and an average number of times between symbols. The OFDM receiver according to any one of the preceding claims. 7. A mode holding means for holding mode information determined to be correct by the mode determination means for each reception channel when an OFDM signal of a plurality of channels can be selectively received, the mode signal comprising: 2. The switching control unit according to claim 1, wherein the next time a channel is selected, the mode information of the selected channel is read from the mode holding unit and a mode signal corresponding to the mode signal generating unit is generated as an initial value. OFDM receiver.