JP2874191B2 - Imaging device - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to an imaging device, and more specifically, to an imaging device having an automatic exposure adjustment function.

[Prior Art] A configuration for automatically adjusting an exposure amount from an output signal of an image sensor is known. In the conventional example, a luminance signal and a chrominance signal obtained by processing an output signal of an image sensor are output for a predetermined period of time, usually one.
Integrate for the screen. Then, the aperture value and the level of the image sensor output (for example, each signal of R, G, and B) are adjusted according to the integration result of the luminance signal, and further, according to the integration result of the color difference signal, the R signal and the R signal are adjusted for the purpose of white balance. Adjust the level of the B signal.

[Problems to be Solved by the Invention] However, in the above-described conventional example, integration is performed for the entire screen, so that, for example, when strong light is incident on a part of the screen, automatic exposure adjustment can be performed normally. Can not.

It is conceivable to adjust the exposure by using a part of the screen, for example, an integrated value or a peak value at the center, but it is difficult to realize this using an analog integrator. Considering the realization of digital circuits, a digital filter having a cutoff frequency in the low-order device such as an integrator requires a large number of taps, and cannot be realized by a FIR (finite impulse response) type filter. is there. Further, in an IIR (infinite impulse response) type filter, the number of bits of the filter becomes large, so that not only the scale of the adder of the filter becomes large, but also the power consumption in a camera application becomes a problem.

Accordingly, an object of the present invention is to solve such a problem and to provide an imaging apparatus that performs automatic exposure adjustment by partial photometry.

[Means for Solving the Problems] An imaging apparatus according to the present invention includes an integration means for digitally integrating an imaging signal for each of a plurality of screen sections,
An imaging apparatus for adjusting exposure according to a result of the integration, wherein the integration means includes a cumulative addition means having the same bit length as the pixel bit length, a counter means having a number corresponding to the screen section, and a carry of the cumulative addition means. Gate means for distributing a signal to counter means corresponding to the screen section according to the image position.

[Operation] By the integrating means, an integrated value of a plurality of screen sections can be obtained. This integration means has a simple circuit configuration and can be configured with a small circuit. Further, power consumption can be reduced.

Embodiment An embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention. 10 is a photographing optical system, 12 is a photographing lens, 14 is an aperture, 16 is an infrared cut filter, 18 is an optical low-pass filter,
20 is a color filter and 22 is an image sensor. The drive circuit 24 drives the image sensor 20 according to the clock from the clock generation circuit 26. The image sensor 20 converts the optical image into RGB color signals,
Apply to sample and hold (S / H) circuits 28, 29, 30. S
The outputs of the / H circuits 28, 29, 30 are level-adjusted by the variable gain amplifiers 32, 33, 34. The gains of the variable gain amplifiers 32, 33, 34 are
It is controlled by the system control circuit 36. S / H circuit 28, 29, 3
Variable gain amplifiers 32, 33, and 334 may be arranged before 0.

The switch 37 is sequentially switched for each pixel, and cyclically selects the outputs of the variable gain amplifiers 32, 33, and 34. The output of the switch 37 is a so-called switch Y (luminance) signal. The A / D converter 38 has a gamma characteristic in the ladder itself, and digitizes the output of the switch 37.

FIR filters 40, 42, 44 and 46 are digital low-pass filters. The filter 40 is for a luminance signal, the filter 42 is for an R signal, the filter 44 is for a G signal, and the filter 46 is for a B signal. . The output of the A / D converter 38 is directly input to the filters 40 and 46 and input to the filters 42 and 44 via the latch circuits 48 and 50, respectively. FIG. 2 shows a configuration example of the FIR filter. 100, 102, 104, 106, and 108 are delay elements having a unit delay d, 110, 112, 114, 116, 118, and 120 are coefficient circuits for multiplying each delay signal by a predetermined coefficient, and 122 is a coefficient circuit 110 to
It is an adder that adds 120 outputs. The output of the adder 122 becomes the filter output. As the filters 40, 42, 44, 46, F
The signal which has been band-limited and aperture-compensated by the filter 40 may be blanked by the blanking circuit 52, and a composite synchronizing signal is superimposed by the sync addition circuit 54. On the other hand, the filter
The outputs of 42, 44 and 46 are converted into color difference signals RY and BY by an RGB matrix circuit 56.

The D / A converters 58, 59, and 60 respectively convert the luminance signal output of the sync addition circuit 58 and the two color difference signal outputs from the matrix circuit 56 into analog signals.
The signal is supplied to the encoder 66 via the terminal 4. The encoder 66 outputs, for example, an NTSC television signal.

The luminance signal output from the sink addition circuit 54 is also supplied to an evaluation photometric integration circuit 68, and the color difference signal RY output from the RGB matrix circuit 56 is supplied to a digital integration circuit 72R via a switch 70R of the gate circuit 70. , The color difference signal BY is supplied to the digital integration circuit 72B via the switch 70B of the gate circuit 70. The counter / decoder 74 controls the opening / closing of the switches 70R and 70B so that the digital integrator 7
2R, controls the integration period of 72B,
To control the plurality of integration sections.

FIG. 3 shows a configuration example of the digital integration circuits 72R and 72B. 130 is an adder equal to the data length, 132 is a latch circuit equal to the data length, 134 is a coefficient unit, 136 is an AND gate for detecting the carry output of the adder 130 under the control of an external clock CK, and 138 is an AND gate. An m-bit counter that counts the output of gate 136 With this configuration, counter 138 counts only carry generated by data addition in adder 130. The output of the counter 138 is the output of this integration circuit, and in FIG.
The system control circuit 36 adjusts the gain of the variable gain amplifiers 32 and 34.

FIG. 4 shows a configuration example of the evaluation photometric integration circuit 68. However,
FIG. 6 shows a configuration example in the case of performing integration of six sections as shown in FIG. This is basically the same as the case of FIG. 3 except that a plurality of counters are provided for integrating individually for a plurality of sections. That is, 140 is an adder equal to the data length, 142 is a latch circuit having a reset terminal and equal to the data length, 144 is a coefficient unit, 146A, 146B, 146C, 146D, 146E, 14
6F is an AND gate for detecting the carry output of the adder 140 under the control of an external clock CK, 148A, 148B, 148C, 1
48D, 148E and 148F are m-bit counters for counting the outputs of the AND gates 146A to 146F, respectively. decoder
150, according to the select signal from the counter decoder 74, AND gates 146A to 146A to
Apply signal H to F to activate. Accordingly, the counters 148A to 148F integrate signals corresponding to the sections A to F, respectively.

The system control circuit 36 controls the aperture 14 and the gains of the variable gain amplifiers 32, 33 and 34 according to the output of the evaluation photometric integration circuit 68 to adjust the exposure. In general, the system control circuit 36 adjusts the exposure based on the integration result of the evaluation photometric integration circuit 68 prior to the gain control of the variable gain amplifiers 32 and 34 based on the outputs of the integration circuits 72R and 72B.

In this embodiment, the evaluation photometry is performed using the switch Y signal. However, the Y signal formed from the R, G, and B signals may be integrated according to Y = 0.3R + 0.59G + 0.11B. In addition, the color filter 20 is not limited to the RGB stripe filter, and may include other complementary color filters, such as magenta, cyan, and yellow,
The filter may be a combination of cyan, green, and yellow.

[Effects of the Invention] As can be easily understood from the above description, according to the present invention, although a digital integration circuit is used, the circuit scale can be reduced, and power consumption does not increase so much. Therefore,
The present invention has a great effect when applied to a small device such as a camera and a battery-driven device that requires low power consumption.

[Brief description of the drawings]

FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention, and FIG.
FIG. 3 is a configuration example of the digital integration circuits 72R and 72B of FIG. 1, FIG. 4 is a configuration example of the evaluation photometry integration circuit 68 of FIG. 1, and FIG. 5 is an evaluation photometry integration circuit of FIG. It is an example of 68 integral divisions. 16: Infrared cut filter, 18: Optical low pass filter, 20: Color filter, 22: Image sensor, 32, 33, 34: Variable gain amplifier, 40, 42, 44, 46: FIR filter, 48, 50: Latch circuit, 68: evaluation photometric integration circuit, 72R, 72B: digital integration circuit

Claims (1)

(57) [Claims] An image pickup apparatus comprising an integrating means for digitally integrating an image pickup signal for each of a plurality of screen sections, and adjusting an exposure according to a result of the integration, wherein the integrating means has the same bit length as a pixel bit length. , A number of counter means corresponding to the screen section, and a gate means for distributing the carry signal of the cumulative addition section to the counter means corresponding to the screen section according to the image position. An imaging device characterized by the above-mentioned.