JP2870302B2 - Computer system with operating status display - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a plurality of electronic computer systems including a central processing unit (hereinafter, referred to as a virtual computer) operable by being divided into one or more logical processors. The present invention relates to a computer system provided with an operation state display device that facilitates monitoring of each processor by displaying the information and enables operation with less errors.

[0002]

2. Description of the Related Art Conventionally, virtual machines have been implemented only with the idea of software, and in the normal case, monitoring of the operation state from outside the computer has not been performed. In a conventional computer system using a virtual computer, particularly in an important system including a plurality of central processing units and performing on-line operations, (a) the operation state display and operation control are performed to simplify the operation and reduce malfunctions. (For example, JP-A-61-223970, JP-A-63-7600)
9 (see Japanese Patent Application Laid-Open No. 9-87212), or (b) a method including a management host computer that performs operation processing while displaying and controlling the operating state (for example, see Japanese Patent Application Laid-Open No. 2-87212). However, these are mainly for the purpose of system migration for the purpose of the virtual machine, and it is rare that the virtual machine is applied to ordinary online business or the like. In addition, system migration is, for example, 1
A user equipped with one computer develops a system exclusively for dispensing using, for example, a CD (cash dispenser) using one virtual computer, and puts it into practical use at a certain time. At the same time, the second virtual computer uses an ATM (automatic cash dispenser). Transaction equipment)
In order to develop a system for depositing and withdrawing and to put it into practical use at a certain time, a transition from the old system to the new system will be made. As described above, it is rare that a virtual machine is applied to a normal online operation, etc., so that in any operation state display method, only the physical processor is displayed, and the logical processor on the virtual machine is displayed. It wasn't.

[0003]

In recent years, the field of use of virtual machines has been expanded, and they have been applied to ordinary online business and the like. Therefore, there is a need for a method of monitoring the operation state of a logical processor on a virtual machine. A first object of the present invention is to solve such a conventional problem, display the status of each logical processor on a virtual computer, monitor the operation status of each virtual computer, and monitor the operation status of each operator. An object of the present invention is to provide an electronic computer system provided with an operation state display device capable of simplifying an operation operation and improving the reliability of the system. A second object of the present invention is to store state information of each logical processor on a virtual machine and state information of a physical processor of the virtual machine,
It is another object of the present invention to provide an electronic computer system having an operation state display device capable of displaying the operation state of a virtual machine more accurately, and further improving the reliability of the system. A third object of the present invention is to
By displaying the state information of each logical processor on the virtual machine and the state information of the non-virtual machine in a mixed manner, centralized monitoring can be performed collectively even in a large-scale system in which virtual machines and non-virtual machines are mixed. An object of the present invention is to provide an electronic computer system provided with such an operation state display device. A fourth object of the present invention is to display status information for each logical processor on a virtual machine, and at the same time, when a failure occurs in each logical processor, issue an alarm to notify the operator.
It is an object of the present invention to provide an electronic computer system provided with an operation state display device capable of promptly responding to a failure by notifying a computer of the failure and reducing the downtime of the system. A fifth object of the present invention is to enable the operation state display device to instruct the reset of the failure state of the logical processor when a failure occurs in each logical processor on the virtual machine, thereby controlling the operation of the operator. An object of the present invention is to provide an electronic computer system provided with a driving state display device which can simplify and notify a person at another position that an operator has recognized a failure state. A sixth object of the present invention is to display status information for each logical processor on a virtual machine, to communicate this information to a management host computer, and to include the virtual machine in the management host computer. An object of the present invention is to provide an electronic computer system including an operation state display device capable of performing integrated operation and automatic operation. A seventh object of the present invention is to display status information for each logical processor on a virtual machine, report the information to a monitoring center, and perform remote monitoring and operation including the virtual machine at the monitoring center. It is an object of the present invention to provide a computer system provided with a possible operation state display device. An eighth object of the present invention is to allow a management host computer to report status information for each logical processor to a management host computer by a simpler operation status communication mechanism even in a system that does not require an operation status display device. It is an object of the present invention to provide an electronic computer system provided with an operation state display device capable of performing an integrated operation including a virtual computer and an automatic operation on a computer.

[0004]

In order to achieve the above object, an electronic computer system provided with an operation state display device according to the present invention comprises: (a) at least one computer which operates while being divided into one or more logical processors; In a computer system including a central processing unit and peripheral devices connected to the central processing unit, an operating state display device that displays state information for each logical processor is connected to the central processing unit,
The central processing unit is provided with common control means for reporting the state information of each logical processor to the operation state display device, and the common control means has a storage table for storing the state information of each logical processor.
A first processing procedure for detecting a state change of each logical processor and a state change of each logical processor, storing the state change in a storage table, and reporting the state change to the operation state display device; And a second processing procedure for reading the contents of the storage table upon receipt of the notification of the change and reporting the result to the operation state display device. The operation state display device stores state information for each logical processor unit. By transmitting an initialization notification to the second processing procedure of the common control means in the central processing unit at the time of initialization of the management table 1 and the operation status display device itself, the second processing procedure is started. A third processing procedure for receiving the reported status information and storing the status information in the first management table; and a logical processor reported from the first processing procedure of the common control means in the central processing unit. State change Receiving said first management Te state changes - the fourth processing procedure for updating the contents of the table, first
And a state display control procedure for displaying the state of each logical processor on a display unit by referring to the contents of the management table. Further, (b) the control means of the central processing unit includes means for supplying the state signal of each logical processor to the operation state display device, and means for supplying the state information of the physical processor to the operation state display device. In addition to the first management table, a second management table for storing state information of the physical processor and a state signal of the physical processor supplied from the central processing unit are stored in the operating state display device. A physical processor status management procedure that is constantly monitored and stored in a second management table;
And a state display control procedure for displaying the state information of both the physical processor and each logical processor on the display unit by referring to the management table.

[0005]

According to the present invention, when a change in the state of each logical processor occurs, the state information is updated on the storage device, the state information is reported to the operation state display device, and an initialization notification is sent from the operation state display device. Since the report is made by referring to the latest information stored in the storage device, the status of the logical processor in the virtual machine can be notified accurately. Further, when a state change of each logical processor occurs, the state signal is notified as a level signal, so that the state of the logical processor can be notified accurately. Further, by providing the physical processor state management function separately from the state information of the logical processor of the virtual machine, the state information of both the physical processor and the logical processor can be displayed together on the display unit. Also, since the state information of the non-virtual machine is stored separately from the state information of the logical processor of the virtual machine, the state information of both the non-virtual machine and the logical processor of the virtual machine can be selected and referred to according to the contents. Can be displayed on the display unit. Further, when a failure occurs in each logical processor, an alarm is issued to notify the operator, so that a quick response can be taken. Furthermore, by reporting the status information of each logical processor to the management host computer or the monitoring center, it becomes possible to remotely monitor and operate the virtual host including the virtual computer at the management host computer or the monitoring center. Become.

[0006]

Embodiments of the present invention will be described below in detail with reference to the drawings. FIG. 1 is a block diagram of an operation state display device showing an embodiment of the present invention and an electronic computer system to which the display device is applied. The computer system of this embodiment is a virtual computer 3 having both a physical processor and a logical processor.
A plurality of central processing units including a non-virtual computer 6 using only a physical processor and not using a logical processor;
A plurality of peripheral devices (not shown in FIG. 1 for simplicity) connected thereto, an operation state display device control unit 1 connected thereto, and signals from the operation state display device control unit 1 And an operation state display device display section 2 for receiving and displaying the received information. In the case of the non-virtual computer 6, the status signal of the physical processor 15 is transmitted to the status display interface 101.
Is input to the operation state display device control unit 1 via the. In the case of the virtual machine 3, a plurality of logical processors 4
a to 4n and a physical processor 14 accommodating them. Among them, the state signal of the physical processor 14 is input to the operation state display device control unit 1 via the state display interface 102. The status signals of the logical processors 4a to 4n in the virtual computer 3 are transmitted to the common control unit 5 and the status display interface of the virtual computer 3.
Is input to the operation state display device control unit 1 through the control unit 103.

As shown in FIG. 1, the operating state display device of this embodiment processes state information input from a computer,
An operation state display device control unit 1 that converts the information into display information;
An operation state display device display section 2 displays the state information input from the control section 1 on a screen to help monitor the operator. In this case, it is possible to install two or more operation state display devices, and the display unit 2
It is also possible to connect only a plurality of devices. The operating state display device controller 1 includes three state management tables 11 to 13.
, Three state management programs 8 to 10 and one state display program 7. The physical processor status management table 11 stores the status information of the physical processor 15 of the non-virtual machine 6 and the physical processor 1 of the virtual machine 3.
4 is held. The logical processor state management table 12 holds the state signals of the logical processors 4a to 4n of the virtual machine 3. Also, CPU
The attribute definition table 13 stores attribute information of all the central processing units connected to the operation state display device control unit 1. The non-virtual machine state management program 8 receives a state signal from the physical processor 15 of the non-virtual machine 6, and sequentially updates the contents of the physical processor state management table 11 with this signal.

[0008] The physical processor status management program 9
The status signal from the physical processor 14 of the virtual machine 3 is received, and the content of the physical processor status management table 11 is sequentially updated by this signal. The logical processor status management program 10 receives status information from the common control unit 5 of the virtual machine 3, and sequentially updates the logical processor status management table 12. The status display control program 7
Is the CP stored in the CPU attribute definition table 13.
With reference to the attribute information for each U, necessary information is read from the physical processor state management table 11 and the logical processor state management table 12 and sent to the operation state display device display unit 2 to be displayed on the screen. It should be noted that the management program in the operating state display device control unit 1 described above does not need to be stored collectively as one, and may be divided into two or more and stored. Further, the management tables 11 to 13 can be divided into two or more and stored.

FIG. 2 shows a CPU attribute definition table shown in FIG.
It is a figure showing the format of a bull. The CPU attribute definition table 13 defines information of all the central processing units connected to the operation state display device control unit 1 in the computer system in FIG. That is, the CPU number and C
The PU name is a unique number and name given to the central processing unit included in the computer system. The CPU type is information for distinguishing whether the central processing units are virtual machines or non-virtual machines, where V is a virtual machine and B is a non-virtual machine.
The status display interface address is provided to the operation status display device control unit 1 by each status display interface 101,1.
This is address information for specifying and handling status information input via the central processing units 02 and 103 as information of each central processing unit. As is apparent from FIG. display Intafe - for scan 102, 103 is connected to the operating state display control unit 1, there are those addresses x ₀₂ -y ₀₂ is common, only z _01, z ₀₂ that is subsequently added different . The LPAR number and LPAR name are unique numbers and names assigned to logical processors operating in the virtual machine indicated by the CPU name. For example, in the case of FIG. Are LPAR numbers 1 and SYS-1,
The logical processor 4b determines that the LPAR number 2 and the SYS-2
It is. Note that the portion following the table is also stored, but these are auxiliary information for displaying the status and are not so related to the present invention, so that the description is omitted.

FIGS. 3 and 4 are format diagrams of the physical processor state management table and the logical processor state management table in FIG. As shown in FIG. 3, the physical processor status management table 11 stores management information indicating a CPU number, a power supply status, whether or not operation is possible, and other statuses. The CPU number is the same as the number shown in FIG. 2 and is a unique number assigned to the central processing unit included in the computer system. POWER is the power status information of the non-virtual computer or the power status information of the physical processor of the non-virtual computer.
It is 1 when the power is on. READY is information indicating that the operating system has been started on the non-virtual machine, or information indicating that the virtual machine operating system has been started on the virtual machine. , 1 in the activated state. E
RROR is information indicating that the operating system is inoperable in the non-virtual machine, and is 0 in a normal state and 1 in an inoperable state. State 1, state 2,... State Nb, etc. are state information indicating other states at the physical processor level.

As shown in FIG. 4, the logical processor status management table 12 stores management information indicating the CPU number, the activation status of the virtual machine operating system, and whether or not the virtual machine operating system is disabled. I have. That is, the CPU number and the LPAR number are the same as the numbers shown in FIG.
A unique number assigned to the central processing unit included in the computer system, and a unique number assigned to the logical processor inside the virtual machine. These formats are configured so that even if all the central processing units are virtual machines, they can be sufficiently handled. READY is information indicating that the operating system for each logical processor of the virtual machine has been started, and is 0 when the operating system has not been started and 1 when it has been started. ERROR
Is information indicating that the operating system of each logical processor of the virtual machine is inoperable, and is 0 in a normal state and 1 in an inoperable state.
In other columns, state 1 to state Nv are state information indicating other states at the logical processor level.

FIG. 5 is a view showing a display example of the operation state display device display section shown in FIG. As shown in FIG. 5, the state of all the central processing units of the computer system is displayed on one screen, and the operator can monitor all the computers at a glance. Reference numerals 51, 52, and 53 denote CPU names, below which the respective power supply states, the operating state of the operating system, the state of inoperability, and the like are displayed. Markers 56 to 58, 59 to 61, and 62 to 64 displayed below the CPU name are displays of contents indicating the state of the corresponding computer, and 1 or 0 is displayed therein. . The SYS shown in 54 and 55
-1 and SYS-2 are LPs of the logical processor of the virtual machine
AR name. Markers 65 to 66 and 67 to 68 displayed under these LPAR names are L
This is a display of the content indicating the state of the logical processor of the PAR, and 1 or 0 is displayed in these. Of course, the central processing unit of the entire computer system may be divided and displayed instead of being displayed on one screen.

FIG. 6 is a block diagram showing a first embodiment of the state management function comprising the logical processor state management program of the virtual machine common control unit and the operation state display device control unit in FIG. In the present embodiment, the state information is once written in the table 21, and then the contents of the table 21 are read out and transferred, which differs from the direct transfer in the embodiment of FIG. ing. The common control unit 5 of the virtual machine 3 constantly monitors the logical processor state information table 21 for storing the state information of the logical processors 4a to 4n of the virtual machine 3 and the state change of each logical processor 4a to 4n. When a change is detected, a logical processor state monitoring program 23 for storing the change in the logical processor state information table 21 and transferring the state change information to the operation state display apparatus control section 1; When the initialization notification is received from the server, all the state information stored in the facial processor state information table 21 is read out, and is read out from the operating state display device controller 1.
And a logical processor state transfer program 22 for transferring the data to the processor. That is, the state information table 21 sequentially updates the constantly changing state information of the logical processor.
Always keeps the latest status, and the status transfer program 2
2 reads the latest information from the state information table 21 and transfers it to the control unit 1 when the operation state display device control unit 1 is started. The state monitoring program 23 constantly monitors the logical processor, and plays a role of updating the contents of the state information table 21 when a state change is detected. Of course,
Each of the programs 22 and 23 for realizing the function of the common control unit 5 of the virtual machine 3 can be divided into two or more.

In FIG. 6, an operation state display device control unit 1
The logical processor state management program 10 is composed of two subroutines, programs 24 and 25. One of them is to issue an initialization notification to the common control unit 5 of the virtual machine 3 when the operation state display device control unit 1 is initialized, and to be reported from the logical processor state transfer program 22 of the common control unit 5. Each logical processor 4a to 4n
Is a logical processor state resetting program 24 for receiving the state information of the logical processor and storing it in the logical processor state management table 12. The other one receives the status change information reported from the logical processor status monitoring program 23 of the common control unit 5 and writes it in the logical processor status management table 12 so that the contents of the table are sequentially changed. Logical processor state update program 2 for updating
5 Of course, the state resetting program 24 and the state updating program 25 can be divided into two or more.

FIG. 7 is a block diagram showing a second embodiment of the logical processor state management function. In this example,
The common control unit 5 of the virtual machine 3 and the state information management program 10 of the operation state display device control unit 1 are each configured as hardware, and connected between them using a contact point of a gateway. Direct transfer of state change information. The portion corresponding to the common control unit 5 of the virtual computer 3 in FIG.
Circuits 33a to 33c, which are provided directly to the logical processors, the number of which is equal to the number of the logical processors, and the output signal to the state signal logical unit 31 is set to 0 when the state of each of the logical processors 4a to 4n changes. Or a logical processor status signal transmission program 32 for instructing to invert to 1. On the other hand, the part corresponding to the logical processor state management program 10 of the operation state display device control unit 1 in FIG. 6 is a circuit 36 a that receives the state signals from the circuits 33 a to 33 c of the state signal transmission logic unit 31 of the virtual machine 3. Signal receiving logic unit 34 provided with the same number as the number of logical processors, and state signal receiving logic unit 3
The status of each logical processor is periodically taken from 4 and
A logical processor status signal receiving program 35 for writing status information of each of the logical processors 4a to 4n into the logical processor status management table 12.

In FIG. 1, state management of a non-virtual computer,
The state management of the physical processor of the virtual machine and the state management of the logical processor of the virtual machine will be described. According to the definition of the CPU attribute definition table 13, as shown in FIG.
A PU number (01), a CPU name (CPU-1), and other definition information are described. Table 1 in FIG.
3, the logical processor 4 a of the virtual machine 3
The CPU number (02), CPU name (CPU-2), and other definition information are described. In addition, Table 1
3, the logical processor 4 b of the virtual machine 3
The CPU number (03), CPU name (CPU-3), and other definition information are described. The virtual computer 3
The definition of the physical processor 14 alone is not described in FIG. 2, and here, in combination with the logical processor,
In the second and third rows of the table 13, the CPU number (0
2,03), CPU names (CPU-2, CPU-3),
Other definition information is described. When managing the status of non-virtual machines,

First, state management of a non-virtual computer will be described. In FIG. 1, the status signal of the non-virtual computer 6 is input to the operation status display device control unit 1 via the status display interface 101, and activates the non-virtual computer status management program 8. Non-virtual machine state management program 8
Reads the CPU attribute definition table 13 in the order of CPU number, reads only the CPU type 'B', that is, the non-virtual computer, and sends the status display information for the corresponding one to the status display program 7. And start this. As shown in FIG. 2, the CP of the non-virtual computer 6
Since the U type is defined as “B”, the non-virtual machine state management program 8 sends the CPU 1 status display interface address (x ₀₁₎ from the CPU attribute definition table 13.
−y ₀₁ ), and using this, the status information of the non-virtual computer 6 is fetched from the status display interface 101, and the area (CPU number 01) where the CPU number of the physical processor status management table 11 matches Or the area corresponding to 1), and the state information is symbolized into 1 and 0 and stored.

Next, the state management of the physical processor of the virtual machine will be described. In FIG. 1, the status signal of the physical processor 14 of the virtual machine 3 is indicated by a status display interface.
Input to the operating state display device control unit 1 via the server 102 to start the physical processor state management program 9. The physical processor status management program 9 refers to the CPU attribute definition table 13 in the order of the CPU number, and
Only those of type "V", that is, those of the virtual machine are read out, and processing is performed on these. As shown in FIG. 2, since the CPU type of the virtual machine 3 is defined as "V", the physical processor status management program 9 uses the CPU attribute definition table 13 to display the status display interface address (CPU) of the CPU-2. x ₀₂ -y ₀₂ ), and using this, the status information of the physical processor 14 of the virtual machine 3 is fetched from the status display interface 102, and the area corresponding to the CPU number of the physical processor status management table 11 is matched. The state information is symbolized as 1 and 0 and stored in (an area corresponding to CPU number 02 or 2).

Next, the state management of the logical processor of the virtual machine will be described. In FIG. 1, the status signals of the logical processors 4a to 4n of the virtual machine 3 pass through the common control unit 5 of the virtual machine 3 and the status display interface 1
03, which is input to the operation state display device control unit 1, and activates the logical processor state management program 10. The logical processor status management program 10 refers to the CPU attribute definition table 13 in the order of CPU numbers,
Only the CPU type of “V”, that is, the one of the virtual machine is read, and the processing is performed on these. As shown in FIG. 2, the logical processor 4a operating on the CPU-2 of the virtual machine 3 is SYS-1 and the logical processor 4b
Is defined as SYS-2. Therefore, the logical processor status management program 10 executes the CPU attribute definition text.
The status display interface address (x ₀₂ -y ₀₂ -z ₀₁ ) and LPAR number (1) corresponding to SYS-1 are read from the table 13 and the virtual computer is read from the status display interface 103 using these. 3, the state information of the corresponding logical processor 4a is fetched, and the state information is stored in the area (area where the CPU number is 2 and the LPAR number is 1) of the logical processor state management table 12 where the CPU number and the LPAR number match (1). , 0 and stored. The above is the processing for the logical processor 4a, but the processing for SYS-2 of the logical processor 4b is performed in exactly the same way.

Referring to FIG. 6, the state management of the logical processor of the virtual machine will be described in more detail. As shown in FIG. 6, the logical processor status monitoring program 23 of the common control unit 5 of the virtual machine 3 includes the virtual processors 4a to 4a.
The status of the n status signal is monitored, the status information is stored in the logical processor status information table 21, and the logical processor status information table 21 is constantly updated to the latest status information. When detecting a state change, the logical processor state monitoring program 23 creates state change information including a logical processor number (LPAR number), a state type, and a state value, and outputs the operation state via the state display interface 103. Logical processor status management program 1 of display device controller 1
Report to 0. When the logical processor status update program 25 in the logical processor status management program 10 in the operation status display device control unit 1 receives the report of the status change information from the logical processor status monitoring program 23 in the common control unit 5 of the virtual machine 3, Enter the status display interface address and LPAR number that received the status change information.
Then, by referring to the CPU attribute definition table 13 and specifying the CPU number and the LPAR number, the contents of the logical processor state management table 12 are updated.

Next, the logical processor status resetting program 24 included in the logical processor status management program 10 of the operating status display device control unit 1 in FIG. In order to guarantee the contents of the management table 12, an initialization notice is issued to the common control unit 5 of the virtual machine 3 to request the transfer of the state information of each of the logical processors 4a to 4n of the virtual machine 3. . The logical processor state transfer program 22 built in the common control unit 5 of the virtual machine 3
When receiving the initialization notification from the logical processor state resetting program 24 in the operation state display device control unit 1, the state information of each of the logical processors 4a to 4n of the virtual machine 3 is extracted from the logical processor state information table 21, and State information including a logical processor number (LPAR number), a state type, and a state value is created and reported to the operation state display device control unit 1. The logical processor state resetting program 24 of the logical processor state management program 10 in the operation state display device control unit 1 includes the logical processors 4 a to 4 reported from the logical processor state transfer program 22 in the common control unit 5 of the virtual machine 3. 4n, the status display interface address that received the status information and L
The CPU number and the LPAR number are specified by referring to the CPU attribute definition table 13 using the PAR number as a key, and the contents of the logical processor state management table 12 are reset. In the above description, one initialization notification is performed as a procedure between the operation state display device control unit 1 and the common control unit 5 of the virtual machine 3, which is performed for resetting data at the time of resetting. On the other hand, from the common control unit 5, each logical processor 4a
4n are reported together, but the present invention is not limited to this procedure. For example, the operation state display device control unit 1 inquires for each logical processor,
Only the status information of the specified logical processor may be returned from the common control unit 5 of the virtual machine 3.

FIG. 8 is a diagram showing the display conditions of the markers displayed on the display unit of the operation state display device according to the present invention.
The state display control program 7 in the operation state display device control unit 1 in FIG.
Referring to the U number order, when the CPU type is “B”, the CPU name is read from the CPU attribute definition table 13 and a display as shown in FIG. 5 is performed. That is, CPU name display frames 51, 52,
53 and the like are provided, and the CPU name is displayed there. Also,
When the CPU type is 'B' as described above, the CPU number is used as a key from the physical processor status management table 11 to read the status values such as POWER, READY, ERROR, and the like. The characters of the corresponding state type (ROWER, READY, etc.) below the CPU name display frames 51, 52, 53, etc. of the operation state display device display section 2 are displayed.
ERROR, etc.) on the left side 56, 57, 58, etc.
In this case, as shown in FIG. 8, the display color can be changed depending on the state value. Although not shown,
Of course, it is also possible to change and display the shape and size of the marker.

Next, the status display control program 7 of the operation status display device control unit 1 refers to the CPU attribute definition table 13 in the order of CPU number, and if the CPU type is "V", the CPU attribute definition CPU name and L from table 13
The PAR name is read out and, as shown in FIG. 5, the CPU name display frames 51, 52, 53 of the operation state display device display section 2.
Are provided to display the CPU name, and at the same time, the LPAR name is displayed by providing LPAR name display frames 54, 55 and the like. When the CPU type is "V", the CPU number is set as a key from the physical processor status management table 11 shown in FIG.
The status values such as Y, ERROR, etc. are read out, and the marker corresponding to the status value is indicated by the corresponding status type characters POWER, READY, ERR below the CPU name display frames 51, 52, 53, etc.
It is displayed on the left side 56, 57, 58, etc. of OR or the like. at the same time,
The logical processor status management table 12 shown in FIG.
Using the PU number and the LPAR number as keys, the status values such as READY and ERROR of each logical processor are read, and the marker corresponding to the status value is displayed on the LP of the operation status display unit display unit 2.
The corresponding state type characters READY, ERROR, etc. below the AR name display frames 54, 55 etc. are displayed on the left side 65, 66 etc.

Hereinafter, an application example of the present invention will be described with reference to FIG. The state display control program 7 in FIG.
When the state value of the state information indicating a failure such as RROR changes from '0' to '1', the alarm attached to the operation state display device display unit 2 is sounded. Of course, at the same time,
The operating state display unit 2 displays that the state type has changed. The state display control program 7 in FIG.
When a central processing unit serving as a management host is connected to the operation state display device control unit 1, when a state change is detected, the state change is displayed on the operation state display device display unit 2, and at the same time, the CPU number is displayed. , The status change notification information including the LPAR number, the status type, and the status value is created, and sent to the central processing unit having the role of the management host to issue a warning. Further, the status display control program 7 shown in FIG.
When the operating state display device control unit 1 is connected to a monitoring center via a network, if a state change is detected, the state change is displayed on the operating state display unit display unit 2, and at the same time, Status change notification information including a CPU number, an LPAR number, a status type, and a status value is created and reported to the monitoring center via a network.

The state display control program 7 shown in FIG.
When the operator presses a state reset request button added to the operation state display device display unit 2, the state reset request is received, and state reset instruction information including a CPU number, an LPAR number, and a state type is received. Create and
Contact the corresponding management programs 8, 9, and 10. That is, if the state is a non-virtual machine state, the non-virtual machine state management program 8 is used. If the state is a state of a physical processor of the virtual machine, the physical processor state management program 9 is used. If it is the state of the logical processor of the virtual machine, it notifies the logical processor state management program 10 of each. When receiving the status reset instruction information from the status display control program 7, the logical processor status management program 10
CPU attribute definition table 13 using LPAR number as key
Then, the corresponding status display interface address is read from the host, and using this, the status reset instruction information including the LPAR number and the status type is transferred from the status display interface 103 to the corresponding virtual machine 3 or the like. The common control unit 5 of the virtual machine 3 and the like executes the logical processor state management program 1
When receiving the state reset instruction information from 0, the state of the corresponding logical processor is reset based on the information.

[0026]

As described above, according to the present invention,
(A) Since the status information of each logical processor on the virtual machine is displayed and the latest status information is updated and displayed, the operation status of the virtual machine can be monitored on the display device, and the operation of the operator is easy. And the reliability of the system can be improved. Also, (b) by displaying the state information of each logical processor on the virtual machine and the state information of the virtual machine physical processor together,
The operation state of the virtual machine can be monitored more accurately. (C) By displaying the state information of each logical processor on the virtual machine and the state information of the non-virtual machine in a mixed manner, the operating state of the system in which the virtual machine and the non-virtual machine are mixed can be displayed on the operation state display device. Can be monitored collectively even in a large-scale system in which both computers coexist. Also, (d) displaying status information for each logical processor on the virtual machine,
When a state change that indicates the occurrence of a fault occurs in each logical processor, an alarm is sounded and the operator is notified, so that a quick response to the fault is possible. Also,
(E) When a state change occurs in each of the logical processors on the virtual machine to notify the occurrence of a failure, the change is notified to the operator, and the fact that the operator has recognized the failure state can be notified to a person at another position. The operator can be informed and the operator can instruct the reset of the fault state, so that the operation of the operator becomes easy and the fault can be quickly dealt with. (F) In addition to displaying the status information of each logical processor on the virtual machine on the operating status display device and communicating the status information to the management host, the management host can perform integrated operation and automatic operation of the system including the virtual machine. It can be carried out. Further, (g) the operating status display device displays the status information of each logical processor on the virtual machine and notifies the monitoring center, so that the monitoring center can remotely monitor and operate the system including the virtual machine at the monitoring center. Becomes possible.

[0027]

[Brief description of the drawings]

FIG. 1 is a block diagram showing an operation state display device and a computer system connected thereto according to an embodiment of the present invention.

FIG. 2 is a diagram showing a CP in an operation state display device control unit in FIG. 1;
It is a figure showing the format of a U attribute definition table.

FIG. 3 is a diagram showing a format of a physical processor state management table in an operation state display device control unit in FIG. 1;

FIG. 4 is a diagram showing a format of a logical processor state management table in the operation state display device control unit in FIG. 1;

FIG. 5 is a diagram showing a display example of an operation state display device display unit in FIG. 1;

FIG. 6 is a functional block diagram showing a first embodiment of a state information transfer unit between the common control unit of the virtual machine and the operation state display device control unit in FIG. 1;

FIG. 7 is a description block diagram showing a second embodiment of a state information transfer unit between the common control unit of the virtual machine and the operation state display device control unit in FIG. 1;

FIG. 8 is a diagram showing display conditions of a marker displayed on a display unit of an operation state display device in FIG. 1;

[Explanation of symbols]

 REFERENCE SIGNS LIST 1 operation state display device control unit 2 operation state display device display unit 3 virtual computer 4 a to 4 n logical processor 5 common control unit 6 non-virtual computer 7 state display control program 8 non-virtual computer state management program 9 physical processor state management program 10 logic Processor status management program 11 Physical processor status management table 12 Logical processor status management table 13 CPU attribute definition table 21 Logical processor status information table 22 Logical processor status transfer program 23 Logical processor status monitoring program 24 Logical processor State resetting program 25 Logical processor state updating program 31 State signal sending logic part 34 State signal receiving logic part 33a to 33c State signal transmitting circuit 36a to 36c State signal receiving circuit 32 Logical processor state No. transmission program 35 logical processor state signal reception program 101, 102, 103 status display Intafe - scan

Continuation of the front page (56) References JP-A-63-20549 (JP, A) JP-A-60-30080 (JP, U) (58) Fields investigated (Int. Cl. ⁶ , DB name) G06F 11 / 30-11/34

Claims (2)

(57) [Claims] 1. An electronic computer system comprising at least one central processing unit that operates while being divided into one or more logical processors, and a peripheral device connected to the central processing unit. Along with connecting an operating state display device for displaying state information for each logical processor, the central processing unit is provided with common control means for reporting the state information of each logical processor to the operating state display device,
The common control means includes a storage table for storing state information of each logical processor, a state change of each logical processor, the state change is stored in the storage table, and the state change is simultaneously stored in the operating state. comprising: a first processing means for reporting to the display device, upon receiving the initialization notification from the operating state display device, and a second processing means to report to the operating state display apparatus reads out the contents of the memory table The operating state display device includes a first management table for storing state information of each logical processor unit, and a second control unit of the common control unit in the central processing unit when initializing the operating state display device itself. by sending an initialization notification to the processing unit receives the status information that is reported from the processing means of the second, third and stores the status information in the first management table And processing means to receive said state change from each logical processor reported from the first processing means of the common control means in said central processing unit, first to update the contents of the first management table in said state change 4 processing hands
Stage and, above by referring to the contents of the first management table, electronic computer having an operating state display apparatus characterized by comprising a status display control means for displaying on the display unit the status of each logical processor system. 2. An electronic computer system comprising the operating state display device according to claim 1, wherein
The common control means includes, in addition to the means for supplying state information of each logical processor to the operation state display device, means for supplying state information of the physical processor to the operation state display device,
In addition to the first management table, the operating state display device constantly monitors the second management table for storing the state information of the physical processor and the state information of the physical processor supplied from the central processing unit. By referring to the physical processor status management means stored in the second management table and the first and second management tables, the status information of both the physical processor and each logical processor is displayed on the display unit. An electronic computer system provided with an operation state display device, comprising: a state display control means for causing the computer to operate.