JP2853741B2 - CDMA receiver - Google Patents

CDMA receiver

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Publication number
JP2853741B2
JP2853741B2 JP14496097A JP14496097A JP2853741B2 JP 2853741 B2 JP2853741 B2 JP 2853741B2 JP 14496097 A JP14496097 A JP 14496097A JP 14496097 A JP14496097 A JP 14496097A JP 2853741 B2 JP2853741 B2 JP 2853741B2
Authority
JP
Japan
Prior art keywords
axis
output
signal
unit
coefficient
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP14496097A
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Japanese (ja)
Other versions
JPH10336150A (en
Inventor
隆 東海林
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP14496097A priority Critical patent/JP2853741B2/en
Publication of JPH10336150A publication Critical patent/JPH10336150A/en
Application granted granted Critical
Publication of JP2853741B2 publication Critical patent/JP2853741B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、情報信号をその数
十から数百倍の速度を持つ信号で変調して伝送する符号
分割多元接続通信システムを用いた通信システムのCD
MA用受信装置に属する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a CD of a communication system using a code division multiple access communication system for modulating and transmitting an information signal with a signal having a speed several tens to several hundreds times faster.
It belongs to the MA receiver.

【0002】[0002]

【従来の技術】従来、符号分割多元接続通信システムを
用いたセルラー方式デジタル移動通信においては、受信
時にマルチパス伝搬路で発生する符号間干渉を除去する
技術として、適応型等価方式による干渉キャンセラのシ
ステムが用いられる。このシステムの従来技術として
は、特開平8−172419号公報に示された“CDM
A送受信機”がある。
2. Description of the Related Art Conventionally, in a cellular digital mobile communication using a code division multiple access communication system, as a technique for removing intersymbol interference generated on a multipath propagation path at the time of reception, an interference canceller using an adaptive equivalent system is known. A system is used. As a prior art of this system, a "CDM" disclosed in Japanese Patent Application Laid-Open No.
A transceiver ".

【0003】この従来技術は、受信信号の帯域制限を行
う受信フィルタと、分数間隔形等価により、受信信号を
そのn倍(nは任意の整数)のレートにサンプリングす
る分数間隔等価器とフィルタの係数更新アルゴリズムに
RLSアルゴリズムを用いたトランスバーサル形デジタ
ルフィルタによる波形等価器を備えている。
In this prior art, a reception filter that limits the band of a received signal and a fractionally-spaced equalizer and a filter that sample the received signal at a rate n times (n is an arbitrary integer) by fractional-space equalization are used. A waveform equalizer using a transversal digital filter using an RLS algorithm as a coefficient updating algorithm is provided.

【0004】従来技術では、トランスバーサル形デジタ
ルフィルタの出力と希望信号との差分を最小にするべ
く、RLSアルゴリズムによりトランスバーサルフィル
タのフィルタ係数の制御が行われる。
In the prior art, the filter coefficients of the transversal filter are controlled by the RLS algorithm in order to minimize the difference between the output of the transversal digital filter and the desired signal.

【0005】よって、従来技術では、マルチパス伝送路
における符号間干渉を除去するのに、上述の希望信号
(普通は予め送受間で決められたパイロット信号と該ユ
ーザに割り当てられた拡散符号を掛け合わせたもの)の
みで良く、この技術を用いた受信装置は、通信中の他ユ
ーザの情報を知ることができない移動局受信装置に主に
用いられている。
Therefore, in the prior art, in order to remove intersymbol interference in a multipath transmission line, the above-mentioned desired signal (usually multiplied by a pilot signal determined in advance between transmission and reception and a spreading code assigned to the user) is used. And the receiving device using this technique is mainly used for a mobile station receiving device which cannot know information of another user during communication.

【0006】[0006]

【発明が解決しようとする課題】しかしながら、従来技
術では上述の干渉キャンセルを行うためのトランスバー
サルフィルタ係数制御は、場合によっては電力を無駄に
消費するだけで受信信号の品質向上に寄与しないという
問題点がある。
However, in the prior art, the transversal filter coefficient control for performing the above-described interference cancellation is problematic in that, in some cases, the power is wasted but does not contribute to the improvement of the quality of the received signal. There is a point.

【0007】即ち、セルラーシステムのような一個の基
地局対複数の移動局という通信の場合には、移動局が受
信する下り信号は、各ユーザとも同期しているので、ユ
ーザ間の干渉は論理的にはないからである。
That is, in the case of communication of one base station versus a plurality of mobile stations as in a cellular system, the downlink signals received by the mobile stations are synchronized with each user, so that interference between users is logical. Because it is not.

【0008】よって、移動局に干渉信号として認識され
るのは、マルチパスとして移動局に届く自セル内の信号
か、他セルからの届く自セルとは非同期の信号である。
Therefore, what is recognized as an interference signal by the mobile station is a signal in the own cell which arrives at the mobile station as a multipath or a signal which is asynchronous from the own cell which arrives from another cell.

【0009】また、大ゾーン方式で隣接した基地局がな
い場合、移動局に干渉信号として認識されるのは、ゾー
ン内のマルチパス信号のみである。
When there is no adjacent base station in the large zone system, only multipath signals in the zone are recognized as interference signals by the mobile station.

【0010】これらの干渉信号がある場合は、従来の干
渉キャンセラは有効に動作し、受信信号の品質を高める
ことができるが、もしその移動局のいる場所において、
上記マルチパスや他セルからの干渉信号が存在しない場
合、RLSアルゴリズムの計算やフィルタ係数更新の動
作は無駄になる。特に電力供給に限界がある携帯の移動
局では、少しでも電力消費を減らすことが求められる
が、それに反して無駄な電力を消費することになる。
[0010] When these interference signals are present, the conventional interference canceller operates effectively and can improve the quality of the received signal.
If there is no multipath or interference signal from another cell, the calculation of the RLS algorithm and the operation of updating the filter coefficient become useless. In particular, a portable mobile station having a limited power supply is required to reduce power consumption as much as possible, but on the contrary, consumes unnecessary power.

【0011】それ故に本発明の課題は、スペクトラム拡
散を用いて情報を通信する通信方式において、特に移動
局側でシングルユーザ型の干渉キャンセラを用いる場
合、干渉キャンセラが必要もなく動作することを抑制
し、電力消費量を最小限に留めることができるCDMA
受信装置を提供することにある。
[0011] Therefore, an object of the present invention is to suppress the operation without the need for an interference canceller in a communication system for communicating information using spread spectrum, especially when a single-user type interference canceller is used on the mobile station side. And CDMA that can minimize power consumption
A receiving device is provided.

【0012】[0012]

【課題を解決するための手段】情報信号を、その数十倍
から数百倍の速度を持つ拡散信号で変調して伝送するス
ペクトラム拡散通信システムにおいて、直交復調された
受信信号を保持するためのI軸用、及びQ軸用の記憶手
段と、受信信号を逆拡散するための、係数をアダプティ
ブに変更可能な相関フィルタを実現するI軸用、及びQ
軸用のアダプティブフィルタと、前記アダプティブフィ
ルタに適用するフィルタ係数を選択するための選択手段
と、前記アダプティブフィルタの係数、もしくは後述す
るスライディング相関器のフィルタ係数を発生させる拡
散符号発生手段と、前記アダプティブフィルタに適用す
る伝送路の歪みを等価するための係数を計算する係数更
新手段と、受信信号を復調して、情報信号を取り出す検
波手段と、受信信号と前記拡散符号発生手段の出力を少
しずつずらしながら、最大相関点を検出するI軸用、及
びQ軸用のスライディング相関器と、前記スライディン
グ相関器の出力を自乗し、電力次元の信号とするI軸
用、及びQ軸用の自乗手段と、前記I軸用、及びQ軸用
の自乗手段の出力を加算し、希望信号電力値を生成し、
また最大相関点のタイミングを検出する加算手段と、受
信用基準タイミングを発生する、タイミング発生手段
と、前記スライディング相関器の出力に合わせ、前記タ
イミング発生手段の出力を遅延させる、遅延手段と、前
記加算手段の出力である電力次元信号の基準値を格納し
ておく第一の記憶手段と、前記加算手段の出力と、前記
第一の記憶手段の出力を比較し、条件を満たす回数を係
数する第一の比較手段と、第一の比較手段の出力である
計数結果の基準値を格納する第二の記憶手段と、第一の
比較手段の出力する計数結果と第二の記憶手段の出力を
比較し、前記選択手段、前記係数更新手段へ制御信号を
出力する第二の比較手段とを具備することを特徴とする
CDMA用受信装置が得られる。
SUMMARY OF THE INVENTION In a spread spectrum communication system for modulating and transmitting an information signal with a spread signal having a speed of several tens to several hundreds times that of the information signal, a signal for holding a quadrature demodulated received signal is provided. I-axis and Q-axis storage means, and I-axis and Q-axis realizing a correlation filter capable of adaptively changing coefficients for despreading a received signal.
An adaptive filter for axes, a selection unit for selecting a filter coefficient to be applied to the adaptive filter, a spreading code generation unit for generating a coefficient of the adaptive filter, or a filter coefficient of a sliding correlator described below, Coefficient updating means for calculating a coefficient for equalizing distortion of a transmission line applied to a filter; detecting means for demodulating a received signal to extract an information signal; and gradually outputting a received signal and an output of the spreading code generating means. I-axis and Q-axis sliding correlators for detecting the maximum correlation point while shifting, and squaring means for the I-axis and Q-axis for squaring the output of the sliding correlator to obtain a power-dimensional signal. And the outputs of the I-axis and Q-axis squaring means to generate a desired signal power value,
Addition means for detecting the timing of the maximum correlation point; timing generation means for generating a reference timing for reception; delay means for delaying the output of the timing generation means in accordance with the output of the sliding correlator; A first storage unit for storing a reference value of a power dimension signal which is an output of the addition unit, an output of the addition unit and an output of the first storage unit are compared, and the number of times that the condition is satisfied is coefficientd. The first comparing means, the second storing means for storing the reference value of the counting result which is the output of the first comparing means, and the counting result output from the first comparing means and the output of the second storing means. A CDMA receiving apparatus is provided, comprising: a comparison unit that outputs a control signal to the selection unit and the coefficient updating unit.

【0013】[0013]

【作用】本発明のCDMA受信装置では、例えば大ゾー
ン方式の無線システムで隣接基地局がない場合はパス数
による受信方式の切替を、またセルラーシステムにおい
ては受信信号の品質による受信方式の切替を、更に移動
局での受信状態を正確に把握するために、パス数と受信
品質の両方による受信方式の切替を制御するように、各
判定用の信号(パス数や、受信品質)の測定器と受信方
式切替器とを持ち、必要のない時は干渉キャンセラの動
作を停止し通常のマッチトフィルタ受信を行う構成を採
用した。
According to the CDMA receiving apparatus of the present invention, for example, when there is no adjacent base station in a large zone wireless system, switching of the receiving system is performed by the number of paths, and in a cellular system, switching of the receiving system is performed by the quality of a received signal. And a measuring device for each determination signal (the number of paths and the reception quality) so as to control the switching of the reception method based on both the number of paths and the reception quality in order to accurately grasp the reception state at the mobile station. And a reception system switch, and when unnecessary, the operation of the interference canceller is stopped to perform a normal matched filter reception.

【0014】本発明によると、パス数や受信品質によっ
て、上述の干渉信号の存在を認める場合は、干渉キャン
セラは有効に動作し、受信信号の品質を高めることがで
きるが、もしその移動局のいる場所において干渉信号が
存在しない場合、RLSアルゴリズムの計算やフィルタ
係数更新の動作を停止して電力消費を減らすことが可能
となる。
According to the present invention, when the presence of the above-mentioned interference signal is recognized based on the number of paths and the reception quality, the interference canceller operates effectively and can improve the quality of the reception signal. When there is no interference signal in the place where the current position is, the calculation of the RLS algorithm and the operation of updating the filter coefficient are stopped to reduce the power consumption.

【0015】[0015]

【発明の実施の形態】次に、本発明のCDMA受信装置
の第一及び第三実施の形態について図面を参照して説明
する。これら第一及び第三実施の形態のCDMA受信装
置は、情報信号を、その数十倍から数百倍の速度を持つ
拡散信号で変調して伝送するスペクトラム拡散通信シス
テムにおいて採用されるものである。
Next, first and third embodiments of the CDMA receiver according to the present invention will be described with reference to the drawings. The CDMA receivers of the first and third embodiments are employed in a spread spectrum communication system for modulating and transmitting an information signal with a spread signal having a speed of several tens to several hundred times that of the information signal. .

【0016】図1は本発明の第一の実施の形態のCDM
A受信装置の回路構成図である。図2は本発明の第二の
実施の形態のCDMA受信装置の回路構成図である。図
3は本発明の第三の実施の形態のCDMA受信装置の回
路構成図である。
FIG. 1 shows a CDM according to a first embodiment of the present invention.
FIG. 3 is a circuit configuration diagram of an A receiving device. FIG. 2 is a circuit configuration diagram of the CDMA receiver according to the second embodiment of the present invention. FIG. 3 is a circuit configuration diagram of the CDMA receiver according to the third embodiment of the present invention.

【0017】図1において、本発明の第一の実施の形態
のCDMA受信装置は、直交復調された受信信号を保持
するためのIレジスタ(I軸用の記憶手段)101及び
Qレジスタ(Q軸用の記憶手段)102と、受信信号を
逆拡散するための係数をアダプティブに変更可能な相関
フィルタを実現するI軸相関フィルタ(I軸用のアダプ
ティブフィルタ)103及びQ軸相関フィルタ(Q軸用
のアダプティブフィルタ)104と、I軸相関フィルタ
103及びQ軸相関フィルタ104に適用するフィルタ
係数を選択するための選択器(選択手段)105とを具
備する。
In FIG. 1, a CDMA receiving apparatus according to a first embodiment of the present invention includes an I register (I axis storage means) 101 for holding a quadrature demodulated received signal and a Q register (Q axis). Storage means) 102, an I-axis correlation filter (I-axis adaptive filter) 103 and a Q-axis correlation filter (Q-axis correlation filter) for realizing a correlation filter capable of adaptively changing a coefficient for despreading a received signal. (An adaptive filter) 104 and a selector (selecting means) 105 for selecting a filter coefficient to be applied to the I-axis correlation filter 103 and the Q-axis correlation filter 104.

【0018】さらに、CDMA受信装置は、I軸相関フ
ィルタ103及びQ軸相関フィルタ104の係数、もし
くは後述するI軸スライディング相関器111及びQ軸
スライディング相関器112のフィルタ係数を発生させ
る拡散符号発生器(拡散符号発生手段)106と、I軸
相関フィルタ103及びQ軸相関フィルタ104に適用
する伝送路の歪みを等価するための係数を計算する係数
更新器(係数更新手段)107と、受信信号を復調し
て、情報信号を取り出す検波器(検波手段)108と、
受信信号と拡散符号発生器106の出力を少しずつずら
しながら、最大相関点を検出するI軸用スライディング
相関器111及びQ軸スライディング相関器112とを
具備する。
Further, the CDMA receiver includes a spreading code generator for generating coefficients of the I-axis correlation filter 103 and the Q-axis correlation filter 104 or filter coefficients of an I-axis sliding correlator 111 and a Q-axis sliding correlator 112, which will be described later. (Spreading code generating means) 106, a coefficient updater (coefficient updating means) 107 for calculating a coefficient for equalizing distortion of a transmission line applied to the I-axis correlation filter 103 and the Q-axis correlation filter 104, and a received signal A detector (detection means) 108 for demodulating and extracting an information signal;
An I-axis sliding correlator 111 and a Q-axis sliding correlator 112 for detecting a maximum correlation point while slightly shifting the output of the received signal and the output of the spreading code generator 106 are provided.

【0019】さらに、CDMA受信装置は、I軸用スラ
イディング相関器111及びQ軸スライディング相関器
112の出力を自乗し、電力次元の信号とするI軸用の
自乗器(I軸用の自乗手段)113及びQ軸用の自乗器
(Q軸用の自乗手段)114と、I軸用、及びQ軸用の
自乗器113、114の出力を加算し、希望信号電力値
を生成し、また最大相関点のタイミングを検出する加算
器(加算手段)115と、受信用基準タイミングを発生
するタイミング発生回路(タイミング発生手段)110
と、I軸スライディング相関器111及びQ軸スライデ
ィング相関器112の出力に合わせ、タイミング発生回
路110の出力を遅延させる遅延器(遅延手段)109
と、加算器115の出力である電力次元信号の基準値を
格納しておく第一のパルスレベルしきい値レジスタ(第
一の記憶手段)117と、加算器115の出力とパルス
レベルしきい値レジスタ117の出力を比較し、条件を
満たす回数を係数する第一の比較器(第一の比較手段)
116と、比較器116の出力である計数結果の基準値
を格納する第二のパルスレベルしきい値レジスタ(第二
の記憶手段)118と、第一の比較器116の出力する
計数結果と第二のパルスレベルしきい値レジスタ118
の出力を比較し、選択器105、係数更新器107へ制
御信号を出力する第二の比較器(第二の比較手段)11
9とを具備する。
Further, the CDMA receiving apparatus squares the outputs of the I-axis sliding correlator 111 and the Q-axis sliding correlator 112 to generate a power-dimensional signal as an I-axis squarer (I-axis squarer). 113 and the outputs of the squarer for the Q axis (squaring means for the Q axis) 114 and the outputs of the squarers 113 and 114 for the I axis and the Q axis to generate a desired signal power value, and the maximum correlation Adder (addition means) 115 for detecting the timing of a point, and timing generation circuit (timing generation means) 110 for generating a reference timing for reception
And a delay unit (delay means) 109 for delaying the output of the timing generation circuit 110 in accordance with the outputs of the I-axis sliding correlator 111 and the Q-axis sliding correlator 112.
A first pulse level threshold value register (first storage means) 117 for storing a reference value of a power dimension signal output from the adder 115; an output of the adder 115 and a pulse level threshold value A first comparator that compares the output of the register 117 and counts the number of times that the condition is satisfied (first comparing means)
116, a second pulse level threshold register (second storage means) 118 for storing a reference value of the counting result output from the comparator 116, and a counting result output from the first comparator 116 Second pulse level threshold register 118
And outputs a control signal to the selector 105 and the coefficient updater 107 (second comparing means) 11
9 is provided.

【0020】次に、本発明の第一の実施の形態のCDM
A受信装置の動作について図1を参照して説明する。
Next, the CDM according to the first embodiment of the present invention
The operation of the A receiver will be described with reference to FIG.

【0021】図1において、直交復調された受信信号
は、I軸スライディング相関器111及びQ軸スライデ
ィング相関器112に入力される。I軸スライディング
相関器111とQ軸スライディング相関器112では、
1/nチップずつ(nは任意の整数)ずつずらしなが
ら、拡散符号発生器106が発生する、送信側で用いら
れた拡散符号のレプリカと受信信号I軸、Q軸それぞれ
の相互相関がmシンボル分(mは任意の整数)計算され
る。
In FIG. 1, the orthogonally demodulated received signal is input to an I-axis sliding correlator 111 and a Q-axis sliding correlator 112. In the I-axis sliding correlator 111 and the Q-axis sliding correlator 112,
The cross-correlation between the replica of the spreading code used on the transmission side and the I-axis and Q-axis of the received signal generated by the spreading code generator 106 while shifting by 1 / n chips (n is an arbitrary integer) is m symbols. Minutes (m is any integer) are calculated.

【0022】計算された相互相関値は、I軸用及びQ軸
用の自乗器113,114で、I軸、Q軸それぞれが各
1/nチップ毎に自乗されて、加算器115で加算され
る。加算器115では、相互相関値の最大値を与えるタ
イミングが抽出されて、遅延器109に与えられる。遅
延器109では、タイミング発生回路110の出力を遅
延させて、Iレジスタ101とQレジスタ102とが最
適なタイミングで受信信号を取り込めるように、タイミ
ング位置を指示する。
The calculated cross-correlation values are squared by the I-axis and Q-axis squarers 113 and 114 for the I-axis and the Q-axis for each 1 / n chip, and added by the adder 115. You. The adder 115 extracts the timing at which the maximum value of the cross-correlation value is obtained and supplies the extracted timing to the delay unit 109. The delay unit 109 instructs the timing position so that the output of the timing generation circuit 110 is delayed so that the I register 101 and the Q register 102 can receive the received signal at the optimal timing.

【0023】更に加算器115では、I軸信号の自乗値
とQ軸信号の自乗値の加算により、希望信号の電力値が
出力され、その出力は第一の比較器116において、パ
スのレベルのしきい値を保持する第一のパスレベルしき
い値レジスタ117と比較される。
Further, the adder 115 outputs the power value of the desired signal by adding the square value of the I-axis signal and the square value of the Q-axis signal, and the output is output from the first comparator 116 to the level of the path. The threshold value is compared with a first pass level threshold value register 117 which holds the threshold value.

【0024】もし、加算器115の出力が第一のしきい
値レジスタ117の値より大きければ、有効な受信パス
として数える。第二の比較器119では、その数えられ
た有効なパス数を、パス数のしきい値を保持する第二の
パス数しきい値レジタス118の出力と比較し、有効な
パス数が第二のパス数しきい値レジスタ118の保持す
る値より小さければ、第二の比較器119は選択器10
5を操作し、I軸相関フィルタ103、Q軸相関フィル
タ104に逆拡散用の係数として拡散符号発生器106
の出力を与える。
If the output of the adder 115 is larger than the value of the first threshold register 117, it is counted as a valid reception path. The second comparator 119 compares the counted number of valid paths with the output of the second path number threshold register 118 that holds the threshold of the number of paths, and determines that the number of valid paths is equal to the second number. If the value is smaller than the value held in the pass number threshold register 118, the second comparator 119
5 to the I-axis correlation filter 103 and the Q-axis correlation filter 104 as spreading code generators 106 as despreading coefficients.
Gives the output of

【0025】また、有効なパス数が第二のパス数しきい
値レジスタ118の保持する値より大きれば、第二の比
較器119は選択器105を操作し、I軸相関フィルタ
103、Q軸相関フィルタ104に逆拡散用の係数とし
て係数更新器107の出力を与える。
If the number of valid passes is larger than the value stored in the second pass number threshold register 118, the second comparator 119 operates the selector 105 to cause the I-axis correlation filter 103, Q The output of the coefficient updater 107 is given to the axis correlation filter 104 as a coefficient for despreading.

【0026】また、I軸信号、Q軸信号としてそれぞれ
Iレジスタ101、Qレジスタ102に入力された受信
信号はIレジスタ101、Qレジスタ102でタイミン
グ発生回路110の発生する時間位置を遅延器109が
指示する遅延量だけ遅らせた時間位置から、順次任意の
kシンボル(kは任意の整数)を取り込み、I軸相関フ
ィルタ103、Q軸相関フィルタ104に入力する。
The received signals input to the I-register 101 and the Q-register 102 as the I-axis signal and the Q-axis signal, respectively, are used by the I-register 101 and the Q-register 102 to determine the time position generated by the timing generator 110 by the delay unit 109. Arbitrary k symbols (k is an arbitrary integer) are sequentially fetched from the time position delayed by the designated delay amount, and input to the I-axis correlation filter 103 and the Q-axis correlation filter 104.

【0027】I軸相関フィルタ103、Q軸相関フィル
タ104では、選択器105によって選択された拡散符
号発生器106の発生する送信側で用いられた拡散符号
のレプリカか、もしくは選択器105によって選択され
た係数更新器107の出力する、通信路の歪み、干渉信
号を補償したフィルタ係数によって、それぞれI軸、Q
軸の逆拡散を行う。
In the I-axis correlation filter 103 and the Q-axis correlation filter 104, a replica of the spreading code used on the transmitting side generated by the spreading code generator 106 selected by the selector 105 or selected by the selector 105. The I-axis and the Q-axis are respectively determined by the filter coefficients that compensate for the distortion of the communication path and the interference signal output from the updated coefficient updater 107.
Perform axis despreading.

【0028】係数更新器107では、受信信号中に含ま
れる既知のパイロット信号を利用して、RLSアルゴリ
ズム、LMSアルゴリズム等により、I軸相関フィルタ
103、Q軸相関フィルタ104の出力する受信信号と
既知信号の誤差電力が最小になるように、I軸相関フィ
ルタ103、Q軸相関フィルタ104のフィルタ係数を
拡散信号のレプリカから通信路上の歪みを補償する係数
へと変更していく。
The coefficient updater 107 uses a known pilot signal included in the received signal and performs an RLS algorithm, an LMS algorithm, or the like, and compares the received signal output from the I-axis correlation filter 103 and the Q-axis correlation filter 104 with the known signal. The filter coefficients of the I-axis correlation filter 103 and the Q-axis correlation filter 104 are changed from replicas of spread signals to coefficients for compensating for distortion on the communication channel so that the error power of the signal is minimized.

【0029】また係数更新器107では、比較器119
の出力により選択器105でフィルタ係数として拡散符
号発生器106の出力が選択されている場合は、その動
作が停止され、計算されたフィルタ係数も拡散符号発生
器106の出力にリセットされる。
In the coefficient updating unit 107, a comparator 119
If the output of the spread code generator 106 is selected as a filter coefficient by the selector 105 according to the output of the above, the operation is stopped, and the calculated filter coefficient is also reset to the output of the spread code generator 106.

【0030】I軸相関フィルタ103、Q軸相関フィル
タ104で逆拡散された受信信号は、検波器108、係
数更新器107に入力される。検波器108は、I軸相
関フィルタ103、Q軸相関フィルタ104の出力を検
波し、送信された情報信号を復調データとして取り出
す。
The received signal despread by the I-axis correlation filter 103 and the Q-axis correlation filter 104 is input to a detector 108 and a coefficient updater 107. The detector 108 detects the outputs of the I-axis correlation filter 103 and the Q-axis correlation filter 104 and extracts the transmitted information signal as demodulated data.

【0031】次に本発明の第二の実施の形態のCDMA
受信装置について説明する。
Next, the CDMA according to the second embodiment of the present invention
The receiving device will be described.

【0032】図2において、本発明の第二の実施の形態
のCDMA受信装置は、直交復調された受信信号を保持
するためのIレジスタ(I軸用の記憶手段)101及び
Qレジスタ(Q軸用の記憶手段)102と、受信信号を
逆拡散するための係数をアダプティブに変更可能な相関
フィルタを実現するI軸相関フィルタ(I軸用のアダプ
ティブフィルタ)103及びQ軸相関フィルタ(Q軸用
のアダプティブフィルタ)104と、I軸相関フィルタ
103及びQ軸相関フィルタ104に適用するフィルタ
係数を選択するための選択器(選択手段)105とを具
備する。
In FIG. 2, a CDMA receiving apparatus according to a second embodiment of the present invention includes an I register (storage means for I axis) 101 and a Q register (Q axis) for holding a quadrature demodulated received signal. Storage means) 102, an I-axis correlation filter (I-axis adaptive filter) 103 and a Q-axis correlation filter (Q-axis correlation filter) for realizing a correlation filter capable of adaptively changing a coefficient for despreading a received signal. (An adaptive filter) 104 and a selector (selecting means) 105 for selecting a filter coefficient to be applied to the I-axis correlation filter 103 and the Q-axis correlation filter 104.

【0033】さらに、CDMA受信装置は、I軸相関フ
ィルタ103及びQ軸相関フィルタ104の係数、もし
くは後述するI軸スライディング相関器111及びQ軸
スライディング相関器112のフィルタ係数を発生させ
る拡散符号発生器(拡散符号発生手段)106と、I軸
相関フィルタ103及びQ軸相関フィルタ104に適用
する伝送路の歪みを等価するための係数を計算する係数
更新器(係数更新手段)107と、受信信号を復調し
て、情報信号を取り出す検波器(検波手段)108と、
受信信号と拡散符号発生器106の出力を少しずつずら
しながら、最大相関点を検出するI軸用スライディング
相関器111及びQ軸スライディング相関器112とを
具備する。
Further, the CDMA receiver includes a spread code generator for generating coefficients of the I-axis correlation filter 103 and the Q-axis correlation filter 104 or filter coefficients of an I-axis sliding correlator 111 and a Q-axis sliding correlator 112 described later. (Spreading code generating means) 106, a coefficient updater (coefficient updating means) 107 for calculating a coefficient for equalizing distortion of a transmission line applied to the I-axis correlation filter 103 and the Q-axis correlation filter 104, and a received signal A detector (detection means) 108 for demodulating and extracting an information signal;
An I-axis sliding correlator 111 and a Q-axis sliding correlator 112 for detecting a maximum correlation point while slightly shifting the output of the received signal and the output of the spreading code generator 106 are provided.

【0034】さらに、CDMA受信装置は、I軸用スラ
イディング相関器111及びQ軸スライディング相関器
112の出力を自乗し、電力次元の信号とするI軸用の
自乗器(I軸用の自乗手段)113及びQ軸用の自乗器
(Q軸用の自乗手段)114と、I軸用及びQ軸用の自
乗器113、114の出力を加算し、希望信号電力値を
生成し、また最大相関点のタイミングを検出する第一の
加算器(第一の加算手段)と、受信用基準タイミングを
発生するタイミング発生回路(タイミング発生手段)1
10とを具備する。
Further, the CDMA receiving apparatus squares the outputs of the I-axis sliding correlator 111 and the Q-axis sliding correlator 112 to obtain a power-dimensional signal as an I-axis squarer (I-axis squarer). 113 and the outputs of the squarer for the Q axis (square means for the Q axis) 114 and the outputs of the squarers 113 and 114 for the I axis and the Q axis to generate a desired signal power value, Adder (first adding means) for detecting the timing of the above, and a timing generating circuit (timing generating means) 1 for generating a reference timing for reception 1
10 is provided.

【0035】さらに、CDMA受信装置は、I軸及びQ
軸スライディング相関器111、112の出力に合わ
せ、タイミング発生回路110の出力を遅延させる遅延
器(遅延手段)109と、受信信号の電力次元の信号を
算出するための、第二のI軸用の自乗器(第二のI軸用
の自乗手段)120及び第二のQ軸用の自乗器(第二の
Q軸用の手段)121と、第二のI軸用、及びQ軸用の
自乗器120、121の出力を加算して受信信号電力値
にする第二の加算器(第二の加算手段)122と、第一
の加算器115の出力する希望信号電力値と第二の加算
器122の出力する受信信号電力値の差を、後述する割
り算器(割り算手段)124に出力する減算器(減算手
段)123と、第一の加算器115の出力と減算器12
3の出力の比を算出し、受信品質信号とする割り算器1
24と、割り算器124の出力する受信品質信号の基準
値を格納するSIRしきい値レジスタ(記憶手段)12
5と、割り算器124の出力と、SIRしきい値レジス
タ125の出力を比較し、選択器105、係数更新器1
07へ制御信号を出力する第二の比較器(第二の比較手
段)126とを具備する。
Further, the CDMA receiver has an I-axis and a Q-axis.
A delay unit (delay means) 109 for delaying the output of the timing generation circuit 110 in accordance with the outputs of the axis sliding correlators 111 and 112, and a second I-axis for calculating a power dimension signal of the received signal. Squarer (second I-axis squaring means) 120 and second Q-axis squaring means (second Q-axis means) 121, second I-axis and Q-axis squaring Adder (second adding means) 122 that adds the outputs of the adders 120 and 121 to a received signal power value, and the desired signal power value output from the first adder 115 and the second adder A subtractor (subtraction unit) 123 that outputs a difference between the received signal power values output from the subtracter 122 to a divider (division unit) 124 described later, an output of the first adder 115 and the subtractor 12.
3 which calculates the ratio of the outputs of the three and uses it as the reception quality signal
24, an SIR threshold register (storage means) 12 for storing a reference value of the reception quality signal output from the divider 124.
5, the output of the divider 124 and the output of the SIR threshold register 125 are compared, and the selector 105 and the coefficient updater 1
And a second comparator (second comparing means) 126 for outputting a control signal to the control signal 07.

【0036】次に、本発明の第二の実施の形態のCDM
A受信装置の動作について図2を参照して説明する。
Next, the CDM according to the second embodiment of the present invention
The operation of the A receiver will be described with reference to FIG.

【0037】図2において、Iレジスタ101、Qレジ
スタ102、I軸相関フィルタ103、Q軸相関フィル
タ104、選択器105、拡散符号発生器106、係数
更新器107、検波器108、遅延器109、タイミン
グ発生回路110、I軸スライディング相関器111、
Q軸スライディング相関器112、自乗器113,11
4、加算器115の動作については第一の実施の形態で
述べている動作と同一のため省略する。本実施の形態で
は、第一の実施の形態での選択器105と係数更新器1
07の制御信号を受信パス数によるものから、受信信号
品質によるものに変更する。
In FIG. 2, I register 101, Q register 102, I axis correlation filter 103, Q axis correlation filter 104, selector 105, spreading code generator 106, coefficient updater 107, detector 108, delay unit 109, A timing generation circuit 110, an I-axis sliding correlator 111,
Q-axis sliding correlator 112, squarers 113 and 11
4. The operation of the adder 115 is the same as the operation described in the first embodiment, and will not be described. In the present embodiment, the selector 105 and the coefficient updater 1 in the first embodiment
The control signal 07 is changed from one based on the number of reception paths to one based on the received signal quality.

【0038】本実施の形態では、入力されたI軸、およ
びQ軸信号は、第二の自乗器120,121によってそ
れぞれ自乗され、第二の加算器122で加算される。第
二の加算器122の出力は受信信号全電力を表し、第一
の加算器115の出力は希望信号の受信電力を表すの
で、その差分が干渉信号の電力である。
In this embodiment, the input I-axis and Q-axis signals are squared by second squarers 120 and 121, respectively, and added by a second adder 122. Since the output of the second adder 122 represents the total power of the received signal and the output of the first adder 115 represents the received power of the desired signal, the difference is the power of the interference signal.

【0039】よって減算器123で受信信号全電力から
希望信号の電力が減算されて干渉信号の電力となる。割
り算器124では、第一の加算器115が出力する希望
信号の電力と減算器123の出力する干渉信号の電力の
比が計算され、受信品質情報を表す希望波対干渉波信号
比(以下SIRとする)となる。
Therefore, the power of the desired signal is subtracted from the total power of the received signal by the subtractor 123 to become the power of the interference signal. The divider 124 calculates the ratio of the power of the desired signal output from the first adder 115 to the power of the interference signal output from the subtractor 123, and calculates a desired signal to interference signal ratio (hereinafter referred to as SIR) representing reception quality information. ).

【0040】比較器126ではSIR比しきい値レジス
タ125が出力するSIRのしきい値と受信信号のSI
R値が比較され、受信信号のSIR値がSIR比しきい
値レジスタ125が出力するSIRのしきい値より大き
ければ、第二の比較器126は選択器105を操作し、
I軸相関フィルタ103、Q軸相関フィルタ104に逆
拡散用の係数として拡散符号発生器106の出力を与え
る。
In the comparator 126, the SIR threshold value output from the SIR ratio threshold value register 125 and the SI
The R values are compared, and if the SIR value of the received signal is larger than the SIR threshold value output from the SIR ratio threshold value register 125, the second comparator 126 operates the selector 105,
The output of the spreading code generator 106 is given to the I-axis correlation filter 103 and the Q-axis correlation filter 104 as despreading coefficients.

【0041】また、受信信号のSIR比しきい値レジス
タ125が出力するSIRのしきい値より小さければ、
第二の比較器126は選択器105を操作し、I軸相関
フィルタ103、Q軸相関フィルタ104に逆拡散用の
係数として係数更新器107の出力を与える。
If the received signal is smaller than the SIR threshold output from the SIR ratio threshold register 125,
The second comparator 126 operates the selector 105 to supply the I-axis correlation filter 103 and the Q-axis correlation filter 104 with the output of the coefficient updater 107 as a coefficient for despreading.

【0042】次に本発明の第三の実施の形態のCDMA
受信装置について説明する。
Next, the CDMA according to the third embodiment of the present invention
The receiving device will be described.

【0043】図3において、本発明の第一の実施の形態
のCDMA受信装置は、Iレジスタ101、Qレジスタ
102、I軸相関フィルタ103、Q軸相関フィルタ1
04、選択器105、拡散符号発生器106、係数更新
器107、検波器108、遅延器109、タイミング発
生回路110、I軸スライディング相関器111、Q軸
スライディング相関器112、第一のI軸用の自乗器1
13,第一のQ軸用の自乗器114,第二のI軸用の自
乗器120,第二のQ軸用の自乗器121、第一の加算
器115,第二の加算器122、第一の比較器116,
第二の比較器119,第三の比較器126、パスレベル
しきい値レジスタ(第一の記憶手段)117、パス数し
きい値レジスタ(第二の記憶手段)122、減算器12
3、割り算器124、SIR比しきい値レジスタ125
(第三の記憶手段)、AND回路(論理積回路)127
から構成される。
Referring to FIG. 3, a CDMA receiver according to the first embodiment of the present invention includes an I register 101, a Q register 102, an I axis correlation filter 103, and a Q axis correlation filter 1.
04, selector 105, spreading code generator 106, coefficient updater 107, detector 108, delay unit 109, timing generation circuit 110, I-axis sliding correlator 111, Q-axis sliding correlator 112, for the first I-axis The squarer 1
13, a first Q-axis squarer 114, a second I-axis squarer 120, a second Q-axis squarer 121, a first adder 115, a second adder 122, One comparator 116,
Second comparator 119, third comparator 126, pass level threshold register (first storage means) 117, pass number threshold register (second storage means) 122, subtractor 12
3. Divider 124, SIR ratio threshold register 125
(Third storage means), AND circuit (logical product circuit) 127
Consists of

【0044】次に、本発明の第三の実施の形態のCDM
A受信装置の動作について図3を参照して説明する。
Next, the CDM according to the third embodiment of the present invention will be described.
The operation of the A receiver will be described with reference to FIG.

【0045】図3において、Iレジスタ101、Qレジ
スタ102、I軸相関フィルタ103、Q軸相関フィル
タ104、選択器105、拡散符号発生器106、係数
更新器107、検波器108、遅延器109、タイミン
グ発生回路110、I軸スライディング相関器111、
Q軸スライディング相関器112、第一のI軸用の自乗
器113,第一のQ軸用の自乗器114,第二のI軸用
の自乗器120,第二のQ軸用の自乗器121、第一の
加算器115,第二の加算器122、第一の比較器11
6,第二の比較器119,第三の比較器126、パスレ
ベルしきい値レジスタ117、パス数しきい値レジスタ
118、減算器123、割り算器124、SIR比しき
い値レジスタ125の動作については第一、及び第二の
実施の形態で述べている動作と同一のため省略する。
In FIG. 3, an I register 101, a Q register 102, an I axis correlation filter 103, a Q axis correlation filter 104, a selector 105, a spreading code generator 106, a coefficient updater 107, a detector 108, a delay unit 109, A timing generation circuit 110, an I-axis sliding correlator 111,
Q-axis sliding correlator 112, first I-axis squarer 113, first Q-axis squarer 114, second I-axis squarer 120, second Q-axis squarer 121 , First adder 115, second adder 122, first comparator 11
6, operation of second comparator 119, third comparator 126, pass level threshold register 117, pass number threshold register 118, subtractor 123, divider 124, and SIR ratio threshold register 125 Are the same as the operations described in the first and second embodiments, and will not be described.

【0046】本実施の形態では、第一、及び第二の実施
の形態での選択器105と係数更新器107の制御信号
を受信パス数単独、もしくは受信信号品質単独によるも
のから、それらを組み合わせた情報によるものに変更す
る。
In the present embodiment, the control signals of the selector 105 and the coefficient updater 107 in the first and second embodiments are combined based on the number of reception paths or the received signal quality alone. To the information based on that information.

【0047】本実施の形態では、AND回路127で、
第二の比較器119の出力する受信パス数から作られた
制御信号と第三の比較器126の出力する受信信号品質
SIR比から作られた制御信号の論理積が取られる。そ
れにより、有効なパス数がパス数しきい値レジスタ11
8の保持する値より小さく、かつ受信信号のSIR値が
SIR比しきい値レジスタ125が出力するSIRのし
きい値より大きければ、AND回路127は選択器10
5を操作し、I軸相関フィルタ103、Q軸相関フィル
タ104に逆拡散用の係数として拡散信号発生器106
の出力を与える。
In the present embodiment, the AND circuit 127
The logical product of the control signal generated from the number of reception paths output from the second comparator 119 and the control signal generated from the received signal quality SIR ratio output from the third comparator 126 is obtained. As a result, the number of valid paths becomes equal to
8 and the SIR value of the received signal is larger than the SIR threshold value output from the SIR ratio threshold value register 125, the AND circuit 127 selects the selector 10
5 to the I-axis correlation filter 103 and the Q-axis correlation filter 104 as spread signal generators 106 as despreading coefficients.
Gives the output of

【0048】また、有効なパス数がパス数しきい値レジ
スタ118の保持する値より大きく、かつ受信信号のS
IR値がSIR比しきい値レジスタ125が出力するS
IRのしきい値より小さければ、AND回路127は選
択器105を操作し、I軸相関フィルタ103、Q軸相
関フィルタ104に逆拡散用の係数として係数更新器1
07の出力を与える。
Further, the number of valid paths is larger than the value held in the number-of-passes threshold register 118 and the S
The IR value is the S value output from the SIR ratio threshold value register 125.
If it is smaller than the threshold value of the IR, the AND circuit 127 operates the selector 105 to cause the I-axis correlation filter 103 and the Q-axis correlation filter 104 to output the coefficient updater 1 as a despreading coefficient.
07 output.

【0049】[0049]

【発明の効果】以上、実施の形態により説明したよう
に、本発明のCDMA受信装置によると、大ゾーン方式
の無線システムで隣接基地局がない場合はパス数による
受信方式の切替を、またセルラーシステムにおいては受
信信号の品質による受信方式の切替を、更に移動局での
受信状態を正確に把握するために、パス数と受信品質の
両方による受信方式の切替を制御するように、各判定用
の信号(パス数や、受信品質)の測定器と受信方式切替
器とを持ち、必要のない時は干渉キャンセラの動作を停
止する構成を採用したため、簡易に、そして装置・回路
規模の増大は最小限で、電力消費量を削減することがで
きる。
As described above, according to the CDMA receiving apparatus of the present invention, when there is no adjacent base station in a large zone wireless system, switching of the receiving method by the number of paths is performed. In the system, the switching of the receiving system based on the quality of the received signal, and in order to more accurately grasp the receiving state at the mobile station, the switching of the receiving system based on both the number of paths and the receiving quality is controlled. Signal (number of paths and reception quality) and a reception mode switcher, and the operation of the interference canceller is stopped when it is not necessary. At a minimum, power consumption can be reduced.

【0050】また、シングルユーザタイプの干渉キャン
セラを用いたCDMA受信装置を得ることができる。
Further, a CDMA receiver using a single-user type interference canceller can be obtained.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明のの第一の実施の形態のCDMA受信装
置を示す回路構成図である。
FIG. 1 is a circuit configuration diagram showing a CDMA receiver according to a first embodiment of the present invention.

【図2】本発明の第二の実施の形態のCDMA受信装置
を示す回路構成図である。
FIG. 2 is a circuit configuration diagram showing a CDMA receiver according to a second embodiment of the present invention.

【図3】本発明の第三の実施の形態のCDMA受信装置
を示す回路構成図である。
FIG. 3 is a circuit diagram illustrating a CDMA receiver according to a third embodiment of the present invention.

【符号の説明】[Explanation of symbols]

101 Iレジスタ 102 Qレジスタ 103 I軸相関フィルタ 104 Q軸相関フィルタ 105 選択器 106 拡散符号発生器 107 係数更新器 108 検波器 109 遅延器 110 タイミング発生回路 111 I軸スライディング相関器 112 Q軸スライディング相関器 113,114,120,121 自乗器 115,122 加算器 116,119,126 比較器 117 パスレベルしきい値レジスタ 118 パス数しきい値レジスタ 123 減算器 124 割り算器 125 SIR比しきい値レジスタ 127 AND回路 Reference Signs List 101 I register 102 Q register 103 I axis correlation filter 104 Q axis correlation filter 105 Selector 106 Spread code generator 107 Coefficient updater 108 Detector 109 Delay unit 110 Timing generation circuit 111 I axis sliding correlator 112 Q axis sliding correlator 113, 114, 120, 121 Squarer 115, 122 Adder 116, 119, 126 Comparator 117 Pass level threshold register 118 Pass number threshold register 123 Subtractor 124 Divider 125 SIR ratio threshold register 127 AND circuit

フロントページの続き (58)調査した分野(Int.Cl.6,DB名) H04J 13/04 H04B 3/06Continuation of the front page (58) Field surveyed (Int.Cl. 6 , DB name) H04J 13/04 H04B 3/06

Claims (3)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】 情報信号を、その数十倍から数百倍の速
度を持つ拡散信号で変調して伝送するスペクトラム拡散
通信システムにおいて、 直交復調された受信信号を保持するためのI軸用の記憶
手段、及びQ軸用の記憶手段と、 受信信号を逆拡散するための、係数をアダプティブに変
更可能な相関フィルタを実現するI軸用のアダプティブ
フィルタ、及びQ軸用のアダプティブフィルタと、 前記アダプティブフィルタに適用するフィルタ係数を選
択するための選択手段と、 前記アダプティブフィルタの係数、もしくは後述するス
ライディング相関器のフィルタ係数を発生させる拡散符
号発生手段と、 前記アダプティブフィルタに適用する伝送路の歪みを等
価するための係数を計算する係数更新手段と、 受信信号を復調して、情報信号を取り出す検波手段と、 受信信号と前記拡散符号発生手段の出力とを少しずつず
らしながら、最大相関点を検出するI軸用のスライディ
ング相関器、及びQ軸用のスライディング相関器と、 前記スライディング相関器の出力を自乗し、電力次元の
信号とするI軸用の自乗手段、及びQ軸用の自乗手段
と、 前記I軸用、及びQ軸用の自乗手段の出力を加算し、希
望信号電力値を生成し、また最大相関点のタイミングを
検出する加算手段と、 受信用基準タイミングを発生する、タイミング発生手段
と、 前記スライディング相関器の出力に合わせ、前記タイミ
ング発生手段の出力を遅延させる遅延手段と、 前記加算手段の出力である電力次元信号の基準値を格納
しておく第一の記憶手段と、 前記加算手段の出力と、前記第一の記憶手段の出力を比
較し、条件を満たす回数を係数する第一の比較手段と、 第一の比較手段の出力である計数結果の基準値を格納す
る第二の記憶手段と、 第一の比較手段の出力する計数結果と第二の記憶手段の
出力を比較し、前記選択手段、前記係数更新手段へ制御
信号を出力する第二の比較手段とを具備することを特徴
とするCDMA用受信装置。
1. A spread spectrum communication system for modulating and transmitting an information signal with a spread signal having a speed of several tens to several hundreds times that of an information signal, comprising: an I-axis for holding a quadrature demodulated received signal; Storage means, and storage means for the Q axis, an adaptive filter for the I axis, and an adaptive filter for the Q axis, which realizes a correlation filter capable of adaptively changing coefficients for despreading a received signal; Selecting means for selecting a filter coefficient to be applied to the adaptive filter; spreading code generating means for generating a coefficient of the adaptive filter or a filter coefficient of a sliding correlator to be described later; and a distortion of a transmission path applied to the adaptive filter Coefficient updating means for calculating a coefficient for equalizing, and demodulating a received signal to extract an information signal A detecting correlator, an I-axis sliding correlator, and a Q-axis sliding correlator for detecting a maximum correlation point while slightly shifting a received signal and an output of the spreading code generating means, and the sliding correlator. The outputs of the I-axis and Q-axis squaring means are summed with the outputs of the I-axis and Q-axis squaring means to obtain the desired signal power value. Adding means for generating the timing of the maximum correlation point; timing generating means for generating a reference timing for reception; delay means for delaying the output of the timing generating means in accordance with the output of the sliding correlator And, a first storage unit that stores a reference value of a power dimension signal that is an output of the addition unit, and compares an output of the addition unit and an output of the first storage unit, A first comparing means for counting the number of times satisfying the condition, a second storage means for storing a reference value of the counting result which is an output of the first comparing means, and a counting result outputted from the first comparing means. A receiving device for CDMA, comprising: a second comparing unit that compares outputs of two storing units and outputs a control signal to the selecting unit and the coefficient updating unit.
【請求項2】 情報信号を、その数十倍から数百倍の速
度を持つ拡散信号で変調して伝送するスペクトラム拡散
通信システムにおいて、 直交復調された受信信号を保持するためのI軸用の記憶
手段、及びQ軸用の記憶手段と、 受信信号を逆拡散するための、係数をアダプティブに変
更可能な相関フィルタを実現するI軸用のアダプティブ
フィルタ、及びQ軸用のアダプティブフィルタと、 前記アダプティブフィルタに適用するフィルタ係数を選
択するための選択手段と、 前記アダプティブフィルタの係数、もしくは後述するス
ライディング相関器のフィルタ係数を発生させる拡散符
号発生手段と、 前記アダプティブフィルタに適用する伝送路の歪みを等
価するための係数を計算する係数更新手段と、 受信信号を復調して、情報信号を取り出す検波手段と、 受信信号と前記拡散符号発生手段の出力とを少しずつず
らしながら、最大相関点を検出するI軸用、及びQ軸用
のスライディング相関器と、 前記スライディング相関器の出力を自乗し、電力次元の
信号とする第一のI軸用の自乗手段、及び第一のQ軸用
の自乗手段と、 前記I軸用、及びQ軸用の自乗手段の出力を加算し、希
望信号電力値を生成し、また最大相関点のタイミングを
検出する第一の加算手段と、 受信用基準タイミングを発生する、タイミング発生手段
と、 前記スライディング相関器の出力に合わせ、前記タイミ
ング発生手段の出力を遅延させる遅延手段と、 受信信号の電力次元の信号を算出するための、第二のI
軸用の自乗手段、及びQ軸用の自乗手段と、 前記第二のI軸用、及びQ軸用の自乗手段の出力を加算
して受信信号電力値にする第二の加算手段と、 前記第一の加算手段の出力する希望信号電力値と前記第
二の加算手段の出力する受信信号電力値の差を、後述す
る割り算手段に出力する減算手段と、 前記第一の加算手段の出力と前記減算手段の出力の比を
算出し、受信品質信号とする割り算手段と、 前記割り算手段の出力する受信品質信号の基準値を格納
する記憶手段と、 前記割り算手段の出力と、前記記憶手段の出力を比較
し、前記選択手段、係数更新手段へ制御信号を出力する
比較手段とを具備することを特徴とするCDMA用受信
装置。
2. A spread spectrum communication system for modulating and transmitting an information signal with a spread signal having a speed of several tens to several hundred times that of an information signal, comprising: an I-axis for holding a quadrature demodulated received signal; Storage means, and storage means for the Q axis, an adaptive filter for the I axis, and an adaptive filter for the Q axis, which realizes a correlation filter capable of adaptively changing coefficients for despreading a received signal; Selecting means for selecting a filter coefficient to be applied to the adaptive filter; spreading code generating means for generating a coefficient of the adaptive filter or a filter coefficient of a sliding correlator to be described later; and a distortion of a transmission path applied to the adaptive filter Coefficient updating means for calculating a coefficient for equalizing, and demodulating a received signal to extract an information signal Detecting means, I-axis and Q-axis sliding correlators for detecting the maximum correlation point while slightly shifting the received signal and the output of the spreading code generating means, and squaring the outputs of the sliding correlators. Then, the outputs of the first I-axis squaring means and the first Q-axis squaring means as power dimension signals, and the outputs of the I-axis and Q-axis squaring means are added to obtain a desired signal. A first adding means for generating a power value and detecting a timing of a maximum correlation point; a timing generating means for generating a reference timing for reception; and an output of the timing generating means in accordance with an output of the sliding correlator. And a second I for calculating a signal of the power dimension of the received signal.
Axis squaring means, and Q-axis squaring means, and second adding means for adding outputs of the second I-axis, and Q-axis squaring means to obtain a received signal power value; The difference between the desired signal power value output by the first addition means and the received signal power value output by the second addition means, subtraction means that outputs the result to division means described below, and the output of the first addition means A dividing unit that calculates a ratio of the outputs of the subtracting unit and sets it as a reception quality signal; a storage unit that stores a reference value of the reception quality signal output by the division unit; an output of the division unit; A receiving device for CDMA, comprising: comparing means for comparing outputs and outputting a control signal to said selecting means and coefficient updating means.
【請求項3】 情報信号を、その数十倍から数百倍の速
度を持つ拡散信号で変調して伝送するスペクトラム拡散
通信システムにおいて、 直交復調された受信信号を保持するためのI軸用の記憶
手段、及びQ軸用の記憶手段と、 受信信号を逆拡散するための、係数をアダプティブに変
更可能な相関フィルタを実現するI軸用、及びQ軸用の
アダプティブフィルタと、 前記アダプティブフィルタに適用するフィルタ係数を選
択するための選択手段と、 前記アダプティブフィルタの係数、もしくは後述するス
ライディング相関器のフィルタ係数を発生させる拡散符
号発生手段と、 前記アダプティブフィルタに適用する伝送路の歪みを等
価するための係数を計算する係数更新手段と、 受信信号を復調して、情報信号を取り出す検波手段と、 受信信号と前記拡散符号発生手段の出力とを少しずつず
らしながら、最大相関点を検出するI軸用のスライディ
ング相関器、及びQ軸用のスライディング相関器と、 前記スライディング相関器の出力を自乗し、電力次元の
信号とする第一のI軸用の自乗手段、及びQ軸用の自乗
手段と、 前記第一のI軸用、及びQ軸用の自乗手段の出力を加算
し、希望信号電力値を生成し、また最大相関点のタイミ
ングを検出する第一の加算手段と、 受信用基準タイミングを発生する、タイミング発生手段
と、 前記スライディング相関器の出力に合わせ、前記タイミ
ング発生手段の出力を遅延させる遅延手段と、 前記第一の加算手段の出力である電力次元信号の基準値
を格納しておく第一の記憶手段と、 前記加算手段の出力と、前記第一の記憶手段の出力を比
較し、条件を満たす回数を計数する第一の比較手段と、 第二の比較手段の出力である計数結果の基準値を格納す
る第二の記憶手段と、 前記第一の比較手段の出力する計数結果と第二の記憶手
段の出力を比較し、後述する論理積回路に前記選択手
段、係数更新手段用の制御信号を出力する第二の比較手
段と、 更に、受信信号の電力次元の信号を算出するための第二
のI軸用の自乗手段、及びQ軸用の自乗手段と、 前記第二のI軸用、及びQ軸用の自乗手段の出力を加算
して受信信号電力値にする第二の加算手段と、 前記第一の加算手段の出力する希望信号電力値と前記第
二の加算手段の出力する受信信号電力値の差を後述する
割り算手段に出力する減算手段と、 前記第一の加算手段の出力と前記減算手段の出力の比を
算出し、受信品質信号とする割り算手段と、 前記割り算手段の出力する受信品質信号の基準値を格納
する第三の記憶手段と、 前記割り算手段の出力と、前記第三の記憶手段の出力を
比較し、後述する論理積回路に前記選択手段、係数更新
手段用の制御信号を出力する第三の比較手段と、 前記第二の比較手段と、前記第三の比較手段の出力値の
論理積によって、前記選択手段、前記係数更新手段を制
御する論理積回路とを具備することを特徴とするCDM
A用受信装置。
3. A spread spectrum communication system for modulating and transmitting an information signal with a spread signal having a speed of several tens to several hundreds times that of an information signal, wherein an I-axis signal for holding a quadrature demodulated received signal is provided. Storage means, storage means for the Q axis, adaptive filters for the I axis and the Q axis for realizing a correlation filter capable of adaptively changing coefficients for despreading the received signal, and an adaptive filter for the Q axis. A selection unit for selecting a filter coefficient to be applied; a spreading code generation unit for generating a coefficient of the adaptive filter or a filter coefficient of a sliding correlator to be described later; and a transmission line distortion applied to the adaptive filter are equivalent. Coefficient updating means for calculating a coefficient for detecting, a detecting means for demodulating a received signal to extract an information signal, and a receiving signal And the output of the spreading code generating means, while gradually shifting the output of the sliding correlator for the I-axis sliding correlator and the Q-axis sliding correlator for detecting the maximum correlation point, The outputs of the first I-axis squaring means and the Q-axis squaring means as a dimensional signal and the outputs of the first I-axis and Q-axis squaring means are added, and a desired signal power value is obtained. First adding means for generating and detecting the timing of the maximum correlation point; timing generating means for generating a reference timing for reception; and delaying the output of the timing generating means in accordance with the output of the sliding correlator. Delay means, first storage means for storing a reference value of a power dimension signal which is the output of the first addition means, and comparing the output of the addition means with the output of the first storage means. A first comparing unit that counts the number of times that the condition is satisfied; a second storage unit that stores a reference value of a counting result that is an output of the second comparing unit; and a counting result that is output by the first comparing unit. And a second comparing means for comparing the output of the second storing means with the output of the selecting means and the control signal for the coefficient updating means to an AND circuit to be described later, and further calculating a power dimension signal of the received signal. A second I-axis squaring means and a Q-axis squaring means for adding the outputs of the second I-axis and Q-axis squaring means to obtain a received signal power value. A second adding unit; a subtracting unit that outputs a difference between a desired signal power value output from the first adding unit and a received signal power value output from the second adding unit to a dividing unit described below; The ratio between the output of the adding means and the output of the subtracting means is calculated and used as the reception quality signal. Division means, a third storage means for storing a reference value of the reception quality signal output from the division means, and an output of the division means and an output of the third storage means, and an AND circuit described later The selecting means, the third comparing means for outputting a control signal for coefficient updating means, the second comparing means, and the logical product of the output values of the third comparing means, the selecting means, the coefficient And a logical product circuit for controlling the updating means.
A receiving device.
JP14496097A 1997-06-03 1997-06-03 CDMA receiver Expired - Fee Related JP2853741B2 (en)

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Application Number Priority Date Filing Date Title
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Application Number Priority Date Filing Date Title
JP14496097A JP2853741B2 (en) 1997-06-03 1997-06-03 CDMA receiver

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JP2853741B2 true JP2853741B2 (en) 1999-02-03

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ID=15374208

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003507916A (en) * 1999-08-11 2003-02-25 電信科学技術研究院 Interference cancellation method based on smart antenna

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3336991B2 (en) 1999-03-31 2002-10-21 日本電気株式会社 Receiver for spread spectrum communication
JP5569646B2 (en) * 2011-03-31 2014-08-13 日本電気株式会社 Reception quality estimation apparatus, reception quality estimation method, reception quality estimation program, and radio communication apparatus

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003507916A (en) * 1999-08-11 2003-02-25 電信科学技術研究院 Interference cancellation method based on smart antenna

Also Published As

Publication number Publication date
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